PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 3-A, WIDE-INPUT ADJUSTABLE SWITCHING REGULATOR FEATURES APPLICATIONS • • • • • • • • • • 3-A Output Current Wide-Input Voltage (7 V to 36 V) Wide-Output Voltage Adjust (2.5 V to 12.6 V) High Efficiency (Up to 96%) On/Off Inhibit Output Current Limit Overtemperature Shutdown Operating Temperature: –40°C to 85°C Surface Mount Package General-Purpose, Industrial Controls, HVAC Systems Test and Measurement, Medical Instrumentation AC/DC Adaptors, Vehicles, Marine, and Avionics • • DESCRIPTION The PTN78060 is a series of high-efficiency, step-down integrated switching regulators (ISR), that represent the third generation in the evolution of the popular (PT)78ST200, 78ST300, (PT)78HT200, and 78HT300 series of products. In new designs, the PTN78060 series may also be considered in place of the PT6200, PT6210, and PT6300 series of single in-line pin (SIP) products. In all cases, the PTN78060 has either similar or improved electrical performance characteristics. The caseless, double-sided package has excellent thermal characteristics, and is compatible with TI's roadmap for RoHS and lead-free compliance. Operating from a wide-input voltage range of 7 V to 36 V, the PTN78060 provides high-efficiency, step-down voltage conversion for loads of up to 3 A. The output voltage can be set to any value over a wide adjustment range using a single external resistor. The adjust range of the W-suffix part is 2.5 V to 12.6 V. The output voltage can be as little as 2 V lower than the input, allowing operation down to 7 V, with an output voltage of 5 V. Other features include an integral on/off inhibit. An output voltage sense ensures tight load regulation. The PTN78060 is suited to a wide variety of general-purpose industrial applications that operate off 12-V, 24-V, or 28-V dc power. STANDARD APPLICATION 1 7 PTN78060 (Top View) VI 3 Inhibit CI* 2.2 F Ceramic (Required) GND 6 2 4 5 RSET# 1 %, 0.05 W (Required) VO VO Sense CO* 100 F (Optional) L O A D GND *See The Application Information for Capacitor Recommendation. #RSET is Required to Adjust the Output Voltage Higher Than 2.5 V. See The Application Information for Values. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004, Texas Instruments Incorporated PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 ORDERING INFORMATION PTN78060 (Basic Model) Output Voltage 2.5 V - 12.6 V (1) Part Number Description Package Designator PTN78060WAH Horizontal T/H EUW-7 PTN78060WAS (1) Horizontal SMD EUY-7 Add a T suffix for tape and reel option on SMD packages. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range unless otherwise noted all voltages with respect to GND UNIT TA Operating free-air temperature Over VI range Solder reflow temperature Surface temperature of module body or pins Tstg Storage temperature VI Input surge voltage, 10 ms maximum V(inhabit) Inhibit (pin 3) input voltage (1) –40°C to 85°C 235°C –40°C to 125°C 38 V –0.3 V to 5 V Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS VI Input voltage TA Operating free-air temperature MIN MAX UNIT 7 36 V –40 85 °C PACKAGE SPECIFICATIONS PTN78060x (Suffix AH and AS) Weight 3.9 grams Flammability Meets UL 94 V-O Mechanical shock Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 sine, mounted Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000 Hz (1) 2 Qualification limit. 500 Gs (1) Horizontal T/H (suffix AH) 20 Gs (1) Horizontal SMD (suffix AS) 20 Gs (1) PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 ELECTRICAL CHARACTERISTICS operating at 25°C free-air temperature, VI = 20 V, VO = 5 V, IO = IO (max), CI = 2.2 µF, CO = 100 µF (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX Output current TA = 85°C, natural convection airflow VI Input voltage range Over IO range Set-point voltage tolerance TA = 25°C Temperature variation –40°C to +85°C Line regulation Over VI range ±10 mV Load regulation Over IO range ±10 mV Total output voltage variation Includes set point, line, load –40 < TA < 85°C VO VO (adj) 0 UNIT IO 7 (1) 36 3 A (2) V ±2% (3) ±0.5% ±3% Output voltage adjust range (3) VI < 12 V 2.5 VI – 2 12 V ≤ VI ≤ 15.1 V 2.5 VI – 2.5 15.1 V < VI ≤ 25 V 2.5 12.6 VI > 25 V 0.1 × VI 12.6 V VI =24 V, IO =3 A η Efficiency RSET = 732 Ω, VO = 12 V 94% RSET = 21 kΩ, VO = 5 V 86% RSET = 78.7 kΩ, VO = 3.3 V IO (LIM) Output voltage ripple 20-MHz bandwidth Current limit threshold ∆VO = –50 mV 82% 1% VO V(PP) 5.5 A 1-A/µs load step from 50% to 100% IOmax Transient response Recovery time 100 VO over/undershoot 5 Input high voltage (VIH) Inhibit control (pin 3) Input low voltage (VIL) 1 Input standby current Pin 3 connected to GND FS Switching frequency Over VI and IO ranges CI External input capacitance ceramic or nonceramic CO External output capacitance MTBF (1) (2) (3) (4) (5) (6) (7) Calculated reliability 440 2.2 (5) 100 (6) 550 V mA 17 mA 660 kHz µF 200 nonceramic Per Telcordia SR-332, 50% stress, TA = 40°C, ground benign (4) 0.3 –0.25 ceramic Equivalent series resistance (nonceramic) Open –0.1 Input low current (IIL) II(stby) µs %VO µF 2,000 17 (7) 8.9 mΩ 106 Hr For output voltages less than 10 V, the minimum input voltage is 7 V or (VO + 2) V, whichever is greater. For output voltages of 10 V and higher, the minimum input voltage is (VO + 2.5) V. See the application information for further guidance. For output voltages less than 3.6 V, the maximum input voltage is 10 × VO . See the application information for further guidance. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/°C or better temperature stability. This control pin has an internal pullup, and if left open-circuit the module operates when input power is applied. The open-circuit voltage is typically 1.5 V. A small low-leakage (< 100 nA) MOSFET is recommended for control. See the application information for further guidance. An external 2.2-µF ceramic capacitor is required across the input (VI and GND) for proper operation. Locate the capacitor close to the module. 100 µF of output capacitance is required for proper operation. See the application information for further guidance. This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 mΩ as the minimum when using max-ESR values to calculate. 3 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 PIN ASSIGNMENT TERMINAL FUNCTIONS TERMINAL NAME NO. GND 1, 7 I/O DESCRIPTION This is the common ground connection for the VI and VO power connections. It is also the 0-VDC reference for the Inhibit and VO Adjust control inputs. VI 2 I The positive input voltage power node to the module, which is referenced to common GND. Inhibit 3 I The Inhibit pin is an open-collector/drain active-low input that is referenced to GND. Applying a low-level ground signal to this input disables the module's output and turns off the output voltage. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module produces an output whenever a valid input source is applied. VO Adjust 4 I A 1% resistor must be connected between this pin and GND (pin 7) to set the output voltage of the module higher than 2.5 V. If left open-circuit, the output voltage defaults to this value. The temperature stability of the resistor should be 100 ppm/°C (or better). The set-point range is 2.5 V to 12.6 V. The standard resistor value for a number of common output voltages is provided in the application information. VO Sense 5 I The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For optimum voltage accuracy, VO Sense should be connected to VO. If the sense feature is not used, this pin may be left disconnected. VO 6 O The regulated positive power output with respect to the GND node. 4 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 TYPICAL CHARACTERISTICS (7-V INPUT) (1) (2) EFFICIENCY vs OUTPUT CURRENT OUTPUT VOLTAGE RIPPLE vs OUTPUT CURRENT 100 VO = 5 V 80 VO = 3.3 V 70 VO = 2.5 V 60 50 0 0.5 1 1.5 2 2.5 40 VO = 3.3 V 30 VO = 2.5 V VO = 5 V 20 10 0 3 2 PD − Power Dissipation − W V O − Output Voltage Ripple − mV PP 50 90 Efficiency − % POWER DISSIPATION vs OUTPUT CURRENT 1.6 VO = 2.5 V 1.2 VO = 3.3 V 0.8 VO = 5 V 0.4 0 0 0.5 1 1.5 2 2.5 IO − Output Current − A IO − Output Current − A Figure 1. Figure 2. 3 0 0.5 1 1.5 2 2.5 3 IO − Output Current − A Figure 3. TEMPERATURE DERATING vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 90 90 200 LFM 80 70 Ambient Temperature − C Ambient Temperature − C 80 100 LFM 60 Nat conv 50 40 VO = 3.3 V 30 Nat conv 50 40 VO = 5 V 20 0 0.5 1 1.5 2 2.5 IO − Output Current − A Figure 4. (2) 100 LFM 60 30 20 (1) 200 LFM 70 3 0 0.5 1 1.5 2 2.5 IO − Output Current − A 3 Figure 5. The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the converter. Applies to Figure 1, Figure 2, and Figure 3. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm, double-sided PCB with 2 oz. copper. Applies to Figure 4. 5 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 TYPICAL CHARACTERISTICS (15-V INPUT) (3) (4) EFFICIENCY vs OUTPUT CURRENT OUTPUT VOLTAGE RIPPLE vs OUTPUT CURRENT 100 80 VO = 12 V VO = 9 V 70 VO = 5 V VO = 3.3 V 60 VO = 2.5 V VO = 5 V 0 0.5 1 1.5 2 2.5 VO = 12 V 60 VO = 3.3 V 40 20 3 VO = 12 V 0.5 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 Figure 7. Figure 8. TEMPERATURE DERATING vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 90 200 LFM 80 70 100 LFM 60 Nat conv 50 40 VO = 3.3 V 80 70 100 LFM 60 Nat conv 50 40 VO = 5 V 30 1 1.5 2 2.5 IO − Output Current − A Figure 9. 3 200 LFM 70 100 LFM Nat conv 60 50 40 VO = 12 V 30 20 0.5 3 IO − Output Current − A 90 Ambient Temperature − C Ambient Temperature − C 1 Figure 6. 20 6 VO = 9 V IO − Output Current − A 80 (4) 1.5 0 0 200 LFM 0 VO = 3.3 V IO − Output Current − A 90 30 2 VO = 2.5 V 0 50 VO = 9 V 80 Ambient Temperature − C Efficiency − % 90 2.5 PD − Power Dissipation − W V O − Output Voltage Ripple − mV PP 100 (3) POWER DISSIPATION vs OUTPUT CURRENT 20 0 0.5 1 1.5 2 2.5 IO − Output Current − A Figure 10. 3 0 0.5 1 1.5 2 2.5 IO − Output Current − A 3 Figure 11. The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the converter. Applies to Figure 6, Figure 7, and Figure 8. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm, double-sided PCB with 2 oz. copper. Applies to Figure 9 and Figure 10. PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 TYPICAL CHARACTERISTICS (24-V INPUT) (5) (6) EFFICIENCY vs OUTPUT CURRENT V O − Output Voltage Ripple − mV PP 80 VO = 2.5 V VO = 5 V VO = 3.3 V 60 50 0 0.5 1 1.5 2 2.5 3 60 VO = 5 V 40 VO = 3.3 V 20 2 1.5 VO = 5 V 1 VO = 2.5 V VO = 2.5 V 0 0.5 1 1.5 2 2.5 0 3 0 0.5 1 1.5 2 2.5 IO − Output Current − A Figure 12. Figure 13. Figure 14. TEMPERATURE DERATING vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 80 Ambient Temperature − C 100 LFM 60 50 Nat conv 40 VO = 3 V 70 100 LFM 60 50 Nat conv 40 VO = 5 V 1 1.5 2 2.5 IO − Output Current − A Figure 15. 3 70 100 LFM 60 Nat conv 50 40 VO = 12 V 30 20 0.5 200 LFM 80 30 20 3 90 200 LFM 70 0 VO = 12 V 0.5 90 30 2.5 IO − Output Current − A 80 Ambient Temperature − C VO = 9 V IO − Output Current − A 200 LFM (6) 80 0 90 (5) VO = 12 V Ambient Temperature − C Efficiency − % 90 70 3 100 VO = 9 V VO = 12 V POWER DISSIPATION vs OUTPUT CURRENT PD − Power Dissipation − W 100 OUTPUT VOLTAGE RIPPLE vs OUTPUT CURRENT 20 0 0.5 1 1.5 2 2.5 IO − Output Current − A Figure 16. 3 0 0.5 1 1.5 2 2.5 IO − Output Current − A 3 Figure 17. The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the converter. Applies to Figure 12, Figure 13, and Figure 14. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm, double-sided PCB with 2 oz. copper. Applies to Figure 15, Figure 16, and Figure 17. 7 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 TYPICAL CHARACTERISTICS (32-V INPUT) (7) (8) EFFICIENCY vs OUTPUT CURRENT OUTPUT VOLTAGE RIPPLE vs OUTPUT CURRENT 80 VO = 9 V 70 VO = 5 V 60 VO = 3.3 V 3 120 50 0.5 1 1.5 2 2.5 VO = 9 V 60 VO = 5 V 30 0 0.5 1 1.5 2 2.5 VO = 9 V 2 1.5 VO = 5 V 1 VO = 3.3 V 0 0 0.5 1 1.5 2 2.5 IO − Output Current − A IO − Output Current − A IO − Output Current − A Figure 18. Figure 19. Figure 20. TEMPERATURE DERATING vs OUTPUT CURRENT; TEMPERATURE DERATING vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 200 LFM 70 60 100 LFM 50 Nat conv 40 VO = 3.3 V 200 LFM 100 LFM 60 50 Nat conv 40 VO = 5 V 1 1.5 2 2.5 IO − Output Current − A Figure 21. 3 70 100 LFM 60 50 Nat conv 40 VO = 12 V 30 20 20 0.5 200 LFM 80 70 30 20 3 90 80 Ambient Temperature − C 80 0 2.5 3 90 30 VO = 12 V 0.5 VO = 3.3 V 3 90 Ambient Temperature − C 90 0 0 8 VO = 12 V Ambient Temperature − C Efficiency − % 90 PD − Power Dissipation − W V O − Output Voltage Ripple − mV PP VO = 12 V (8) 3.5 150 100 (7) POWER DISSIPATION vs OUTPUT CURRENT 0 0.5 1 1.5 2 2.5 IO − Output Current − A Figure 22. 3 0 0.5 1 1.5 2 2.5 IO − Output Current − A 3 Figure 23. The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the converter. Applies to Figure 18, Figure 19, and Figure 20. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm, double-sided PCB with 2 oz. copper. Applies to Figure 21, Figure 22, and Figure 23. PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 APPLICATION INFORMATION Adjusting the Output Voltage of the PTN78060 Wide-Output Adjust Power Modules General A resistor must be connected directly between the VO Adjust control (pin 4) and the output GND (pin 7) to set the output voltage higher than 2.5 V. The adjustment range is from 2.5 V to 12.6 V. If pin 4 is left open, the output voltage defaults to the lowest value, 2.5 V. Table 1 gives the standard resistor value for a number of common voltages, and with the actual output voltage that the value produces. For other output voltages, the resistor value can either be calculated using the following formula, or simply selected from the range of values given in Table 2. Figure 24 shows the placement of the required resistor. R set 54.9 k V 1.25 V 6.49 k 2.5 V O (1) Input Voltage Considerations The PTN78060 is a step-down switching regulator. In order that the output remains in regulation, the input voltage must exceed the output by a minimum differential voltage. Another consideration is the pulse width modulation (PWM) range of the regulator's internal control circuit. For stable operation, its operating duty cycle should not be lower than some minimum percentage. This defines the maximum advisable ratio between the regulator's input and output voltage magnitudes. For satisfactory performance, the operating input voltage range must adhere to the following requirements. 1. For output voltages lower than 10 V, the minimum input voltage is (VO + 2 V ) or 7 V, whichever is higher. 2. For output voltages equal to 10 V and higher, the minimum input voltage is (VO + 2.5 V ) . 3. The maximum input voltage is (10 × VO ) or 36 V, whichever is less. As an example, Table 1 gives the operating input voltage range for the common output bus voltages. In addition, the Electrical Characteristics define the available output voltage adjust range for various input voltages. Table 1. Standard Values of Rset for Common Output Voltages VO (Required) RSET (Standard Value) VO (Actual) Operating VI Range 2.5 V Open 2.5 V 7 V to 25 V 3.3 V 78.7 kΩ 3.306 V 7 V to 33 V 5V 21 kΩ 4.996 V 7 V to 36 V 12 V 732 Ω 12.002 V 14.5 V to 36 V 9 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 5 Sense VI 2 VI PTN78060 Inhibit 3 GND 1 VO VO 6 Adjust 7 4 CI 2.2 F Ceramic + RSET 0.05 W 1% CO 100 F Inhibit GND GND (1) A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C (or better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 4 and 7 using dedicated PCB traces. (2) Never connect capacitors from VO Adjust to either GND or VO. Any capacitance added to the VO Adjust pin affects the stability of the regulator. Figure 24. VO Adjust Resistor Placement Table 2. Output Voltage Set-Point Resistor Values 10 VO Required RSET VO Required RSET VO Required RSET VO Required RSET 2.50 V Open 3.7 V 50.7 kΩ 6.1 V 12.6 kΩ 9.0 V 4.07 kΩ 2.55 V 1.37 MΩ 3.8 V 46.3 kΩ 6.2 V 12.1 kΩ 9.2 V 3.75 kΩ 2.60 V 680 kΩ 3.9 V 42.5 kΩ 6.3 V 11.6 kΩ 9.4 V 3.46 kΩ 2.65 V 451 kΩ 4.0 V 39.3 kΩ 6.4 V 11.1 kΩ 9.6 V 3.18 kΩ 2.70 V 337 kΩ 4.1 V 36.4 kΩ 6.5 V 10.7 kΩ 9.8 V 2.91 kΩ 2.75 V 268 kΩ 4.2 V 33.9 kΩ 6.6 V 10.2 kΩ 10.0 V 2.66 kΩ 2.80 V 222 kΩ 4.3 V 31.6 kΩ 6.7 V 9.85 kΩ 10.2 V 2.42 kΩ 2.85 V 190 kΩ 4.4 V 29.6 kΩ 6.8 V 9.47 kΩ 10.4 V 2.20 kΩ 2.90 V 165 kΩ 4.5 V 27.8 kΩ 6.9 V 9.11 kΩ 10.6 V 1.98 kΩ 2.95 V 146 kΩ 4.6 V 26.2 kΩ 7.0 V 8.76 kΩ 10.8 V 1.78 kΩ 3.00 V 131 kΩ 4.7 V 24.7 kΩ 7.1 V 8.43 kΩ 11.0 V 1.58 kΩ 3.05 V 118 kΩ 4.8 V 23.3 kΩ 7.2 V 8.11 kΩ 11.2 V 1.40 kΩ 3.10 V 108 kΩ 4.9 V 22.1 kΩ 7.3 V 7.81 kΩ 11.4 V 1.22 kΩ 3.15 V 99.1 kΩ 5.0 V 21.0 kΩ 7.4 V 7.52 kΩ 11.6 V 1.05 kΩ 3.20 V 91.5 kΩ 5.1 V 19.9 kΩ 7.5 V 7.24 kΩ 11.8 V 889 Ω 3.25 V 85.0 kΩ 5.2 V 18.9 kΩ 7.6 V 6.97 kΩ 12.0 V 734 Ω 3.30 V 79.3 kΩ 5.3 V 18.0 kΩ 7.7 V 6.71 kΩ 12.2 V 585 Ω 3.35 V 74.2 kΩ 5.4 V 17.2 kΩ 7.8 V 6.46 kΩ 12.4 V 442 Ω 3.40 V 69.8 kΩ 5.5 V 16.4 kΩ 7.9 V 6.22 kΩ 12.6 V 305 Ω 3.45 V 65.7 kΩ 5.6 V 15.6 kΩ 8.0 V 5.99 kΩ 3.50 V 62.1 kΩ 5.7 V 15.0 kΩ 8.2 V 5.55 kΩ 3.55 V 58.9 kΩ 5.8 V 14.3 kΩ 8.4 V 5.14 kΩ 3.60 V 55.9 kΩ 5.9 V 13.7 kΩ 8.6 V 4.76 kΩ 3.65 V 53.2 kΩ 6.0 V 13.1 kΩ 8.8 V 4.40 kΩ PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 CAPACITOR RECOMMENDATIONS for the PTN78060 WIDE-OUTPUT ADJUST POWER MODULES Input Capacitor The minimum requirement for the input is 2.2 µF of ceramic capacitance, in either an X5R or X7R temperature characteristic. Ceramic capacitors should be located within 0.5 inches (1,27 cm) of the regulator's input pins. Electrolytic capacitors can be used at the input, but only in addition to the required ceramic capacitance. The minimum ripple current rating for any nonceramic capacitance must be at least 500 mA rms for VO ≤ 5.5 V. For VO > 5.5 V, the minimum ripple current rating is 750 mA rms. The ripple current rating of electrolytic capacitors is a major consideration when they are used at the input. This ripple current requirement can be reduced by placing more ceramic capacitors at the input, in addition to the minimum required 2.2 µF. Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimum voltage rating of 2 × (maximum dc voltage + ac ripple). The 2× rating is standard practice for regular tantalum capacitors to ensure reliability. Polymer-tantalum capacitors are more reliable, and are available with a maximum rating of typically 20 V. These can be used with input voltages up to 16 V. Output Capacitor The minimum capacitance required to ensure stability is a 100-µF capacitor. Either ceramic or electrolytic-type capacitors can be used. The minimum ripple current rating for the nonceramic capacitance must be at least 150 mA rms. The stability of the module and voltage tolerances will be compromised if the capacitor is not placed near the output bus pins. A high-quality computer-grade electrolytic capacitor should be adequate. A ceramic capacitor can be also be located within 0.5 inches (1,27 cm) of the output pin. For applications with load transients (sudden changes in load current), the regulator response improves with additional capacitance. Additional electrolytic capacitors should be located close to the load circuit. These capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz. Aluminum electrolytic capacitors are suitable for ambient temperatures above 0°C. For operation below 0°C, tantalum or Os-Con type capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than 10 mΩ (17 mΩ using the manufacturer's maximum ESR for a single capacitor). A list of capacitors and vendors are identified in Table 3, the recommended capacitor table. Ceramic Capacitors Above 150 kHz, the performance of aluminum electrolytic capacitors becomes less effective. To further reduce the reflected input ripple current, or improve the output transient response, multilayer ceramic capacitors must be added. Ceramic capacitors have low ESR, and their resonant frequency is higher than the bandwidth of the regulator. When placed at the output, their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed 200 µF. Also, to prevent the formation of local resonances, do not place more than three identical ceramic capacitors with values of 10 µF or greater in parallel. Tantalum Capacitors Tantalum-type capacitors may be used at the output and are recommended for applications where the ambient operating temperature can be less than 0°C. The AVX TPS, Sprague 593D/594/595 and Kemet T495/T510/T520 capacitors series are suggested over many other tantalum types due to their rated surge, power dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have considerably higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors are also less reliable as they have lower power dissipation and surge current ratings. Tantalum capacitors that do not have a stated ESR or surge current rating are not recommended for power applications. When specifying Os-Con and polymer tantalum capacitors for the output, the minimum ESR limit is encountered well before the maximum capacitance value is reached. 11 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 Capacitor Table The capacitor table, Table 3, identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The rms rating and ESR (at 100 kHz) are critical parameters necessary to ensure both optimum regulator performance and long capacitor life. Designing for Load Transients The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 1 A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the required value of output capacitance. As the di/dt of a transient is increased, the response of a converter's regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation of any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the capacitors selected. If the transient performance requirements exceed those specified in the data sheet, the selection of output capacitors becomes more important. Review the minimum ESR in the characteristic data sheet for details on the capacitance maximum. Table 3. Recommended Input/Output Capacitors CAPACITOR CHARACTERISTICS QUANTITY WORKING VOLTAGE (V) VALUE (µF) EQUIVALENT SERIES RESISTANCE (ESR) (Ω) 85°C MAXIMUM RIPPLE CURRENT (IRMS) (mA) Panasonic WA (SMD) 20 150 0.026 32500 10 × 10,2 FC( Radial) 50 180 0.119 850 10 × 16 FC (SMD) 35 100 0.015 670 10 × 10,2 1 United Chemi-Con PXA (SMD) 16 180 0.016 4360 8 × 12 FS 20 150 0.024 3200 LXZ 35 220 0.090 MVY(SMD) 50 100 Nichicon UWG (SMD) 50 F550 (Tantalum) HD CAPACITOR VENDOR/ COMPONENT SERIES PHYSICAL SIZE (mm) INPUT OUTPUT BUS BUS 1 (1) 1 ≤2 VENDOR NUMBER EEFWA1D151P (VI < 16 V) 1 EEUFC1H181 (1) 1 EEVFC1V101P (VO ≤ 5.5 V) 1 (1) ≤1 PXA16VC180MF60 (VI < 14 V) 8 × 10,5 1 (1) ≤2 10FS100M (VI < 16 V) 760 10 × 12,5 1 (1) 0.300 500 10 × 10 100 0.300 500 10 100 0.055 50 120 0.072 Sanyo Os-Con SVP (SMD) 20 100 SP 16 1 LXZ35VB221M10X12LL (VI < 32 V) 1 1 MVY50VC101M10X10TP (VO ≤ 5.5 V) 10 × 10 1 1 UWG1H101MNR1GS (VO ≤ 5.5 V) 2000 7,7 × 4,3 N/R 979 10 × 12,5 1 0.024 2500 8 × 12 1 (1) ≤2 20SVP100M (VI ≤ 16 V) 100 0.032 2890 10 × 5 1 (1) ≤2 16SP100M (VI ≤ 14 V) 20 100 0.085 1543 7,3 L × 4,3 W × 4,1 H N/R (3) ≤3 TPSV107M020R0085 (VO ≤ 10 V) 20 100 0.200 > 817 N/R (3) ≤3 TPSE107M020R0200 (VO ≤ 10 V) Murata X5R Ceramic 6.3 100 0.002 >1000 1210 case N/R (1) ≤2 GRM32ER60J107M (VO ≤ 5.5 V) TDK X5R Ceramic 6.3 100 0.002 >1000 3225 N/R (1) ≤2 C3225X5R0J107MT (VO ≤ 5.5 V) Murata X5R Ceramic 16 47 0.002 >1000 1210 case 1 ≤4 GRM32ER61C476M (Vo ~ VI ≤ 13.5 V) AVX Tantalum TPS (SMD) (1) (2) (3) 12 (1) ≤ 3 (2) 1 (1) F551A107MN (VO ≤ 5 V) UHD1H151MHR The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the regulator at a higher input voltage, select a capacitor with the next higher voltage rating. The maximum voltage rating of the capacitor must be selected for the desired set-point voltage (VO ). To operate at a higher output voltage select a capacitor with a higher voltage rating. Not recommended (N/R). The voltage rating does not meet the minimum operating limits in most applications. PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 Table 3. Recommended Input/Output Capacitors (continued) CAPACITOR CHARACTERISTICS QUANTITY WORKING VOLTAGE (V) VALUE (µF) EQUIVALENT SERIES RESISTANCE (ESR) (Ω) 85°C MAXIMUM RIPPLE CURRENT (IRMS) (mA) Kemet X5R Ceramic 6.3 47 0.002 >1000 1210 case N/R (1) ≤4 C1210C476K9PAC (VO ≤ 5.5 V) TDK X5R Ceramic 6.3 47 0.002 >1000 3225 N/R (1) ≤4 C3225X5R0J476MT (VO ≤ 5.5 V) Murata X5R Ceramic 6.3 47 0.002 >1000 3225 N/R (1) ≤4 GRM422X5R476M6.3 (VO ≤ 5.5 V) TDK X7R Ceramic 25 2.2 0.002 >1000 SMD ≥1 (4) 1 C3225X7R0J225KT/MT (VO ≤ 20 V) Murata X7R Ceramic 25 2.2 0.002 >1000 1210 case ≥1 (4) 1 GRM32RR71J225K (VO ≤ 20 V) Kemet X7R Ceramic 25 2.2 0.002 >1000 3225 ≥1 (4) 1 C1210C225K3RAC (VO ≤ 20 V) AVX X7R Ceramic 25 2.2 0.002 >1000 ≥1 (4) 1 C1210C225KAT2A (VO ≤ 20 V) Kemet X7R Ceramic 50 1.0 0.002 >1000 ≥2 (5) 1 C1210C105K5RAC Murata X7R Ceramic 50 4.7 0.002 >1000 ≥1 1 GRM32ER71H475KA88L TDK X7R Ceramic 50 2.2 0.002 >1000 ≥1 1 C3225X7R1H225KT Murata X7R Ceramic 50 1.0 0.002 >1000 1210 case ≥2 (5) 1 GRM32RR71H105KA01L TDK X7R Ceramic 50 1.0 0.002 >1000 3225 ≥2 (5) 1 C3225X7R1H105KT Kemet Radial Through-hole 50 1.0 0.002 >1000 5,08 × 7,62 × 9,14 H ≥2 (5) 1 C330C105K5R5CA Murata Radial Through-hole 50 2.2 0.004 >1000 10 H × 10 W ×4D 1 RPER71H2R2KK6F03 CAPACITOR VENDOR/ COMPONENT SERIES (4) (5) PHYSICAL SIZE (mm) INPUT OUTPUT BUS BUS SMD ≥1 VENDOR NUMBER The maximum rating of the ceramic capacitor limits the regulator's operating input voltage to 20 V. Select an alternative ceramic component to operate at a higher input voltage. A total capacitance of 2 µF is an acceptable replacement value for a single 2.2-µF ceramic capacitor 13 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 Power-Up Characteristics When configured per the standard application, the PTN78060 power module produces a regulated output voltage following the application of a valid input source voltage. During power up, internal soft-start circuitry slows the rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the input source. The soft-start circuitry introduces a short time delay (typically 5–10 ms) into the power-up characteristic. This is from the point that a valid input source is recognized. Figure 25 shows the power-up waveforms when operating from a 12-V input and with the output voltage adjusted to 5 V. The waveforms were measured with a 2.8-A resistive load. VI (5 V/div) VO (2 V/div) II (1 A/div) t − 5 ms/div Figure 25. Power-Up Waveforms Current Limit Protection The module is protected against load faults with a continuous current limit characteristic. Under a load-fault condition, the output current increases to the current limit threshold. Attempting to draw current that exceeds the current limit threshold causes the module to progressively reduce its output voltage. Current is continuously supplied to the fault until the fault is removed. Once it is removed, the output voltage promptly recovers. When limiting output current, the regulator experiences higher power dissipation, which increases its temperature. If the temperature increase is excessive, the module overtemperature protection begins to periodically turn the output voltage off. Overtemperature Protection A thermal shutdown mechanism protects the module's internal circuitry against excessively high temperatures. A rise in temperature may be the result of a drop in airflow, a high ambient temperature, or a sustained current limit condition. If the internal temperature rises excessively, the module turns itself off, reducing the output voltage to zero. The module excercises a soft-start power up when the sensed temperature has decreased by about 10°C below the trip point. NOTE: Overtemperature protection is a last resort mechanism to prevent damage to the module. It should not be relied on as permanent protection against thermal stress. Always operate the module within its temperature derated limits, for the worst case operating conditions of output current, ambient temperature, and airflow. Operating the module above these limits, albeit below the thermal shutdown temperature, reduces the long-term reliability of the module. Output Voltage Sense An external voltage sense improves the load regulation performance of the module by enabling it to compensate for any IR-voltage drop between the module and the load circuit. This voltage drop is caused by the flow of current through the resistance in the printed-circuit board connections. 14 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 To use the output voltage sense feature, simply connect the VO Sense input (pin 5) to VO, close to the device that draws the most supply current. If an external voltage sense is not desired, the VO Sense input may be left open circuit. An internal resistor (15 Ω or less), connected between this input and VO, ensures that the output remains in regulation. With VO Sense connected, the difference between the voltage measure directly between the VO and GND, and that measured from VO Sense to GND, represents the amount of IR-voltage drop being compensated by the regulator. This should be limited to a maximum of 0.3 V. Note: The external voltage sense is not designed to compensate for the forward drop of nonlinear or frequency-dependent components that may be placed in series with the regulator's output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the external sense connection, they are effectively placed inside the regulation control loop. This can adversely affect the stability of the module. Output On/Off Inhibit The inhibit feature can be used wherever there is a requirement for the output voltage to be turned off. The power module functions normally when the Inhibit control (pin 3) is left open-circuit, providing a regulated output whenever a valid source voltage is connected to VI with respect to GND. Figure 26 shows the the circuit used to demonstrate the inhibit function. Note the discrete transistor (Q1). Turning Q1 on applies a low voltage to the Inhibit control pin and turns the module off. The output voltage decays as the load circuit discharges the capacitance. The current drawn at the input is reduced to typically 17 mA. If Q1 is then turned off, the module executes a soft-start power up. A regulated output voltage is produced within 20 ms. Figure 27 shows the typical rise in the output voltage, following the turn off of Q1. The turn off of Q1 corresponds to the fall in the waveform, Q1 Vgs. The waveforms were measured with a 2.8-A resistive load. 5 Sense VI = 12 V 2 VI PTN78060 Inhibit 3 CI 2.2 F Ceramic Inhibit Q1 BSS138 GND 1 VO = 5 V 6 VO Adjust 7 4 RSET 21 k 0.05 W 1% + CO 100 F GND L O A D GND Figure 26. On/Off Inhibit Control Circuit 15 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 VO (2 V/div) II (1 A/div) Q1 VGS (10 V/div) t − 5 ms/div Figure 27. Power-Up Response From Inhibit Control 16 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 Optional Input/Output Filters Power modules include internal input and output ceramic capacitors in all of their designs. However, some applications require much lower levels of either input reflected or output ripple/noise. This application describes various filters and design techniques found to be successful in reducing both input and output ripple/noise. Input/Output Capacitors The easiest way to reduce output ripple and noise is to add one or more 1-µF ceramic capacitors, such as C4 shown in Figure 28. Ceramic capacitors should be placed close to the output power terminals. A single 1-µF capacitor reduces the output ripple/noise by 10% to 30% for modules with a rated output current of less than 3 A. (Note: C3 is recommended to improve the regulators transient response, and does not reduce output ripple and noise.) Switching regulators draw current from the input line in pulses at their operating frequency. The amount of reflected (input) ripple/noise generated is directly proportional to the equivalent source impedance of the power source including the impedance of any input lines. The addition of C1, minimum 1-µF ceramic capacitor, near the input power pins, reduces reflected conducted ripple/noise by up to 20%. 5 Sense VI 2 VIN PTN78060 Inhibit 3 C1 1 F 50 V Ceramic GND 1 VO VO 6 Adjust 7 C2* 2.2 F 50 V Ceramic (Required) 4 + RSET C3# 100 F (Required) C4 1 F Ceramic GND GND * See specifications for required value and type. # See Application Information for suggested value and type. Figure 28. Adding High-Frequency Bypass Capacitors To The Input and Output π Filters If a further reduction in ripple/noise level is required for an application, higher order filters must be used. A π (pi) filter, employing a ferrite bead (Fair-Rite Pt. No. 2673000701 or equivalent) in series with the input or output terminals of the regulator reduces the ripple/noise by at least 20 db (see Figure 29 and Figure 30). In order for the inductor to be effective ceramic capacitors are also required. (Note: see Capacitor Recommendations for additional information on vendors and component suggestions). These inductors plus ceramic capacitors form an excellent filter because of the rejection at the switching frequency (650 kHz - 1 MHz). The placement of this filter is critical. It must be located as close as possible to the input or output pins to be effective. The ferrite bead is small (12,5 mm × 3 mm), easy to use, low cost, and has low dc resistance. Fair-Rite also manufactures a surface-mount bead (Pt. No. 2773021447). It is rated to 5 A, and can be used on the output bus. As an alternative, suitably rated 1-µH to 5-µH wound inductors can be used in place of the ferrite inductor bead. 17 PTN78060W www.ti.com SLTS229 – NOVEMBER 2004 5 Sense VI L1 1 − 5H 2 PTN78060W VI Inhibit 3 GND 1 7 VO RSET C3* 100 F (Optional) GND C4 1 F Ceramic C5 † GND * See specifications for required value and type. # See Application Information for suggested value and type. † Recommended whenever IO is greater than 2 A. Figure 29. Adding π Filters (IO ≤ 3 A) 45 40 Attenuation − dB 35 1 MHz 30 25 20 600 kHz 15 10 0 0.5 1 1.5 2 Load Current − A 2.5 3 Figure 30. π-Filter Attenuation vs. Load Current 18 VO Adjust 4 C2* 2.2 F 50 V Ceramic (Required) C1 1 F 50 V Ceramic L2 1 − 5H 6 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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