SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 D Designed for TIA/EIA-485, TIA/EIA-422, and D D D D D D D ISO 8482 Applications Signaling Rate1 Exceeding 50 Mbps Fail-Safe in Bus Short-Circuit, Open-Circuit, and Idle-Bus Conditions ESD Protection on Bus Inputs Exceeds 6 kV Common-Mode Bus Input Range –7 V to 12 V Propagation Delay Times <16 ns Low Standby Power Consumption <20 µA Pin-Compatible Upgrade for MC3486, DS96F175, LTC489, and SN75175 SN65LBC175A (Marked as 65LBC175A) SN75LBC175A (Marked as 75LBC175A) D or N PACKAGE (TOP VIEW) 1B 1A 1Y 1,2EN 2Y 2A 2B GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 4B 4A 4Y 3,4EN 3Y 3A 3B logic diagram 1,2EN description The SN65LBC175A and SN75LBC175A are quadruple differential line receivers with 3-state outputs, designed for TIA/EIA-485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482 (Euro RS-485) applications. These devices are optimized for balanced multipoint bus communication at data rates up to and exceeding 50 million bits per second. The transmission media may be twisted-pair cables, printed-circuit board traces, or backplanes. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment. 1A 1B 1Y 2A 2B 2Y 3,4EN 3A 3B 3Y 4A 4B 4Y Each receiver operates over a wide range of positive and negative common-mode input voltages, and features ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh environments. These devices are designed using LinBiCMOSt, facilitating low power consumption and inherent robustness. Two EN inputs provide pair-wise enable control, or these can be tied together externally to enable all four drivers with the same signal. The SN75LBC175A is characterized for operation over the temperature range of 0°C to 70°C. The SN65LBC175A is characterized over the temperature range from −40°C to 85°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinBiCMOS is a trademark of Texas Instruments. 1The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). Copyright 2001, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 FUNCTION TABLE (each receiver) DIFFERENTIAL INPUTS A – B (VID) ENABLE EN OUTPUT Y VID ≤ −0.2 V −0.2 V < VID < −0.01 V H L H ? −0.01 V ≤ VID H H X L Z X OPEN Z Short circuit H H Open circuit H H H = high level, L = low level, ? = indeterminate X = irrelevant, Z = high impedance (off), AVAILABLE OPTIONS PACKAGE TA PLASTIC SMALL OUTLINE† (JEDEC MS-012) PLASTIC DUAL-IN-LINE (JEDEC MS-001) 0°C to 70°C SN75LBC175AD SN75LBC175AN −40°C to 85°C SN65LBC175AD SN65LBC175AN † Add an R suffix for taped and reeled † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. equivalent input and output schematic diagrams A Input B Input VCC 100 kΩ 16 V VCC 4 kΩ 18 kΩ Input Input 4 kΩ 16 V Enable Input 4Ω 16 V 18 kΩ 16 V VCC 100 kΩ 4 kΩ Y Output VCC 5Ω 1 kΩ Output Input 8V 2 8V 100 kΩ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 8V SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 absolute maximum ratings† over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Voltage range at any bus input (steady state), A and B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −10 V to 15 V Voltage range at any bus input (transient pulse through 100 Ω, see Figure 5) . . . . . . . . . . . . . . −30 V to 30 V Voltage input range at 1,2EN and 3,4EN, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Receiver output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Electrostatic discharge: Human body model (see Note 2): A and B to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 kV All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 kV Charged-device model (see Note 3): All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Power Dissipation Rating Table † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to GND, and are steady-state (unless otherwise specified). 2. Tested in accordance with JEDEC Standard 22, Test Method A114-A. 3. Tested in accordance with JEDEC Standard 22, Test Method C101. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR† ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING D 1080 mW 8.7 mW/°C 690 mW 560 mW N 1150 mW 9.2 mW/°C 736 mW 598 mW † This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. recommended operating conditions Supply voltage, VCC Voltage at any bus terminal High-level input voltage, VIH Low-level input voltage, VIL Output current Operating free-air temperature, TA A, B EN MIN NOM MAX UNIT 4.75 5 5.25 V −7 12 V 2 VCC 0.8 V 0 Y −8 8 SN75LBC175A 0 70 SN65LBC175A −40 85 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 mA °C 3 SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 electrical characteristics over recommended operating conditions PARAMETER TEST CONDITIONS VIT+ Positive-going differential input voltage threshold VIT− Negative-going differential input voltage threshold VHYS VIK Hysteresis voltage (VIT+ − VIT−) VOH High-level output voltage −7 V < VCM < 12 V (VCM = (VA + VB ) / 2 ) Input clamp voltage II = −18 mA VID = 200 mV, IOH = −8 mA VOL Low-level output voltage VID = −200 mV, IOL = 8 mA IOZ High-impedance-state output current VO = 0 V to VCC Other input at 0 V, VCC = 0 V or 5 V II Line input current IIH IIL High-level input current RI Input resistance A, B Supply current VID = 5 V No load ICC Low-level input current MIN TYP† MAX −80 −10 mV −200 −120 −40 mV −1.5 −0.8 V 2.7 4.8 See Figure 1 V 0.2 −1 VI = 12 V VI = −7 V 0.4 1 µA 0.9 mA −0.7 100 Enable inputs UNIT 12 kΩ 1,2EN, 3,4EN at 0 V 1,2EN, 3,4EN at VCC µA µA −100 20 mA 11 16 mA TYP† MAX † All typical values are at VCC = 5 V and 25°C. switching characteristics over recommended operating conditions PARAMETER TEST CONDITIONS MIN UNIT tr tf Output rise time 2 4 ns Output fall time 2 4 ns tPLH tPHL Propagation delay time, low-to-high level output 9 12 16 ns 9 12 16 ns tPZH tPHZ Propagation delay time, high-impedance to high-level output 27 38 ns tPZL tPLZ Propagation delay time, high-impedance to low level output tsk(p) tsk(o) Pulse skew (| (tPLH – tPHL) |) VID = −3 V to 3 V, See Figure 2 Propagation delay time, high-to-low level output Propagation delay time, high-level to high-impedance output Propagation delay time, low-level to high-impedance output See Figure 3 See Figure 4 Output skew (see Note 4) 7 16 ns 29 38 ns 12 16 ns 0.2 1 ns 2 ns tsk(pp) Part-to-part skew (see Note 5) 2 ns † All typical values are at VCC = 5 V and 25°C. NOTES: 4. Outputs skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together. 5. Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test circuits. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 PARAMETER MEASUREMENT INFORMATION VA IO VID VB VO Figure 1. Voltage and Current Definitions Generator 50 Ω Input B A 3V 1.5 V Y 1.5 V Input A B 0V tPLH Generator 50 Ω CL = 15 pF (Includes Probe and Jig Capacitance) Output Y tPHL 90% 10% 1.5 V tr VOH 90% 10% VOL tf Generators: PRR = 1 MHz, 50% Duty Cycle, tr <6 ns, Zo = 50 Ω Figure 2. Switching Test Circuit and Waveforms VCC 1.5 V A Y 1 kΩ B 3V EN CL = 15 pF (Includes Probe and Jig Capacitance) Generator 50 Ω EN 1.5 V 1.5 V 0V tPHZ tPZH Y 1.5 V VOH VOH −0.5 V GND CL = 15 pF Generators: PRR = 1 MHz, 50% Duty Cycle, tr <6 ns, Zo = 50 Ω Figure 3. Test Circuit Waveforms, tPZH and tPHZ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 PARAMETER MEASUREMENT INFORMATION VCC A −1.5 V Y 1 kΩ B EN CL = 15 pF (Includes Probe and Jig Capacitance) 3V EN 1.5 V 1.5 V 0V tPLZ tPZL Generator VCC 50 Ω Y 1.5 V VOL + 0.5 V VOL Generators: PRR = 1 MHz, 50% Duty Cycle, tr <6 ns, Zo = 50 Ω Figure 4. Test Circuit Waveforms, tPZL and tPLZ 100 Ω VTEST 0V Pulse Generator, 15 µs Duration, 1% Duty Cycle 15 µs 1.5 ms Figure 5. Test Circuit and Waveform, Transient Over-Voltage Test 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VTEST SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 TYPICAL CHARACTERISTICS BUS INPUT CURRENT vs BUS INPUT VOLTAGE OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 800 6 VCC = 5 V TA = 25°C 600 5 400 VO − Output Voltage − V Bus Input Current − µ A VCC = 0 V VCC = 5 V 200 0 −200 VIC = −7 V VIC = 0 V VIC = 12 V 4 VIC = −7 V VIC = 0 V VIC = 12 V 3 2 1 −400 −600 −10 −5 0 5 10 0 −150 15 −100 Bus Input Voltage − V −50 0 50 Differential Input Voltage − mV Figure 6 Figure 7 SUPPLY CURRENT vs SIGNALING RATE (ALL FOUR CHANNELS) PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 60 13.5 Propagation Delay Time − ns I CC− Supply Current − mA 50 40 VCC = 5.25 V, CL = 15 pF 30 VCC = 5 V, CL = 15 pF VCC = 4.75 V, CL = 15 pF 20 10 13 tPLH 12.5 tPHL 12 11.5 VCC = 5 V, No Load 0 1 10 100 Signaling Rate (All Four Channels) − Mbps 11 −40 −20 0 20 40 60 80 TA − Free-Air Temperature − °C Figure 8 Figure 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 TYPICAL CHARACTERISTICS 500 mV A, B −500 mV 20 ns 5V Y 0V Figure 10. Receiver Inputs and Outputs, 50 Mbps Signaling Rate 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS455B − NOVEMBER 2000 − REVISED MARCH 2005 APPLICATION INFORMATION TMS320F243 DSP (Controller) SN65LBC174A SN65LBC175A TMS320F241 DSP (Embedded Application) SPISIMO SPISIMO IOPA1 (Enable) IOPA1 SPISTE SPISTE SPICLK SPICLK IOPA2 (Enable) IOPA2 IOPA0 (Handshake /Status) IOPA0 SPISOMI SPISOMI Figure 11. Typical Application Circuit, DSP-to-DSP Link via Serial Peripheral Interface Motion Controller Servo Drive SN65LBC175A Encoder Phase A Encoder Phase B Encoder Index Status Bit Figure 12. Typical Application Circuit, High-Speed Servomotor Encoder Interface POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN65LBC175AD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LBC175ADG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LBC175ADR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LBC175ADRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LBC175AN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN65LBC175ANE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75LBC175AD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LBC175ADG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LBC175ADR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LBC175ADRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LBC175AN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75LBC175ANE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65LBC175ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN75LBC175ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65LBC175ADR SOIC D 16 2500 333.2 345.9 28.6 SN75LBC175ADR SOIC D 16 2500 333.2 345.9 28.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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