Ordering number : ENA1525 Bi-CMOS IC Fan Motor Driver LV8064TT Single-Phase Full-Wave Driver Overview The LV8064TT is a single-phase bipolar fan motor driver IC. It features quiet operation that suppresses reactive current through BTL output system. The speed control range can be adjusted to desired values by the external application program, so that it can rotate fan at lower speeds than conventional drivers in the same driver voltage control range. It is optimal for use in applications that require low noise and power saving, including CPU coolers. Functions • Single-phase full-wave drive with BTL output (BTL amplifier gain = 43dB) • Speed control gain adjusted by SET pin • Constant-voltage output pin for Hall bias (VREG = 1.05V typ) • FG output pin (open collector output) • Lock protection and auto return circuits built-in • Built-in thermal protection circuit Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Supply voltage Symbol Conditions VCC max Output current IOUT max1 During steady state IOUT max2 During lock protection Ratings Unit 7 V 0.7 A 1 A V Output withstand voltage VOUT max 7 FG output withstand VFG max 7 V FG output current IFG max 5 mA REG output current IREG max 10 mA Allowable dissipation Pd max1 Independent IC 0.2 W Pd max2 With specified substrate * 0.4 W +150 °C Junction temperature Tj max Operating temperature Topr -30 to +95 °C Storage temperature Tstg -55 to +150 °C * Specified substrate : 20mm × 10mm × 0.8mm, Paper phenol Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 80509 SY PC 20090701-S00001 No.A1525-1/8 LV8064TT Recommended Operating Conditions at Ta = 25°C Parameter Symbol Supply voltage VCC Common-phase input voltage range of VICM Conditions Ratings Unit 2.2 to 6.0 V 0.3 to VCC-1.5 V 0.3 to VREG V Hall input SET pin input voltage range VSETIN Electrical Characteristics at Ta = 25°C, VCC = 5V, unless especially speified. Parameter Symbol Ratings Conditions min Circuit current ICC REG pin output voltage VREG Hall input bias current IHIN Output On voltage VO Hall amplifier input offset voltage VINOFS When IREG = 5mA Unit typ 0.9 IO = 250mA, source + sink max 3 5 1.05 1.2 V 1 μA 0.44 0.54 -10 mA V 10 40 mV Hall amplifier voltage gain GH CPWM pin charge current ICPC VSET = 0.5V 4.5 43 8 dB μA CPWM pin discharge current ICPD VSET = 0.5V 4.5 8 μA CPWM pin charge/discharge current ratio ICPRTO ICPRTO = ICPC/ICPD 0.7 1 1.2 CPWM pin high voltage VCPH 1.3 1.5 CPWM pin oscillation amplitude VCPA VSET = 0.5V 0.4 0.5 0.6 V SET pin input bias current ISET 1 μA V FG output pin low voltag VFG IFG = 3mA 0.3 V FG output pin leakage current IFGL VFG = 5V 10 μA FG comparator hysteresis width ΔVFG mV Output on time during lock protection TACT Output off time during lock protection TDET Lock protection on/off ratio TRTO TRTO = TDET/TACT Thermal shutdown operating temperature TSD Design guarantee * 180 °C Thermal shutdown hysteresis width ΔTSD Design guarantee * 40 °C ±5 ±15 ±20 VSET = 0.5V, CPWM = 100pF 0.3 0.5 0.65 sec VSET = 0.5V, CPWM = 100pF 3.0 5 6.5 sec 8 10 11 * Design guaranteed value (No measurement is performed.) Package Dimensions unit : mm (typ) 3375 Pd max -- Ta 0.5 0.5 3.0 4.9 1 2 0.125 0.5 0.4 Specified board (20 × 10 × 0.8mm3, paper phenol) 0.3 0.2 Independent IC 0.18 0.1 0.09 1.1 MAX (0.85) 0.2 0 --30 --20 0 20 40 60 80 100 120 Ambient temperature, Ta -- °C 0.08 (0.25) Ambient temperature, Ta -- °C 3.0 12 SANYO : MSOP12(150mil) No.A1525-2/8 LV8064TT Pin Assignment IN1 1 12 CPWM REG 2 11 SET IN2 3 10 FG SGND 4 9 SVCC PGND 5 8 PVCC OUT1 6 7 OUT2 Top view Block Diagram LOCK DETECTION TSD IN1 1 12 CPWM ENABLE OSC & DUTY CONTROL REG 2 REGULATOR 11 SET IN2 3 LEVEL SHIFT 10 FG CONTROL 9 SVCC PGND 5 8 PVCC OUT1 6 7 OUT2 + - 4 + SGND No.A1525-3/8 LV8064TT Pin Description Pin No. 1 Pin name Pin voltage IN1 Description Equivalent circuit Hall input pin (+) 1 3 IN2 - Hall input pin (-) 3 2 REG 1.05V (typ) Hall bias output pin 2 4 SGND 5 PGND 6 OUT1 7 OUT2 8 SVCC 9 PVCC 10 FG Signal GND 0V - Power GND 6 Motor drive output pin 7 Signal power source 2.2V to 6.0V - Power source FG pulse output pin 10 11 SET 0.3V to VREG PWM voltage control pin 11 12 CPWM - PWM oscillator capacitor connection pin 12 No.A1525-4/8 LV8064TT Timing Chart When motor is steady-state rotation VCC VTH (Internal) HYS HYS CPWM PWM (Internal) Missing PWM pulses Missing PWM pulses (No missing PWM pulse) HYS IN1-IN2 (No missing PWM pulse) HYS OUT1 Min. duty width Min. duty interval OUT2 FG * VTH = 0.5V+VCC/6 (typ) * Check for the presence or absence of PWM pulses at intervals of 1/2 FG period, and if there are missing pulses, immediately turn off the PWM pulse output. If there are no missing pulses at 1/2 FG period intervals, restart generating PWM pulses at the next interval. *Truth Table When Steady Rotation IN1 IN2 H L L H *PWM OUT1 OUT2 H H L L L L H L H FG Mode During rotation - drive L L L L During rotation - regeneration During rotation - drive OFF During rotation - regeneration * IC's internal signal No.A1525-5/8 LV8064TT When motor is locked Motor locked Motor rerotated IN1-IN2 OUT1 OUT2 FG FG detected TACT ( = 0.5S (typ)) TACT ( = 5S (typ)) Wait for FG pulses Motor lock protection Restart * When motor protection is activated, both OUT1 and OUT2 output low level. No.A1525-6/8 LV8064TT Application Circuit Example *5 *3 *4 1 IN1 *2 R2 R1 H *6 CPWM 12 2 REG SET 11 3 IN2 R3 FG 10 4 SGND SVCC 9 5 PGND PVCC 8 6 OUT1 OUT2 7 *1 M *1 Capacitors with capacitances adequate to tabilize the power-supply voltage must be inserted between the PVCC pin and PGND pin and between the SVCC pin and SGND pin as close as possible to each pin. An excessive increase of the power supply voltage due to the regeneration current of the motor can cause a fatal damage to the IC. Be sure to use a zener diode if such a condition is likely to occur. *2 The REG pin outputs a constant voltage of 1.05V (typ). Stable Hall output of excellent temperature characteristics is obtained by providing a bias to the Hall element from the REG pin. Insert R1 when adjusting the Hall amplitude. When this pin is not to be used, pull it down to GND with a resistor of 1k to 10kΩ. *3 Insert a capacitor of an adequate capacitance between the REG pin and GND pin to stabilize the Hall signal and SET pin input voltage. When the wiring from the Hall output to the Hall input is long, noise may be carried through the wiring. Insert a capacitor close to the IN1 and IN2 pins as shown in the figure. *4 A capacitor for PWM oscillation. A 120pF capacitor provides an oscillation frequency of approx. 33kHz (typ). *5 Must be held open when this pin is not to be used. *6 The SET pin is used to determine the amplitude of the triangle waves generated at the CPWM pin. The same voltage level input to this pin determines the amplitude of the triangle wave. To make the amplitude of the triangle waves constant regardless of possible power voltage fluctuations, apply to the SET pin the register-divided voltage from the REG pin as shown in the figure. No.A1525-7/8 LV8064TT SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of August, 2009. Specifications and information herein are subject to change without notice. PS No.A1525-8/8