STMICROELECTRONICS STTS2002B2DN3E

STTS2002
2.3 V memory module temperature sensor
with a 2 Kb SPD EEPROM
Data brief
Features
■
STTS2002 is a 2.3 V memory module
temperature sensor with 2 Kb SPD EEPROM
forward compatible with JEDEC standard TSE
2002a2 and backward compatible with
STTS424E02
■
Operating temperature range:
– –40 °C to +125 °C
■
Single supply voltage: 2.3 V to 3.6 V
■
2 mm x 3 mm TDFN8, height: 0.80 mm (max)(a)
■
RoHS compliant, halogen-free
TDFN8 (DN)(a)
2 mm x 3 mm (max height 0.80 mm)
Temperature sensor
2 Kb SPD EEPROM
■
■
Functionality identical to ST’s M34E02 SPD
EEPROM
■
Permanent and reversible software data
protection for the lower 128 bytes
■
Byte and page write (up to 16 bytes)
■
Self-time WRITE cycle (5 ms, max)
■
Automatic address incrementing
■
Temperature sensor resolution:
programmable (9-12 bits)
0.25 °C (typ)/LSB - (10-bit) default
Temperature sensor accuracy (max):
– ± 1 °C from +75 °C to +95 °C
– ± 2 °C from +40 °C to +125 °C
– ± 3 °C from –40 °C to +125 °C
■
ADC conversion time: 125 ms (max) at default
resolution (10-bit)
■
Typical operating supply current: 160 µA
(EEPROM standby)
■
■
Two-wire bus
■
Temperature hysteresis selectable set points
from: 0, 1.5, 3, 6.0 °C
Two-wire SMBus/I2C - compatible serial
interface
■
Supports up to 400 kHz transfer rate
Supports SMBus timeout 25 ms - 35 ms
■
Does not initiate clock stretching
a. Compliant to JEDEC MO-229, WCED-3
March 2010
Doc ID 17216 Rev 1
For further information contact your local STMicroelectronics sales office.
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Description
1
STTS2002
Description
The STTS2002 is targeted for DIMM modules in mobile personal computing platforms
(laptops), servers and other industrial applications. The thermal sensor (TS) in the
STTS2002 is compliant with the JEDEC specification TSE2002a2, which defines memory
module thermal sensors requirements for mobile platforms. The 2 Kbit serial presence
detect (SPD) I2C-compatible electrically erasable programmable memory (EEPROM) in the
STTS2002 is organized as 256 x8 bits and is functionally identical to the industry standard
M34E02.
The TS-SPD EEPROM combination provides space as well as cost savings for mobile and
server platform dual inline memory modules (DIMM) manufacturers, as it is packaged in the
compact 2 mm x 3 mm 8-lead TDFN package with a thinner maximum height of 0.80 mm.
The DN package is compliant to JEDEC MO-229, variation WCED-3.
The digital temperature sensor has a programmable 9-12 bit analog-to-digital converter
(ADC) which monitors and digitizes the temperature to a resolution of up to 0.0625 °C. The
default resolution is 0.25 °C/LSB (10-bit). The typical accuracies over these temperature
ranges are:
●
±2 °C over the full temperature measurement range of –40 °C to 125 °C
●
±1 °C in the +40 °C to +125 °C active temperature range, and
●
±0.5 °C in the +75 °C to +95 °C monitor temperature range
The temperature sensor in the STTS2002 is specified for operating at supply voltages from
2.3 V to 3.6 V. Operating at 3.3 V, the typical supply current is 160 µA (includes SMBus
communication current).
The on-board sigma delta ADC converts the measured temperature to a digital value that is
calibrated in °C. For Fahrenheit applications, a lookup table or conversion routine is
required. The STTS2002 is factory-calibrated and requires no external components to
measure temperature.
The digital temperature sensor component has user-programmable registers that provide
the capabilities for DIMM temperature-sensing applications. The open drain event output pin
is active when the monitoring temperature exceeds a programmable limit, or it falls above or
below an alarm window. The user has the option to set the event output as a critical
temperature output. This pin can be configured to operate in either a comparator mode for
thermostat operation or in interrupt mode.
The 2 Kbit serial EEPROM memory in the STTS2002 has the ability to permanently lock the
data in its first half (upper) 128 bytes (locations 00h to 7Fh). This feature has been designed
specifically for use in DRAM DIMMs with SPD. All of the information concerning the DRAM
module configuration (e.g. access speed, size, and organization) can be kept write
protected in the first half of the memory. The second half (lower) 128 bytes of the memory
can be write protected using two different software write protection mechanisms.
By sending the device a specific sequence, the first 128 bytes of the memory become write
protected: permanently or resettable. In the STTS2002 the write protection of the memory
array is dependent on whether the software protection has been set.
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Doc ID 17216 Rev 1
STTS2002
Description
Figure 1.
Logic diagram
VDD
SDA(1)
EVENT(1)
SCL
A2
A1
A0
STTS2002
VSS
AI12261
1. SDA and EVENT are open drain.
Table 1.
Signal names
Pin
Symbol
Description
Direction
1
A0
Serial bus address selection pin. Can be tied to VSS or VDD.
Input
2
A1
Serial bus address selection pin. Can be tied to VSS or VDD.
Input
3
A2
Serial bus address selection pin. Can be tied to VSS or VDD.
Input
4
VSS
Supply ground
5
SDA(1)
Serial data
Input/output
6
SCL
Serial clock
Input
7
EVENT(1)
Event output pin. Open drain and active-low.
Output
8
VDD
Supply power (2.3 V to 3.6 V)
1. SDA and EVENT are open drain.
Figure 2.
TDFN8 connections (top view)
A0
A1
A2
GND
1
2
3
4
8
7
6
5
VDD
EVENT(1)
SCL
SDA(1)
AI12262
1. SDA and EVENT are open drain.
Doc ID 17216 Rev 1
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Description
Figure 3.
STTS2002
Block diagram
8
VDD
2 Kb SPD EEPROM
Temperature
Sensor
Logic Control
Comparator
Timing
EVENT
7
ADC
Standard array
(80h - FFh)
Capability
Register
Configuration
Register
Temperature
Register
Software
write-protected array
(00h - 7Fh)
Address Pointer
Register
Upper
Register
Lower
Register
Critical
Register
Manufacturer
ID
Device ID/
Revision
1
2
3
SCL
A0
A1
A2
6
SMBus/I2C
Interface
SDA
5
VSS
4
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Doc ID 17216 Rev 1
AI12278a
STTS2002
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Temperature sensor registers
Temperature sensor registers
The temperature sensor component is comprised of various user-programmable registers.
These registers are required to write their corresponding addresses to the pointer register.
They can be accessed by writing to their respective addresses (see Table 2). Pointer
register bits 7 - 4 must always be written to '0'. This must be maintained, as not setting these
bits to '0' may keep the device from performing to specifications.
The main registers include the :
●
Capability register (read-only)
●
Configuration register (read/write)
●
Temperature register (read-only)
●
Temperature trip point registers (read/write), including
–
Alarm temperature upper boundary
–
Alarm temperature lower boundary and
–
Critical temperature
●
Manufacturer’s ID register (read-only)
●
Device ID and device revision ID register (read-only)
●
Temperature resolution register (TRES) (read/write)
Table 2.
Temperature sensor registers summary
Address (hex)
Not applicable
Register name
Power-on default
Address pointer
Undefined
00
Capability
B-grade
0x006F
01
Configuration
0x0000
02
Alarm temperature upper boundary trip
0x0000
03
Alarm temperature lower boundary trip
0x0000
04
Critical temperature trip
0x0000
05
Temperature
06
Manufacturer’s ID
0x104A
07
Device ID/revision
0x0300
08
Temperature resolution register
0x0001
Undefined
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Part numbering
3
STTS2002
Part numbering
Table 3.
Ordering information scheme
Example:
STTS2002
B
2
DN
3
F
Device type
STTS2002
Accuracy grade
B: Maximum accuracy 75 °C to 95 °C = ± 1 °C
Voltage (minimum)
2 = 2.3 V - 3.6 V part
Package
DN = TDFN8 (0.80 mm max height)
Temperature
3 = –40 °C to 125 °C
Shipping method
F = ECOPACK® package, tape & reel packing
E = ECOPACK® package, tube packing
For other options, or for more information on any aspect of this device, please contact the
ST sales office nearest you.
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STTS2002
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Package marking information
Package marking information
Figure 4.
DN package topside marking information (TDFN8)
(1)
B2DN
(2)
TSE2
(3)
PYWW
ai13907b
1. Temperature grade and package
B = B-grade, stacked
2 = Minimum operating voltage of 2.3 V
DN = 0.80 mm TDFN package
2. Device name
TSE2 = STTS2002
3. Traceability codes
P = 2nd digit of plant code
Y = Year
WW = Work Week
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Revision history
5
STTS2002
Revision history
Table 4.
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Document revision history
Date
Revision
03-Mar-2010
1
Changes
Initial release.
Doc ID 17216 Rev 1
STTS2002
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