STV270N4F3 N-channel 40 V, 1.25 mΩ, 270 A, PowerSO-10 STripFET™ Power MOSFET Features Type VDSS RDS(on) max ID (1) STV270N4F3 40 V < 1.5 mΩ 270 A 10 1. Current limited by package 1 PowerSO-10 ■ Conduction losses reduced ■ Low profile, very low parasitic inductance Applications ■ Switching application Figure 1. Description Internal schematic diagram and connection diagram (top view) This n-channel enhancement mode Power MOSFET is the latest refinement of STMicroelectronics' unique “single feature size“ strip-based process, which has decreased the critical alignment steps, offering remarkable manufacturing reproducibility. The outcome is a transistor with extremely high packing density for low on resistance, rugged avalanche characteristics and low gate charge. Table 1. Device summary Order code Marking Package Packaging STV270N4F3 270N4F3 PowerSO-10 Tape and reel October 2008 Rev 3 1/12 www.st.com 12 Contents STV270N4F3 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics .................................... 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 .............................................. 8 STV270N4F3 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit 40 V VDS Drain-source voltage (vgs = 0) VGS Gate-source voltage ± 20 V ID (1) Drain current (continuous) at TC = 25 °C 270 A ID Drain current (continuous) at TC = 100 °C 220 A Drain current (pulsed) 1080 A Total dissipation at TC = 25 °C 300 W 2 W/°C 1000 mJ -55 to 175 °C Value Unit 0.5 °C/W 50 °C/W IDM (1) PTOT (2) Derating factor EAS (3) Tstg Tj Single pulse avalanche energy Storage temperature Operating junction temperature 1. Current limited by package 2. This value is rated according to Rthj-c 3. Starting Tj = 25 °C, ID = 80 A, VDD = 32 V Table 3. Symbol Rthj-case Thermal data Parameter Thermal resistance junction-case max Rthj-pcb (1) Thermal resistance junction-pcb max 1. When mounted on 1 inch2 FR-4 2 oz Cu. 3/12 Electrical characteristics 2 STV270N4F3 Electrical characteristics (Tcase =25°C unless otherwise specified) Table 4. Symbol V(BR)DSS Drain-source breakdown voltage Test conditions ID = 250 µA, VGS= 0 Min. Typ. Max. 40 Unit V VDS = Max rating, Zero gate voltage drain current (VGS = 0) VDS = Max rating, Tc=125 °C 10 100 µA µA IGSS Gate body leakage current (VDS = 0) ±200 nA 4 V 1.25 1.5 mΩ Typ. Max. Unit VDS = ± 20 V VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA RDS(on) Static drain-source on resistance Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd 4/12 Parameter IDSS Table 5. 1. On /off states 2 VGS= 10 V, ID= 80 A Dynamic Parameter Test conditions Min. Forward transconductance VDS = 10 V, ID= 100 A 200 S Input capacitance Output capacitance Reverse transfer capacitance VDS = 25 V, f = 1 MHz, VGS =0 7500 1900 50 pF pF pF Total gate charge Gate-source charge Gate-drain charge VDD= 20 V, ID= 160 A, VGS= 10 V (see Figure 14) Pulsed: Pulse duration = 300 µs, duty cycle 1.5% 110 30 25 150 nC nC nC STV270N4F3 Electrical characteristics Table 6. Switching times Symbol Parameter td(on) tr td(off) tf Table 7. Turn-on delay time Rise time Turn-off delay time Fall time Parameter ISD Source-drain current Source-drain current (pulsed) ISD VSD (2) trr Qrr IRRM Min. VDD = 20 V, ID = 80 A RG= 4.7 Ω, VGS= 10 V (see Figure 13) VDD = 20 V, ID = 80 A RG= 4.7 Ω, VGS= 10 V, (see Figure 13) Typ. Max Unit 25 180 ns ns 110 45 ns ns Source drain diode Symbol (1) Test conditions Test conditions Forward on voltage ISD = 80 A, VGS = 0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 160 A,di/dt = 100 A/µs VDD = 32 V, Tj = 150 °C (see Figure 15) Min. Typ. 70 225 3.2 Max. Unit 270 1080 A A 1.3 V ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% 5/12 Electrical characteristics STV270N4F3 2.1 Electrical characteristics Figure 2. Safe operating area Thermal impedance Figure 5. Transfer characteristics AM01500v1 ID (A) Tj=175°C Tc=25°C Single pulse a is are n) his ds(o t n ni xR tio Ma era d by p O ite lim 3 10 102 10 Figure 3. 100µs 1ms 10ms 1 10 0 10-1 10-1 Figure 4. 10 0 10 1 VDS(V) Output characteristics AM01502v1 ID(A) 450 VGS=10V 400 350 350 300 300 250 250 200 200 150 150 0 Figure 6. 2 6 4 50 VDS(V) Static drain-source on resistance AM01501v1 RDS(on) (mΩ) VGS ≥10V TC=25°C 1.40 1.30 1.20 1.10 1.00 0 TC=25°C 100 4V 50 0 VDS=5V 400 5V 100 6/12 AM01503v1 ID(A) 450 20 40 60 80 ID(A) 0 Figure 7. 0 2 4 6 8 VGS(V) Normalized BVDSS vs temperature STV270N4F3 Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. Figure 10. Normalized gate threshold voltage vs temperature Capacitance variations Figure 11. Normalized on resistance vs temperature Figure 12. Source-drain diode forward characteristics 7/12 Test circuits 3 STV270N4F3 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 µF 2200 RL µF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 µF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100µH S 3.3 µF B 25 Ω 1000 µF D VDD 2200 µF 3.3 µF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 17. Unclamped inductive waveform AM01471v1 Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/12 0 10% AM01473v1 STV270N4F3 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/12 Package mechanical data STV270N4F3 PowerSO-10 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 3.35 3.65 0.132 A1 0.00 0.10 0.000 0.004 B 0.40 0.60 0.016 0.024 C 0.35 0.55 0.013 0.022 D 9.40 9.60 0.370 0.378 D1 7.40 7.60 0.291 e 1.27 0.144 0.300 0.050 E 9.30 9.50 0.366 0.374 E1 7.20 7.40 0.283 0.291 E2 7.20 7.60 0.283 0.300 E3 6.10 6.35 0.240 0.250 E4 5.90 6.10 0.232 0.240 F 1.25 1.35 0.049 0.053 h 0.50 0.002 H 13.80 14.40 0.543 L 1.20 1.80 0.047 q 1.70 0.071 0.067 0o α 0.567 8o B 0.10 A B 10 = = E4 = = E1 = E3 = E2 = E = = = H 6 = = 1 5 B e 0.25 SEATING PLANE DETAIL "A" A C M Q h D = D1 = = = SEATING PLANE A F A1 A1 L DETAIL "A" α 0068039-C 10/12 STV270N4F3 5 Revision history Revision history Table 8. Document revision history Date Revision Changes 25-Oct-2007 1 initial release 03-Apr-2008 2 ID value has been updated. 01-Oct-2008 3 Document status promoted from preliminary data to datasheet 11/12 STV270N4F3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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