TI SN74HCU04N

 SCLS079E − MARCH 1984 − REVISED MARCH 2004
D Wide Operating Voltage Range of 2 V to 6 V
D Outputs Can Drive Up To 10 LSTTL Loads
D Low Power Consumption, 20-µA Max ICC
D
D
D
D
Typical tpd = 7 ns
±4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Unbuffered Outputs
SN54HCU04 . . . J OR W PACKAGE
SN74HCU04 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1
14
2
13
3
12
4
11
5
10
6
9
7
8
1Y
1A
NC
VCC
6A
VCC
6A
6Y
5A
5Y
4A
4Y
2A
NC
2Y
NC
3A
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
6Y
NC
5A
NC
5Y
3Y
GND
NC
4Y
4A
1A
1Y
2A
2Y
3A
3Y
GND
SN54HCU04 . . . FK PACKAGE
(TOP VIEW)
NC − No internal connection
description/ordering information
The ’HCU04 devices contain six independent inverters. They perform the Boolean function Y = A in positive
logic.
ORDERING INFORMATION
PACKAGE†
TA
PDIP − N
SN74HCU04N
Tube of 50
SN74HCU04D
Reel of 2500
SN74HCU04DR
Reel of 250
SN74HCU04DT
SOP − NS
Reel of 2000
SN74HCU04NSR
HCU04
SSOP − DB
Reel of 2000
SN74HCU04DBR
HU04
Reel of 90
SN74HCU04PW
Reel of 2000
SN74HCU04PWR
Reel of 250
SN74HCU04PWT
CDIP − J
Tube of 25
SNJ54HCU04J
SNJ54HCU04J
CFP − W
Tube of 150
SNJ54HCU04W
SNJ54HCU04W
LCCC − FK
Tube of 55
SNJ54HCU04FK
TSSOP − PW
−55°C
−55
C to 125
125°C
C
TOP-SIDE
MARKING
Tube of 25
SOIC − D
−40°C
−40
C to 85
85°C
C
ORDERABLE
PART NUMBER
SN74HCU04N
HCU04
HCU04
SNJ54HCU04FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2004, Texas Instruments Incorporated
! "#$ %!&
% "! "! '! ! !( !
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!+ $$ "!!&
"% "$ ,-./.010 $$ "!! ! !!%
$! '!)! !%& $$ '! "% "%
"!+ %! !!$* $%! !+ $$ "!!&
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCLS079E − MARCH 1984 − REVISED MARCH 2004
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
logic diagram (positive logic)
A
Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HCU04
VCC
VIH
VIL
VI
VO
Supply voltage
High-level input voltage
Low-level input voltage
SN74HCU04
MIN
NOM
MAX
2
5
6
MIN
NOM
MAX
2
5
6
VCC = 2 V
VCC = 4.5 V
1.7
1.7
3.6
3.6
VCC = 6 V
VCC = 2 V
4.8
4.8
VCC = 4.5 V
VCC = 6 V
Input voltage
0
Output voltage
0
0.5
0.5
1.35
1.8
1.8
0
0
V
V
1.35
VCC
VCC
UNIT
VCC
VCC
V
V
V
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCLS079E − MARCH 1984 − REVISED MARCH 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −20 µA
VOH
VI = VCC or GND
IOH = −4 mA
IOH = −5.2 mA
IOL = 20 µA
VOL
VI = VCC or GND
IOL = 4 mA
IOL = 5.2 mA
II
ICC
VI = VCC or 0
VI = VCC or 0,
IO = 0
TA = 25°C
TYP
MAX
SN74HCU04
MIN
2V
1.8
1.8
4
4
4
6V
5.5
5.5
5.5
4.5 V
3.98
3.7
3.84
6V
5.48
4.5 V
MIN
MAX
MIN
MAX
UNIT
1.8
5.2
V
5.34
2V
0.2
0.2
0.2
4.5 V
0.5
0.5
0.5
6V
0.5
0.5
0.5
4.5 V
0.26
0.4
0.33
6V
0.26
0.4
0.33
6V
±100
±1000
±1000
nA
2
40
20
µA
10
10
10
pF
6V
Ci
SN54HCU04
VCC
2 V to 6 V
3
V
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
TA = 25°C
TYP
MAX
SN54HCU04
SN74HCU04
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
2V
40
80
120
100
tpd
A
Y
4.5 V
8
16
24
20
6V
7
14
20
17
tf
Y
MIN
MIN
MAX
MIN
MAX
2V
38
75
110
95
4.5 V
8
15
22
19
6V
6
13
19
16
UNIT
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance per inverter
POST OFFICE BOX 655303
No load
• DALLAS, TEXAS 75265
TYP
20
UNIT
pF
3
SCLS079E − MARCH 1984 − REVISED MARCH 2004
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
Test
Point
Input
50%
VCC
50%
0V
CL = 50 pF
(see Note A)
tPLH
In-Phase
Output
LOAD CIRCUIT
tPHL
90%
50%
10%
90%
tr †
tPHL
Input
50%
10%
90%
90%
tr
VCC
50%
10% 0 V
tf
Out-of-Phase
Output
90%
VOH
50%
10%
VOL
tf
tPLH
50%
10%
tf
50%
10%
90%
VOH
VOL
tr †
† tr is not applicable to ’HCU devices.
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time, with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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Copyright © 2007, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
86010012A
ACTIVE
LCCC
FK
20
1
TBD
8601001CA
ACTIVE
CDIP
J
14
1
TBD
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
SN54HCU04J
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
SN74HCU04D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DBR
ACTIVE
SSOP
DB
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DBRE4
ACTIVE
SSOP
DB
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DBRG4
ACTIVE
SSOP
DB
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DT
ACTIVE
SOIC
D
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DTE4
ACTIVE
SOIC
D
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04DTG4
ACTIVE
SOIC
D
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TBD
Call TI
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74HCU04N3
OBSOLETE
PDIP
N
14
SN74HCU04NE4
ACTIVE
PDIP
N
14
SN74HCU04NSR
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04NSRE4
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04NSRG4
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04PW
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04PWE4
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04PWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04PWR
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04PWRE4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04PWRG4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
CU NIPDAU
Level-1-260C-UNLIM
Addendum-Page 1
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74HCU04PWT
ACTIVE
TSSOP
PW
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04PWTE4
ACTIVE
TSSOP
PW
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HCU04PWTG4
ACTIVE
TSSOP
PW
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SNJ54HCU04FK
ACTIVE
LCCC
FK
20
1
TBD
SNJ54HCU04J
ACTIVE
CDIP
J
14
1
TBD
Lead/Ball Finish
MSL Peak Temp (3)
no Sb/Br)
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Sep-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74HCU04DBR
DB
14
SITE 41
330
16
8.2
6.6
2.5
12
16
Q1
SN74HCU04DR
D
14
SITE 27
330
16
6.5
9.0
2.1
8
16
Q1
SN74HCU04DR
D
14
SITE 41
330
16
6.5
9.0
2.1
8
16
Q1
SN74HCU04NSR
NS
14
SITE 41
330
16
8.2
10.5
2.5
12
16
Q1
SN74HCU04PWR
PW
14
SITE 41
330
12
7.0
5.6
1.6
8
12
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Sep-2007
Device
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
SN74HCU04DBR
DB
14
SITE 41
346.0
346.0
0.0
SN74HCU04DR
D
14
SITE 27
342.9
336.6
0.0
SN74HCU04DR
D
14
SITE 41
346.0
346.0
0.0
SN74HCU04NSR
NS
14
SITE 41
346.0
346.0
0.0
SN74HCU04PWR
PW
14
SITE 41
346.0
346.0
0.0
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265