MICROCHIP MCP6042

MCP6041/2/3/4
600 nA, Rail-to-Rail Input/Output Op Amps
Features
Description
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The MCP6041/2/3/4 family of operational amplifiers
(op amps) from Microchip Technology Inc. operate with
a single supply voltage as low as 1.4V, while drawing
less than 1 µA (maximum) of quiescent current per
amplifier. These devices are also designed to support
rail-to-rail input and output operation. This combination
of features supports battery-powered and portable
applications.
Low Quiescent Current: 600 nA/amplifier (typical)
Rail-to-Rail Input/Output
Gain Bandwidth Product: 14 kHz (typical)
Wide Supply Voltage Range: 1.4V to 6.0V
Unity Gain Stable
Available in Single, Dual, and Quad
Chip Select (CS) with MCP6043
Available in 5-lead and 6-lead SOT-23 Packages
Temperature Ranges:
- Industrial: -40°C to +85°C
- Extended: -40°C to +125°C
Applications
•
•
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The MCP6041/2/3/4 family operational amplifiers are
offered in single (MCP6041), single with Chip Select
(CS) (MCP6043), dual (MCP6042), and quad
(MCP6044) configurations. The MCP6041 device is
available in the 5-lead SOT-23 package, and the
MCP6043 device is available in the 6-lead SOT-23
package.
Toll Booth Tags
Wearable Products
Temperature Measurement
Battery Powered
Design Aids
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The MCP6041/2/3/4 amplifiers have a gain-bandwidth
product of 14 kHz (typical) and are unity gain stable.
These specifications make these op amps appropriate
for low frequency applications, such as battery current
monitoring and sensor conditioning.
Package Types
SPICE Macro Models
FilterLab® Software
Mindi™ Circuit Designer & Simulator
MAPS (Microchip Advanced Part Selector)
Analog Demonstration and Evaluation Boards
Application Notes
Related Devices
MCP6041
PDIP, SOIC, MSOP
NC 1
VIN– 2
VIN+ 3
VSS 4
VOUT 1
Typical Application
1.4V
to
6.0V
VDD
5 NC
VSS 2
VIN+ 3
5 VDD
VOUT
MCP604X
1 MΩ
V DD – V OUT
I DD = ----------------------------------------( 10 V/V ) ⋅ ( 10 Ω )
NC 1
8 CS
VIN– 2
7 VDD
VIN+ 3
6 VOUT
VSS 4
4 VIN–
5 NC
MCP6043
SOT-23-6
VOUT 1
VSS 2
MCP6042
PDIP, SOIC, MSOP
10Ω
100 kΩ
7 VDD
6 VOUT
MCP6041
SOT-23-5
• MCP6141/2/3/4: G = +10 Stable Op Amps
IDD
8 NC
MCP6043
PDIP, SOIC, MSOP
VIN+ 3
6 VDD
5 CS
4 VIN–
MCP6044
PDIP, SOIC, TSSOP
VOUTA 1
8 VDD
VOUTA 1
14 VOUTD
VINA– 2
VINA+ 3
7 VOUTB VINA– 2
6 VINB– VINA+ 3
13 VIND–
12 VIND+
VSS 4
5 VINB+
VDD 4
VINB+ 5
11 VSS
VINB– 6
10 VINC+
9 VINC–
VOUTB 7
8 VOUTC
High Side Battery Current Sensor
© 2008 Microchip Technology Inc.
DS21669C-page 1
MCP6041/2/3/4
1.0
ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
Absolute Maximum Ratings †
VDD – VSS ........................................................................7.0V
Current at Input Pins .....................................................±2 mA
Analog Inputs (VIN+, VIN–) ............. VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs .......... VSS – 0.3V to VDD + 0.3V
Difference Input voltage ...................................... |VDD – VSS|
Output Short Circuit Current ..................................continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature....................................–65°C to +150°C
Junction Temperature.................................................. +150°C
ESD protection on all pins (HBM; MM) ................ ≥ 4 kV; 200V
†† See Section 4.1 “Rail-to-Rail Input”
DC ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.4V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, and RL = 1 MΩ to VL (refer to Figure 1-2 and Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input Offset
VOS
-3
—
+3
mV
ΔVOS/ΔTA
—
±2
—
µV/°C
VCM = VSS, TA= -40°C to +85°C
ΔVOS/ΔTA
—
±15
—
µV/°C
VCM = VSS,
TA= +85°C to +125°C
PSRR
70
85
—
dB
IB
—
1
—
pA
Industrial Temperature
IB
—
20
100
pA
TA = +85°
Extended Temperature
IB
—
1200
5000
pA
TA = +125°
Input Offset Current
IOS
—
1
—
pA
Common Mode Input Impedance
ZCM
—
1013||6
—
Ω||pF
Differential Input Impedance
ZDIFF
—
1013||6
—
Ω||pF
Common-Mode Input Range
VCMR
VSS−0.3
—
VDD+0.3
V
Common-Mode Rejection Ratio
CMRR
62
80
—
dB
VDD = 5V, VCM = -0.3V to 5.3V
CMRR
60
75
—
dB
VDD = 5V, VCM = 2.5V to 5.3V
CMRR
60
80
—
dB
VDD = 5V, VCM = -0.3V to 2.5V
AOL
95
115
—
dB
RL = 50 kΩ to VL,
VOUT = 0.1V to VDD−0.1V
VOL, VOH
VSS + 10
—
VDD − 10
mV
RL = 50 kΩ to VL,
0.5V input overdrive
VOVR
VSS + 100
—
VDD − 100
mV
RL = 50 kΩ to VL,
AOL ≥ 95 dB
ISC
—
2
—
mA
VDD = 1.4V
ISC
—
20
—
mA
VDD = 5.5V
VDD
1.4
—
6.0
V
(Note 1)
IQ
0.3
0.6
1.0
µA
IO = 0
Input Offset Voltage
Drift with Temperature
Power Supply Rejection
VCM = VSS
VCM = VSS
Input Bias Current and Impedance
Input Bias Current
Common Mode
Open-Loop Gain
DC Open-Loop Gain (large signal)
Output
Maximum Output Voltage Swing
Linear Region Output Voltage Swing
Output Short Circuit Current
Power Supply
Supply Voltage
Quiescent Current per Amplifier
Note 1:
All parts with date codes November 2007 and later have been screened to ensure operation at VDD = 6.0V. However,
the other minimum and maximum specifications are measured at 1.4V and/or 5.5V.
DS21669C-page 2
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
AC ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.4V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, RL = 1 MΩ to VL, and CL = 60 pF (refer to Figure 1-2 and Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
GBWP
—
14
—
kHz
Slew Rate
SR
—
3.0
—
V/ms
Phase Margin
PM
—
65
—
°
Input Voltage Noise
Eni
—
5.0
—
Input Voltage Noise Density
eni
—
170
—
nV/√Hz f = 1 kHz
Input Current Noise Density
ini
—
0.6
—
fA/√Hz f = 1 kHz
G = +1 V/V
Noise
µVP-P
f = 0.1 Hz to 10 Hz
MCP6043 CHIP SELECT (CS) ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.4V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, RL = 1 MΩ to VL, and CL = 60 pF (refer to Figure 1-2 and Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
CS Logic Threshold, Low
VIL
VSS
—
VSS+0.3
V
CS Input Current, Low
ICSL
—
5
—
pA
CS Logic Threshold, High
VIH
VDD–0.3
—
VDD
V
CS Input Current, High
ICSH
—
5
—
pA
CS = VDD
ISS
—
-20
—
pA
CS = VDD
IOLEAK
—
20
—
pA
CS = VDD
CS Low to Amplifier Output Turn-on Time
tON
—
2
50
ms
G = +1V/V, CS = 0.3V to
VOUT = 0.9VDD/2
CS High to Amplifier Output High-Z
tOFF
—
10
—
µs
G = +1V/V, CS = VDD–0.3V to
VOUT = 0.1VDD/2
VHYST
—
0.6
—
V
VDD = 5.0V
CS Low Specifications
CS = VSS
CS High Specifications
CS Input High, GND Current
Amplifier Output Leakage, CS High
Dynamic Specifications
Hysteresis
VIL
CS
VIH
tOFF
tON
VOUT
High-Z
High-Z
ISS
-20 pA
(typical)
ICS
5 pA
(typical)
-0.6 µA
(typical)
-20 pA
(typical)
FIGURE 1-1:
Chip Select (CS) Timing
Diagram (MCP6043 only).
© 2008 Microchip Technology Inc.
DS21669C-page 3
MCP6041/2/3/4
TEMPERATURE CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.4V to +5.5V, VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Specified Temperature Range
TA
-40
—
+85
°C
Industrial Temperature parts
TA
-40
—
+125
°C
Extended Temperature parts
Operating Temperature Range
TA
-40
—
+125
°C
(Note 1)
Storage Temperature Range
TA
-65
—
+150
°C
Temperature Ranges
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23
θJA
—
256
—
°C/W
Thermal Resistance, 6L-SOT-23
θJA
—
230
—
°C/W
Thermal Resistance, 8L-PDIP
θJA
—
85
—
°C/W
Thermal Resistance, 8L-SOIC
θJA
—
163
—
°C/W
Thermal Resistance, 8L-MSOP
θJA
—
206
—
°C/W
Thermal Resistance, 14L-PDIP
θJA
—
70
—
°C/W
Thermal Resistance, 14L-SOIC
θJA
—
120
—
°C/W
Thermal Resistance, 14L-TSSOP
θJA
—
100
—
°C/W
Note 1:
1.1
The MCP6041/2/3/4 family of Industrial Temperature op amps operates over this extended range, but with reduced
performance. In any case, the internal Junction Temperature (TJ) must not exceed the Absolute Maximum specification
of +150°C.
Test Circuits
The test circuits used for the DC and AC tests are
shown in Figure 1-2 and Figure 1-3. The bypass
capacitors are laid out according to the rules discussed
in Section 4.6 “Supply Bypass”.
VDD
VIN
RN
0.1 µF 1 µF
VOUT
MCP604X
CL
VDD/2 RG
RL
RF
VL
FIGURE 1-2:
AC and DC Test Circuit for
Most Non-Inverting Gain Conditions.
VDD
VDD/2
RN
0.1 µF 1 µF
VOUT
MCP604X
CL
VIN
RG
RL
RF
VL
FIGURE 1-3:
AC and DC Test Circuit for
Most Inverting Gain Conditions.
DS21669C-page 4
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein are
not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
18%
-32
1500
VDD = 5.5V
Representative Part
1000
500
0
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
-500
-1000
-1500
6.0
5.5
-2000
5.0
Common Mode Input Voltage (V)
4
FIGURE 2-5:
Input Offset Voltage Drift
with TA = +25°C to +125°C and VDD = 5.5V.
4.5
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-2000
-24 -20 -16 -12 -8
-4
0
Input Offset Voltage Drift (µV/°C)
4.0
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
-28
3.5
0
-0.4
4
239 Samples
1 Representative Lot
TA = +85°C to +125°C
VDD = 5.5V
VCM = VSS
2000
500
-1500
24%
22%
20%
18%
16%
14%
12%
10%
8%
6%
4%
2%
0%
-32
1000
-1000
-24 -20 -16 -12 -8
-4
0
Input Offset Voltage Drift (µV/°C)
3.0
10
VDD = 1.4V
Representative Part
-500
-28
2.5
Input Offset Voltage (µV)
1500
2%
2.0
8
FIGURE 2-2:
Input Offset Voltage Drift
with TA = -40°C to +85°C.
2000
4%
FIGURE 2-4:
Input Offset Voltage Drift
with TA = +85°C to +125°C and VDD = 1.4V.
Input Offset Voltage.
-6 -4 -2
0
2
4
6
Input Offset Voltage Drift (µV/°C)
6%
1.5
-8
8%
0%
3
1124 Samples
TA = -40°C to +85°C
VDD = 1.4V
VCM = VSS
-10
10%
1.0
12%
11%
10%
9%
8%
7%
6%
5%
4%
3%
2%
1%
0%
2
12%
-0.5
Percentage of Occurrences
FIGURE 2-1:
-1
0
1
Input Offset Voltage (mV)
14%
0.5
-2
245 Samples
1 Representative Lot
TA = +85°C to +125°C
VDD = 1.4V
VCM = VSS
16%
0.0
-3
Percentage of Occurrences
1124 Samples
VDD = 1.4V and 5.5V
VCM = VSS
Percentage of Occurrences
10%
9%
8%
7%
6%
5%
4%
3%
2%
1%
0%
Input Offset Voltage (µV)
Percentage of Occurrences
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL, and CL = 60 pF.
Common Mode Input Voltage (V)
FIGURE 2-3:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 1.4V.
© 2008 Microchip Technology Inc.
FIGURE 2-6:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 5.5V.
DS21669C-page 5
MCP6041/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL, and CL = 60 pF.
6
Input, Output Voltages (V)
450
VDD = 1.4V
400
350
VDD = 5.5V
300
250
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output Voltage (V)
FIGURE 2-7:
Output Voltage.
Input Offset Voltage vs.
4
Input Noise Voltage Density
(nV/¥Hz)
VIN
2
1
0
VDD = 5.0V
G = +2 V/V
-1
0
5
Time
10 (5 ms/div)
15
20
25
FIGURE 2-10:
The MCP6041/2/3/4 family
shows no phase reversal.
300
f = 1 kHz
VDD = 5.0V
250
200
150
100
50
FIGURE 2-8:
vs. Frequency.
5.5
5.0
4.5
4.0
3.5
3.0
2.5
Common Mode Input Voltage (V)
Input Noise Voltage Density
90
2.0
1000
1.5
10
100
Frequency (Hz)
1.0
1
-0.5
0.1
0.5
0
100
FIGURE 2-11:
Input Noise Voltage Density
vs. Common Mode Input Voltage.
100
Referred to Input
80
95
PSRR, CMRR (dB)
CMRR, PSRR (dB)
VOUT
3
Input Noise Voltage Density
(nV/—Hz)
1000
5
0.0
Input Offset Voltage (µV)
500
70
60
50
PSRR–
PSRR+
CMRR
40
PSRR
(VCM = VSS)
90
85
80
CMRR
(VDD = 5.0V, VCM = -0.3V to +5.3V)
75
30
20
70
0.1
FIGURE 2-9:
Frequency.
DS21669C-page 6
1
10
Frequency (Hz)
100
CMRR, PSRR vs.
1000
-50
-25
FIGURE 2-12:
Temperature.
0
25
50
75
100
Ambient Temperature (°C)
125
CMRR, PSRR vs. Ambient
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL, and CL = 60 pF.
Input Bias and Offset Currents
(pA)
10000
10k
VDD = 5.5V
VCM = VDD
1k
1000
100
IB
10
| IOS |
1
0.1
0.1
45
55
65
75
85
95 105 115
Ambient Temperature (°C)
125
FIGURE 2-13:
Input Bias, Offset Currents
vs. Ambient Temperature.
-60
Phase
60
-90
40
-120
20
-150
0
-180
120
130
120
110
100
RL = 50 kΩ
VDD = 5.0V
VOUT = 0.1V to VDD - 0.1V
80
1.5
2.0 2.5 3.0 3.5 4.0 4.5
Power Supply Voltage (V)
5.0
5.5
FIGURE 2-15:
DC Open-Loop Gain vs.
Power Supply Voltage.
© 2008 Microchip Technology Inc.
VDD = 5.5V
110
100
VDD = 1.4V
90
80
70
140
DC Open-Loop Gain (dB)
DC Open-Loop Gain (dB)
0.1
0.1
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
1k
10k
1.E+03
1.E+04
Load Resistance (:)
FIGURE 2-17:
Load Resistance.
140
1.0
| IOS |
11
60
100
1.E+02
Open-Loop Gain, Phase vs.
90
TA = +85°C
VOUT = 0.1V to VDD – 0.1V
-20
-210
0.001
0.1 1.E+
1 1.E+
10 1.E+
100 1.E+
1k 10k
1.E- 0.01
1.E- 1.E1.E+ 100k
1.E+
03 02 01 Frequency
00 01 (Hz)
02 03 04 05
FIGURE 2-14:
Frequency.
10
10
130
-30
80
IB
TA = +125°C
100
100
FIGURE 2-16:
Input Bias, Offset Currents
vs. Common Mode Input Voltage.
0
Gain
Open-Loop Phase (°)
Open-Loop Gain (dB)
120
100
VDD = 5.5V
1k
1000
DC Open-Loop Gain (dB)
Input Bias and Offset Currents
(pA)
10k
10000
100k
1.E+05
DC Open-Loop Gain vs.
RL = 50 kȍ
130
120
VDD = 5.5V
110
100
VDD = 1.4V
90
80
0.00
0.05
0.10
0.15
0.20
Output Voltage Headroom;
VDD – VOH or VOL – VSS (V)
0.25
FIGURE 2-18:
DC Open-Loop Gain vs.
Output Voltage Headroom.
DS21669C-page 7
MCP6041/2/3/4
FIGURE 2-19:
Channel-to-Channel
Separation vs. Frequency (MCP6042 and
MCP6044 only).
PM
(G = +1)
14
90
18
80
16
70
12
60
10
50
GBWP
8
40
6
30
4
20
2
10
VDD = 1.4V
0
-50
-25
0
25
50
75 100
Ambient Temperature (°C)
0.7
0.6
0.5
0.4
0.3
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0.2
0.1
0.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
FIGURE 2-21:
Quiescent Current vs.
Power Supply Voltage.
DS21669C-page 8
5.5
5.0
4.5
4.0
12
80
70
60
10
50
GBWP
8
40
6
30
4
20
2
10
VDD = 5.5V
-50
-25
0
25
50
75 100
Ambient Temperature (°C)
0
125
FIGURE 2-23:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature with
VDD = 5.5V.
35
0.8
Quiescent Current
(µA/Amplifier)
14
0
0
125
FIGURE 2-20:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature with
VDD = 1.4V.
90
PM
(G = +1)
Phase Margin (°)
16
Common Mode Input Voltage
FIGURE 2-22:
Gain Bandwidth Product,
Phase Margin vs. Common Mode Input Voltage.
Phase Margin (°)
Gain Bandwidth Product
(kHz)
18
3.5
10k
1.E+04
3.0
1k
1.E+03
Frequency (Hz)
Gain Bandwidth Product
(kHz)
60
100
1.E+02
VDD = 5.0V
RL = 100 kΩ
-0.5
Input Referred
2.5
70
2.0
80
GBWP
1.5
90
1.0
100
100
90
80
70
60
50
40
30
20
10
0
PM
(G = +1)
0.5
110
Output Short Circuit Current
Magnitude (mA)
Channel to Channel
Separation (dB)
120
20
18
16
14
12
10
8
6
4
2
0
0.0
Gain Bandwidth Product
(kHz)
130
Phase Margin (°)
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL, and CL = 60 pF.
30
25
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
20
15
10
5
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
FIGURE 2-24:
Output Short Circuit Current
vs. Power Supply Voltage.
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL, and CL = 60 pF.
100
VDD – VOH
VOL – VSS
10
1
0.01
0.1
1
Output Current Magnitude (mA)
10
FIGURE 2-25:
Output Voltage Headroom
vs. Output Current Magnitude.
VDD = 5.5V
RL = 50 kΩ
VOL – VSS
VDD – VOH
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
125
FIGURE 2-28:
Output Voltage Headroom
vs. Ambient Temperature.
10
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VDD = 5.5V
Maximum Output Voltage
Swing (V P-P )
Slew Rate (V/ms)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Output Voltage Headroom,
VDD – V OH or V OL – V SS (mV)
Output Voltage Headroom;
VDD – V OH or V OL – V SS (mV)
1000
High-to-Low
Low-to-High
VDD = 1.4V
-50
-25
0
25
50
75
Ambient Temperature (°C)
FIGURE 2-26:
Temperature.
100
25
Output Voltage (5mV/div)
VDD = 1.4V
100
1k
1.E+02
1.E+03
Frequency (Hz)
10k
1.E+04
FIGURE 2-29:
Maximum Output Voltage
Swing vs. Frequency.
25
G = +1 V/V
RL = 50 kΩ
20
1
0.1
10
1.E+01
125
Slew Rate vs. Ambient
VDD = 5.5V
G = -1 V/V
RL = 50 kΩ
20
15
Voltage (5 mV/div)
15
10
10
5
5
0
0
-5
-5
-10
-10
-15
-15
-20
-20
-25
-25
0.0
0.1
0.2
0.3 Time
0.4 (100
0.5 µs/div)
0.6 0.7
FIGURE 2-27:
Pulse Response.
0.8
0.9
1.0
Small Signal Non-inverting
© 2008 Microchip Technology Inc.
0.0
0.1
0.2
FIGURE 2-30:
Response.
0.3 Time
0.4 (100
0.5 µs/div)
0.6 0.7
0.8
0.9
1.0
Small Signal Inverting Pulse
DS21669C-page 9
MCP6041/2/3/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL, and CL = 60 pF.
5.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.0
2
FIGURE 2-31:
Pulse Response.
7.5
5.0
2.5
0.0
-2.5
-5.0
-7.5
-10.0
-12.5
-15.0
-17.5
-20.0
3 Time
4 (15ms/div)
6
7
8
9
Large Signal Non-inverting
CS
VDD = 5.0V
Output On
VOUT
High-Z
0
1
High-Z
2
10
3 Time
4 (15 ms/div)
6 7
8
9
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
10
FIGURE 2-32:
Chip Select (CS) to
Amplifier Output Response Time (MCP6043
only).
Input Current Magnitude (A)
1.E-02
10m
1m
1.E-03
100µ
1.E-04
10µ
1.E-05
1µ
1.E-06
100n
1.E-07
10n
1.E-08
1n
1.E-09
100p
1.E-10
10p
1.E-11
1p
1.E-12
0
1
2
3 Time
4 (15ms/div)
6
7
FIGURE 2-34:
Response.
Internal CS Switch Output (V)
1
Output Voltage (V)
0
CS Voltage (V)
VDD = 5.0V
G = -1 V/V
RL = 50 kΩ
4.5
Output Voltage (V)
Output Voltage (V)
5.0
VDD = 5.0V
G = +1 V/V
RL = 50 kΩ
4.5
8
10
Large Signal Inverting Pulse
3.0
2.5
9
VDD = 5.0V
VOUT Active
2.0
1.5
CS
Low-to-High
CS
High-to-Low
1.0
0.5
Hysteresis
0.0
VOUT High-Z
-0.5
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
CS Input Voltage (V)
FIGURE 2-35:
(MCP6043 only).
Chip Select (CS) Hysteresis
+125°C
+85°C
+25°C
-40°C
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
Input Voltage (V)
FIGURE 2-33:
Input Current vs. Input
Voltage (below VSS).
DS21669C-page 10
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP6041
MCP6042
MCP6043
MCP6044
PDIP,
SOIC,
MSOP
SOT-23-5
PDIP,
SOIC,
MSOP
PDIP,
SOIC,
MSOP
SOT-23-6
PDIP,
SOIC,
TSSOP
6
1
1
6
1
1
Symbol
Description
VOUT, VOUTA Analog Output (op amp A)
2
4
2
2
4
2
VIN–, VINA– Inverting Input (op amp A)
3
3
3
3
3
3
VIN+, VINA+ Non-inverting Input (op amp A)
7
5
8
7
6
4
VDD
—
—
5
—
—
5
VINB+
Non-inverting Input (op amp B)
—
—
6
—
—
6
VINB–
Inverting Input (op amp B)
—
—
7
—
—
7
VOUTB
Analog Output (op amp B)
—
—
—
—
—
8
VOUTC
Analog Output (op amp C)
—
—
—
—
—
9
VINC–
Inverting Input (op amp C)
—
—
—
—
—
10
VINC+
Non-inverting Input (op amp C)
Positive Power Supply
4
2
4
4
2
11
VSS
—
—
—
—
—
12
VIND+
Non-inverting Input (op amp D)
—
—
—
—
—
13
VIND–
Inverting Input (op amp D)
—
—
—
—
—
14
VOUTD
Analog Output (op amp D)
—
—
—
8
5
—
CS
Chip Select
1, 5, 8
—
—
1, 5
—
—
NC
No Internal Connection
3.1
Analog Outputs
The output pins are low-impedance voltage sources.
3.2
Analog Inputs
The non-inverting and inverting inputs are high-impedance CMOS inputs with low bias currents.
3.3
Chip Select Digital Input
3.4
Negative Power Supply
Power Supply Pins
The positive power supply pin (VDD) is 1.4V to 6.0V
higher than the negative power supply pin (VSS). For
normal operation, the other pins are at voltages
between VSS and VDD.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
This is a CMOS, Schmitt-triggered input that places the
part into a low power mode of operation.
© 2008 Microchip Technology Inc.
DS21669C-page 11
MCP6041/2/3/4
4.0
APPLICATIONS INFORMATION
The MCP6041/2/3/4 family of op amps is manufactured
using Microchip’s state of the art CMOS process These
op amps are unity gain stable and suitable for a wide
range of general purpose, low power applications.
See Microchip’s related MCP6141/2/3/4 family of op
amps for applications, at a gain of 10 V/V or higher,
needing greater bandwidth.
4.1
dump any currents onto VDD. When implemented as
shown, resistors R1 and R2 also limit the current
through D1 and D2.
VDD
D1
V1
R1
Rail-to-Rail Input
4.1.1
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors, and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltages that go too far
above VDD; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass
quick ESD events within the specified limits.
R3
VSS – (minimum expected V1)
2 mA
VSS – (minimum expected V2)
R2 >
2 mA
R1 >
Input
Stage
Bond
VIN–
Pad
VSS Bond
Pad
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
(and voltages) at the input pins (see Absolute Maximum Ratings † at the beginning of Section 1.0 “Electrical Characteristics”). Figure 4-2 shows the
recommended approach to protecting these inputs.
The internal ESD diodes prevent the input pins (VIN+
and VIN–) from going too far below ground, and the
resistors R1 and R2 limit the possible current drawn out
of the input pins. Diodes D1 and D2 prevent the input
pins (VIN+ and VIN–) from going too far above VDD, and
DS21669C-page 12
FIGURE 4-2:
Inputs.
Protecting the Analog
It is also possible to connect the diodes to the left of the
resistor R1 and R2. In this case, the currents through
the diodes D1 and D2 need to be limited by some other
mechanism. The resistors then serve as in-rush current
limiters; the DC current into the input pins (VIN+ and
VIN–) should be very small.
A significant amount of current can flow out of the
inputs (through the ESD diodes) when the common
mode voltage (VCM) is below ground (VSS); see
Figure 2-33. Applications that are high impedance may
need to limit the useable voltage range.
VDD Bond
Pad
FIGURE 4-1:
Structures.
VOUT
R2
INPUT VOLTAGE AND CURRENT
LIMITS
VIN+ Bond
Pad
MCP604X
V2
PHASE REVERSAL
The MCP6041/2/3/4 op amps are designed to not
exhibit phase inversion when the input pins exceed the
supply voltages. Figure 2-10 shows an input voltage
exceeding both supplies with no phase inversion.
4.1.2
D2
4.1.3
NORMAL OPERATION
The input stage of the MCP6041/2/3/4 op amps uses
two differential input stages in parallel. One operates at
a low common mode input voltage (VCM), while the
other operates at a high VCM. With this topology, the
device operates with a VCM up to 300 mV above VDD
and 300 mV below VSS. The input offset voltage is
measured at VCM = VSS – 0.3V and VDD + 0.3V to
ensure proper operation.
There are two transitions in input behavior as VCM is
changed. The first occurs, when VCM is near
VSS + 0.4V, and the second occurs when VCM is near
VDD – 0.5V (see Figure 2-3 and Figure 2-6). For the
best distortion performance with non-inverting gains,
avoid these regions of operation.
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
4.2
Rail-to-Rail Output
4.4
Capacitive Loads
There are two specifications that describe the output
swing capability of the MCP6041/2/3/4 family of op
amps. The first specification (Maximum Output Voltage
Swing) defines the absolute maximum swing that can
be achieved under the specified load condition. Thus,
the output voltage swings to within 10 mV of either supply rail with a 50 kΩ load to VDD/2. Figure 2-10 shows
how the output voltage is limited when the input goes
beyond the linear region of operation.
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity gain buffer (G = +1) is the most
sensitive to capacitive loads, although all gains show
the same general behavior.
The second specification that describes the output
swing capability of these amplifiers is the Linear Output
Voltage Range. This specification defines the maximum output swing that can be achieved while the
amplifier still operates in its linear region. To verify
linear operation in this range, the large signal DC
Open-Loop Gain (AOL) is measured at points inside the
supply rails. The measurement must meet the specified
AOL condition in the specification table.
When driving large capacitive loads with these op
amps (e.g., > 60 pF when G = +1), a small series
resistor at the output (RISO in Figure 4-3) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
RISO
Output Loads and Battery Life
The MCP6041/2/3/4 op amp family has outstanding
quiescent current, which supports battery-powered
applications. There is minimal quiescent current
glitching when Chip Select (CS) is raised or lowered.
This prevents excessive current draw, and reduced
battery life, when the part is turned off or on.
Heavy resistive loads at the output can cause
excessive battery drain. Driving a DC voltage of 2.5V
across a 100 kΩ load resistor will cause the supply current to increase by 25 µA, depleting the battery 43
times as fast as IQ (0.6 µA, typical) alone.
High frequency signals (fast edge rate) across
capacitive loads will also significantly increase supply
current. For instance, a 0.1 µF capacitor at the output
presents an AC impedance of 15.9 kΩ (1/2πfC) to a
100 Hz sinewave. It can be shown that the average
power drawn from the battery by a 5.0 Vp-p sinewave
(1.77 Vrms), under these conditions, is
EQUATION 4-1:
PSupply = (VDD - VSS) (IQ + VL(p-p) f CL )
= (5V)(0.6 µA + 5.0Vp-p · 100Hz · 0.1µF)
= 3.0 µW + 50 µW
This will drain the battery 18 times as fast as IQ alone.
MCP604X
VIN
VOUT
CL
FIGURE 4-3:
Output Resistor, RISO
stabilizes large capacitive loads.
Figure 4-4 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit’s noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
100,000
100k
Recommended RISO (:)
4.3
10k
10,000
GN = +1
GN = +2
GN t +5
1k
1,000
10p
1.E+01
1n
10n
100p
1.E+02
1.E+03
1.E+04
Normalized Load Capacitance; C L/GN (F)
FIGURE 4-4:
Recommended RISO Values
for Capacitive Loads.
After selecting RISO for your circuit, double check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6041/2/3/4 SPICE macro
model are helpful.
© 2008 Microchip Technology Inc.
DS21669C-page 13
MCP6041/2/3/4
4.5
MCP6043 Chip Select
4.8
The MCP6043 is a single op amp with Chip Select
(CS). When CS is pulled high, the supply current drops
to 50 nA (typical) and flows through the CS pin to VSS.
When this happens, the amplifier output is put into a
high impedance state. By pulling CS low, the amplifier
is enabled. If the CS pin is left floating, the amplifier
may not operate properly. Figure 1-1 shows the output
voltage and supply current response to a CS pulse.
4.6
Supply Bypass
With this family of operational amplifiers, the power
supply pin (VDD for single supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor is not required
for most applications and can be shared with nearby
analog parts.
4.7
PCB Surface Leakage
In applications where low input bias current is critical,
printed circuit board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow, which is greater than the
MCP6041/2/3/4 family’s bias current at +25°C (1 pA,
typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
Figure 4-6 shows an example of this type of layout.
Guard Ring
VIN– VIN+
Unused Op Amps
An unused op amp in a quad package (MCP6044)
should be configured as shown in Figure 4-5. These
circuits prevent the output from toggling and causing
crosstalk. Circuits A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp; the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
¼ MCP6044 (A)
¼ MCP6044 (B)
VDD
R1
VDD
VDD
R2
VREF
FIGURE 4-6:
for Inverting Gain.
1.
2.
Example Guard Ring Layout
Non-inverting Gain and Unity Gain Buffer:
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
common mode input voltage.
Inverting Gain and Transimpedance Gain
(convert current to voltage, such as photo
detectors) amplifiers:
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
R2
V REF = V DD ⋅ -----------------R1 + R2
FIGURE 4-5:
DS21669C-page 14
Unused Op Amps.
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
4.9
4.9.1
Application Circuits
4.9.2
BATTERY CURRENT SENSING
The MCP6041/2/3/4 op amps’ Common Mode Input
Range, which goes 0.3V beyond both supply rails,
supports their use in high side and low side battery
current sensing applications. The very low quiescent
current (0.6 µA, typical) help prolong battery life, and
the rail-to-rail output supports detection low currents.
Figure 4-7 shows a high side battery current sensor
circuit. The 10Ω resistor is sized to minimize power
losses. The battery current (IDD) through the 10Ω
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the common
mode input voltage of the op amp below VDD, which is
within its allowed range. The output of the op amp will
also be below VDD, which is within its Maximum Output
Voltage Swing specification.
The MCP6041/2/3/4 op amp is well suited for
conditioning sensor signals in battery-powered
applications. Figure 4-8 shows a two op amp instrumentation amplifier, using the MCP6042, that works
well for applications requiring rejection of common
mode noise at higher gains. The reference voltage
(VREF) is supplied by a low impedance source. In single
supply applications, VREF is typically VDD/2.
.
RG
VREF R1
IDD
1.4V
to
6.0V
R2
R2
R1
VOUT
V2
V1
.
INSTRUMENTATION AMPLIFIER
½
MCP6042
½
MCP6042
VDD
10Ω
100 kΩ
VOUT
MCP604X
1 MΩ
R
2R
V OUT = ( V 1 – V 2 ) ⎛⎝ 1 + -----1- + --------1-⎞⎠ + V REF
R2 RG
FIGURE 4-8:
Two Op Amp
Instrumentation Amplifier.
V DD – V OUT
I DD = ----------------------------------------( 10 V/V ) ⋅ ( 10 Ω )
FIGURE 4-7:
Sensor.
High Side Battery Current
© 2008 Microchip Technology Inc.
DS21669C-page 15
MCP6041/2/3/4
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6041/2/3/4 family of op amps.
5.1
SPICE Macro Model
The latest SPICE macro model for the MCP6041/2/3/4
op amps is available on the Microchip web site at
www.microchip.com. This model is intended to be an
initial design tool that works well in the op amp’s linear
region of operation over the temperature range. See
the model file for information on its capabilities.
Bench testing is a very important part of any design and
cannot be replaced with simulations. Also, simulation
results using this macro model need to be validated by
comparing them to the data sheet specifications and
characteristic curves.
5.2
FilterLab® Software
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the
Microchip web site at www.microchip.com/filterlab, the
FilterLab design tool provides full schematic diagrams
of the filter circuit with component values. It also
outputs the filter circuit in SPICE format, which can be
used with the macro model to simulate actual filter
performance.
5.3
Mindi™ Circuit Designer &
Simulator
Microchip’s Mindi™ Circuit Designer & Simulator aids
in the design of various circuits useful for active filter,
amplifier and power-management applications. It is a
free online circuit designer & simulator available from
the Microchip web site at www.microchip.com/mindi.
This interactive circuit designer & simulator enables
designers to quickly generate circuit diagrams,
simulate circuits. Circuits developed using the Mindi
Circuit Designer & Simulator can be downloaded to a
personal computer or workstation.
5.4
5.5
Analog Demonstration and
Evaluation Boards
Microchip offers a broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
a complete listing of these boards and their
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Two of our boards that are especially useful are:
• P/N SOIC8EV: 8-Pin SOIC/MSOP/TSSOP/DIP
Evaluation Board
• P/N SOIC14EV: 14-Pin SOIC/TSSOP/DIP Evaluation Board
5.6
Application Notes
The following Microchip Application Notes are available on the Microchip web site at www.microchip. com/
appnotes and are recommended as supplemental reference resources.
ADN003: “Select the Right Operational Amplifier for
your Filtering Circuits”, DS21821
AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
AN723: “Operational Amplifier AC Specifications and
Applications”, DS00723
AN884: “Driving Capacitive Loads With Op Amps”,
DS00884
AN990: “Analog Sensor Conditioning Circuits – An
Overview”, DS00990
These application notes and others are listed in the
design guide:
“Signal Chain Design Guide”, DS21825
MAPS (Microchip Advanced Part
Selector)
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip website at www.microchip.com/
maps, the MAPS is an overall selection tool for
Microchip’s product portfolio that includes Analog,
Memory, MCUs and DSCs. Using this tool you can
define a filter to sort features for a parametric search of
devices and export side-by-side technical comparasion
reports. Helpful links are also provided for Datasheets,
Purchase, and Sampling of Microchip parts.
DS21669C-page 16
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
Example:
5-Lead SOT-23 (MCP6041)
XXNN
Device
I-Temp
Code
E-Temp
Code
MCP6041/T-E/OT
SPNN
SBNN
Example:
6-Lead SOT-23 (MCP6043)
Device
XXNN
MCP6043T-E/CH
I-Temp
Code
E-Temp
Code
SCNN
SDNN
SC25
Example:
8-Lead MSOP
XXXXXX
6043I
YWWNNN
722256
8-Lead PDIP (300 mil)
8-Lead SOIC (150 mil)
XXXXXXXX
XXXXYYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Example:
MCP6041
I/P256
0722
XXXXXXXX
XXXXXNNN
YYWW
Note:
SB25
OR
MCP6041
I/P e3256
0722
Example:
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I/SN0722
256
OR
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SN e3 0722
256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2008 Microchip Technology Inc.
DS21669C-page 17
MCP6041/2/3/4
Package Marking Information (Continued)
Example:
14-Lead PDIP (300 mil) (MCP6044)
MCP6044-I/P
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
YYWWNNN
0722256
MCP6044
E/P e3
0722256
OR
14-Lead SOIC (150 mil) (MCP6044)
Example:
MCP6044ISL
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
0722256
MCP6044
e3
E/SL^^
0722256
OR
Example:
14-Lead TSSOP (MCP6044)
XXXXXXXX
YYWW
6044ST
0722
NNN
256
OR
6044EST
0722
256
DS21669C-page 18
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
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DS21669C-page 19
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DS21669C-page 20
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
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DS21669C-page 21
MCP6041/2/3/4
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DS21669C-page 23
MCP6041/2/3/4
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DS21669C-page 24
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
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DS21669C-page 25
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DS21669C-page 26
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
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DS21669C-page 27
MCP6041/2/3/4
NOTES:
DS21669C-page 28
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
APPENDIX A:
REVISION HISTORY
Revision C (February 2008)
The following is the list of modifications:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
Updated Figure 2-4 and Figure 2-5.
Updated trademark and Sales listing pages.
Expanded this op amp family:
Added the SOT-23-6 package for the MCP6043
op amp with Chip Select.
Added Extended Temperature (-40°C to
+125°C) parts.
Expanded Analog Input Absolute Max Voltage
Range (applies retroactively).
Expanded operating VDD to a maximum of 6.0V.
Section 1.0
“Electrical
Characteristics”
updated.
Section 2.0 “Typical Performance Curves”
updated.
Section 3.0 “Pin Descriptions” added.
Section 4.0 “Applications Information”.
Added Section 4.7 “Unused Op Amps”.
Updated input stage explanation.
Section 5.0 “Design Aids” updated.
Section 6.0 “Packaging Information”.
Added SOT-23-6 package.
Corrected package marking information.
Appendix A: “Revision History” added.
Revision B (June 2002)
The following is the list of modifications.
• Undocumented changes.
Revision A (August 2001)
• Original data sheet release.
© 2008 Microchip Technology Inc.
DS21669C-page 29
MCP6041/2/3/4
NOTES:
DS21669C-page 30
© 2008 Microchip Technology Inc.
MCP6041/2/3/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature
Range
Package
MCP6041: Single Op Amp
MCP6041T Single Op Amp
(Tape and Reel for SOT-23, SOIC, MSOP)
MCP6042 Dual Op Amp
MCP6042T Dual Op Amp
(Tape and Reel for SOIC and MSOP)
MCP6043 Single Op Amp w/ Chip Select
MCP6043T Single Op Amp w/ Chip Select
(Tape and Reel for SOT-23, SOIC, MSOP)
MCP6044 Quad Op Amp
MCP6044T Quad Op Amp
(Tape and Reel for SOIC and TSSOP)
Temperature Range
I
E
= -40°C to +85°C
= -40°C to +125°C
Package
CH = Plastic Small Outline Transistor (SOT-23),
6-lead (Tape and Reel - MCP6043 only)
MS = Plastic Micro Small Outline (MSOP), 8-lead
OT = Plastic Small Outline Transistor (SOT-23),
5-lead (Tape and Reel - MCP6041 only)
P = Plastic DIP (300 mil Body), 8-lead, 14-lead
SL = Plastic SOIC (150 mil Body), 14-lead
SN = Plastic SOIC (150 mil Body), 8-lead
ST = Plastic TSSOP (4.4 mm Body), 14-lead
© 2008 Microchip Technology Inc.
Examples:
a)
MCP6041-I/P:
b)
Industrial Temp.,
8LD PDIP package.
MCP6041T-E/OT: Tape and Reel,
Extended Temp.,
5LD SOT-23 package.
a)
MCP6042-I/SN:
b)
Industrial Temp.,
8LD SOIC package.
MCP6042T-E/MS: Tape and Reel,
Extended Temp.,
5LD SOT-23 package.
a)
MCP6043-I/P:
b)
Industrial Temp.,
8LD PDIP package.
MCP6043T-E/CH: Tape and Reel,
Extended Temp.,
6LD SOT-23 package.
a)
MCP6044-I/SL:
b)
Industrial Temp.,
14LD PDIP package.
MCP6044T-E/ST: Tape and Reel,
Extended Temp.,
14LD TSSOP package.
DS21669C-page 31
MCP6041/2/3/4
NOTES:
DS21669C-page 32
© 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PRO MATE, rfPIC and SmartShunt are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, UNI/O, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2008 Microchip Technology Inc.
DS21669C-page 33
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-4182-8400
Fax: 91-80-4182-8422
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
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Denmark - Copenhagen
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China - Shenzhen
Tel: 86-755-8203-2660
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Tel: 886-3-572-9526
Fax: 886-3-572-6459
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
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Tel: 86-29-8833-7252
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Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
01/02/08
DS21669C-page 34
© 2008 Microchip Technology Inc.