AME, Inc. AT209S PCI Arbiter and Clock Buffer n General Description The AT209S is an integrated device that contains a PCI Arbiter and a Clock Buffer. PCI Arbiter extends system PCI devices without piecing other circuit to simplify design complexity and increase systems stability. PCI Arbiter also provides STOP# input pin with that extended PCI devices instruct the master to prematurely end the transaction on the current data phase same as one in PCI specification. Clock Buffer is a high performance and low jitter zero delay buffer that provides synchronization between the input and output. The synchronization is established via CLKO feed back to the input of a build-in PLL. PCICLKI is the clock input of the Clock Buffer. In the absence of PCICLKI input, will be in the power down mode. In this mode, the PLL is turned off and the output buffers are pulled low. Power down mode provides the lowest power consumption for a standby condition. n Features l PCI Arbiter Extend PCI Devices from One to Three l PCI Clock Frequency Support PCI Clock range from 25MHz to 66MHz l Zero delay buffer Generate four zero delay clock sources Support frequency range from 25MHz to 66MHz l All AME's Lead Free Products Meet RoHS Standards Rev.A.01 1 AME, Inc. AT209S PCI Arbiter and Clock Buffer n Pin Configuration NC 1 28 AVCC P C IS T O P # 2 27 P C IC L K I S YS R E Q # 3 26 P C IR S T # S YS G N T # 4 25 AVSS P C IR E Q 1 # 5 24 VSS VSS 6 23 P C IC L K O U T P C IG N T 1 # 7 22 P C IC L K 1 P C IR E Q 2 # 8 21 VCC VCC 9 20 P C IC L K 2 A T 2 0 9 S P C IG N T 2 # 10 19 P C IC L K 3 P C IR E Q 3 # 11 18 P C IC L K 4 P C IG N T 3 # 12 17 VSS NC 13 16 NC NC 14 15 NC ※ Ordering Information AT209S- Commercial Standard AT209SG- Green Device with Commercial Standard 2 Rev.A.01 AME, Inc. AT209S PCI Arbiter and Clock Buffer n Pin Description I/O Type Function IN Input Pin OUT Output Pin PWR Power Pin Pin No. Pin Name I/O Type Function 26 PCIRST# IN PCI bus reset# 2 PCISTOP# IN PCI bus stop# (Internal 47K pull-up resistor) 3 SYSREQ# OUT 4 SYSGNT# IN Grant signal from chipset (Internal 47K pull-up resistor) 5 PCIREQ1# IN Request signal from PCI bus (Internal 47K pull-up resistor) 7 PCIGNT1# OUT 8 PCIREQ2# IN 10 PCIGNT2# OUT 11 PCIREQ3# IN 12 PCIGNT3# OUT Request signal to chipset Grant signal to PCI bus Request signal from PCI bus (Internal 47K pull-up resistor) Grant signal to PCI bus Request signal from PCI bus (Internal 47K pull-up resistor) Grant signal to PCI bus Table 1. PCI Arbiter FSM Group Signal, Power; Vcc3V (3.3V) Rev.A.01 3 AME, Inc. AT209S PCI Arbiter and Clock Buffer n Pin Description Pin No. Pin Name I/O Type Function 18 PCICLK4 OUT PCICLK output 19 PCICLK3 OUT PCICLK output 20 PCICLK2 OUT PCICLK output 22 PCICLK1 OUT PCICLK output 23 PCICLKOUT OUT PLL feedback and Internal feedback on this pin 27 PCICLKI IN PCLCLK input reference frequency Table 2. Clock Buffer Group Signal ---- Power: Vcc23 (2.5V or 3.3V) Pin No. Pin Name I/O Type Function 6 VSS PWR Ground 9 VCC PWR 3.3V Power 17 VSS PWR Ground 21 VCC PWR 3.3V Power 24 VSS PWR Ground 25 AVSS PWR Ground for PLL 28 AVCC PWR 3.3V Power for PLL Table 3. Power Signal 4 Rev.A.01 AME, Inc. AT209S PCI Arbiter and Clock Buffer n Quick Reference Data GND = 0V; VCC = 3.3V; 0oC < Temp < 85oC Symbol Parameter VCC Power pin VSS Ground pin AVCC Power pin for PLL AVSS Ground pin for PLL Test Conditions Min Typical Max Unit 3.15 3.3 3.45 V 0 3.15 3.3 V 3.45 0 V V Table 4. Power/Ground Pin Symbol Parameter Test Conditions Min Vil Input low voltage Vih Input high voltage Vol Output low voltage IoI=30mA; VCC3V=3.3V Voh Output high voltage Ioh=30mA; VCC3V=3.3V 2.4 Input duty cycle=50% 45 Duty1 Output duty cycle (0.5*VCC as a reference) Typical Max Unit 0.8 V 2 V 0.4 V V 55 % 2 nS 2 nS Measure between 0.8v and 2V, Tr Output rise time CL=30P Tf Output fall time Measure between 0.8v and 2V, CL=30P Measure at 0.5*Vin & Vout, Tpd PCICLKI Propagation delay time 250 CL=30P Buffer input frequency 25M nS 50M Hz Table 5. Clock Buffer Block Rev.A.01 5 AME, Inc. AT209S PCI Arbiter and Clock Buffer n Quick Reference Data Symbol Parameter Vil Input low voltage Vih Input high voltage Vol Output low voltage Voh Tdcko Test Conditions Min Typical Max Unit 0.8 V 2.0 V 0.4 Output high voltage 2.4 Output delay from PCICLK rising edge to output valid V nS 8 10 nS Table 6. PCI Arbiter FSM 6 Rev.A.01 AME, Inc. AT209S PCI Arbiter and Clock Buffer PLL PCICLKOUT PCICLKI PCICLK1 PCICLK2 PCICLK3 PCICLK4 Figure 2. Clock Buffer Block Diagram Output-to-Output Skew Since the PCICLKOUT and the PCICLK(1-4) outputs are identical, they all start at the same time, but different loads cause them to have different rise times and different times crossing the measurement thresholds. If all outputs are equally loaded, zero phase difference will maintained from PCICLKI to all outputs. If applications requiring zero output-output skew, all the outputs must equally loaded. If the PCICLK(1-4) outputs are less loaded than PCICLKOUT, PCICLK(1-4) outputs will lead it; and if the PCICLK(1-4) is more loaded than PCICLKOUT, PCICLK(1-4) will lag the PCICLKOUT. Rev.A.01 7 AME, Inc. AT209S PCI Arbiter and Clock Buffer Zero Delay PCICLKI PCICLKOUT PCICLKI input and all outputs loaded Equally PCICLK(1-4) PCICLKI PCICLKI PCICLKOUT PCICLKOUT PCICLK(1-4) PCICLK(1-4) Advanced Delayed PCICLKI input and PCICLK(1-4) outputs loaded equally, with PCICLKOUT loaded More. PCICLKI input and PCICLK(1-4) outputs loaded equally, with PCICLKOUT loaded Less. Figure 3. Timing diagrams with different loading configurations 8 Rev.A.01 AME, Inc. AT209S PCI Arbiter and Clock Buffer n Package Dimension SSOP-28 SYMBOLS TOP VIEW 28 E E1 b 14 e MAX MIN MAX A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 A2 - 1.50 - 0.059 b 0.20 0.30 0.008 0.012 D 9.80 10.00 0.386 0.394 E1 3.81 4.00 0.150 0.157 0.635BASIC e E 5.80 6.20 0.380BASIC h FRONT VIEW INCHES MIN 15 1 MILLIMETERS 0.025BASIC 0.228 0.244 0.015BASIC L 0.41 1.27 0.016 0.500 θ 0o 8o 0o 8o D A A2 SEATING PLANE A1 0.004 max SIDE VIEW h A" GAUGE PLANE 0' L SEATING PLANE DETAL : A" Rev.A.01 9 www.ame.com.tw E-Mail: [email protected] Life Support Policy: These products of AME, Inc. are not authorized for use as critical components in life-support devices or systems, without the express written approval of the president of AME, Inc. AME, Inc. reserves the right to make changes in the circuitry and specifications of its devices and advises its customers to obtain the latest version of relevant information. AME, Inc. , Auguest 2007 Document: ATT-DS209S-A.01 Corporate Headquarter U.S.A. (Subsidiary) AME, Inc. Analog Microelectronics, Inc. 2F, 302 Rui-Guang Road, Nei-Hu District 3100 De La Cruz Blvd., Suite 201 Taipei 114, Taiwan. Tel : 886 2 2627-8687 Santa Clara, CA. 95054-2046 Tel: (408) 988-2388 Fax: 886 2 2659-2989 Fax: (408) 988-2489