ANADIGICS ATA7550D1

ATA7550
5.0V 2.5 Gb/s TIA
PRELIMINARY DATA SHEET - Rev 0
FEATURES
·
·
·
·
·
2.5 Gb/s Differential Output TIA
Low Group Delay
Single +5V Power Supply
Small Size: 0.864mm x 1.014mm
300mW (typ) Power Dissipation
GND
VCC
GND
VOUT
IIN
APPLICATIONS
·
·
·
VOUT
SONET/SDH OC-48/STM-16
2.5Gb/s DWDM
Fiber optic receivers, transceivers and
transponders
GND
CEXT
GND
GND
D1 Package
PRODUCT DESCRIPTION
The Anadigics ATA7550D1 is a high-speed 5V
transimpedance amplifier (TIA) available in bare die
form and manufactured using an InGaP based HBT
process. The device is used in conjunction with a
photodetector to convert an optical signal into a
differential output voltage. With its low group delay,
the ATA7550 is ideally suited for DWDM applications.
VCC
VBIAS
VOUT
IIN
VOUT
CEXT
Figure 1: Circuit Block Diagram
07/01
ATA7550
VCC
GND
GND
225µm
Die Size: 864µm x 1014µm
Die Thickness: 178µm
VOUT
Pad Size: 100µm x 100µm
IIN
Pad Pitch: 150µm unless
VOUT
GND
225µm
CEXT
GND
GND
Figure 2: Die Size and Layout
Table 1: Pad Description
PAD
2
D ESC R IPTION
C OMMEN T
V CC
Posi ti ve Supply Voltage
+5.0V
II N
TIA Input
Photocurrent i nput
C EXT
C onnecti on for an external C apaci tor
Sets the low frequency cutoff
VOUT
TIA Output Voltage (Non-i nverted)
Logi cal '1' wi th opti cal i nput
VOUT
TIA Output Voltage (i nverted)
Logi cal '0' wi th opti cal i nput
PRELIMINARY DATA SHEET - Rev 0
07/01
ATA7550
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Maximum Ratings
V CC
7.0V
IIN
3mApp
TS
Storage Temp -65 °C to 125 °C
Stresses in excess of the absolute ratings
may cause permanent damage. Functional
operation is not implied under these
conditions. Exposure to absolute ratings
for extended periods of time may
adversely affect reliability.
Table 3: Recommended Operating Conditions
PAR AMETER
Operati ng Voltage Range
Operati ng Temperature Range(1)
MIN
TYP
MAX
U N IT
+4.75
+5.0
+5.25
V
-10
D i e Attach Temperature
70
O
C
260
O
C
The device may be operated safely over these conditions; however,
parametric performance is guaranteed only over the conditions defined in
the electrical specifications.
1. Defined at the interface between the die and the substrate.
Table 4: DC Electrical Specifications
PAR AMETER
MIN
TYP
MAX
U N IT
Input Offset Voltage
2.6
V
Output Offset Voltage
3.5
V
Supply C urrent
60
80
mA
Power D i ssi pati on
300
420
mW
PRELIMINARY DATA SHEET - Rev 0
07/01
3
ATA7550
Table 5: AC Electrical Specifications (2)
PAR AMETER
MIN
TYP
Small Si gnal D i fferenti al Transresi stance
(RL - 100 W )
1500
2000
W
Bandwi dth (-3dB)
1600
1900
MHz
Low Frequency C utoff (3)
30
kHz
Group D elay (1MHz to 1.7GHz; I IN< 250 mApp)
±30
ps
Opti cal Sensi ti vi ty (4)
-23
dB m
Input Noi se C urrent (RMS) (5)
Opti cal Overload
U N IT
800
-3
(4)
Input C urrent at whi ch Output Li mi ts
MAX
(6)
Si ngle-Ended Output Voltage (IIN = 20 mApp)
15
-1
dB m
250
mA
20
mVpp
Maxi mum D i fferenti al Output Voltage
Output Return Loss (1MHz to 10GHz)
nA
500
mVpp
10
Notes:
2. The specifications are based upon the use of a PIN photodetector with a responsivity
at 1310nm of 0.9A/W (typical) and a capacitance of CDIODE + CSTRAY = 0.5pF max
connected to IIN via a 1nH bond wire.
3. With the use of an external capacitor.
4. Measured at 10-10 BER with a 223 -1 PRBS at 2.488Gb/s.
5. 1.9 GHz bandwidth.
6. Defined as 80% of the maximum output voltage.
4
PRELIMINARY DATA SHEET - Rev 0
07/01
B
ATA7550
PERFORMANCE DATA
Figure 3: External Capacitor Required for Low Frequency Cutoff
10000
Cext(pf)
1000
100
10
0
50
100
150
200
250
300
350
400
Low Frequency Cutoff (kHz)
Figure 4: Differential Output Voltage vs. Input Current
450.0
Output Voltage (mVpp)
400.0
350.0
300.0
250.0
200.0
150.0
100.0
50.0
0.0
0
200
400
600
800
1000
Input Current (uApp)
Figure 5: Eye Diagram with an Optical Input Power of -20dBm
10mV/Div.
100ps/Div.
PRELIMINARY DATA SHEET - Rev 0
07/01
5
ATA7550
Figure 6: Eye Diagram with an Optical Input Power of -15dBm
20mV/Div.
100ps/Div.
Figure 7: Eye Diagram with an Optical Input Power of -5dBm
70mV/Div.
100ps/Div.
Figure 8: Eye Diagram with an Optical Input Power of -2dBm
70mV/Div.
6
100ps/Div.
PRELIMINARY DATA SHEET - Rev 0
07/01
ATA7550
APPLICATION INFORMATION
Photodiode bypass
MIM capacitor
VBIAS
1nF bypass MIM
capacitor
1nH typical
VCC
0.1µF DC blocking
capacitor
VOUT
(50Ω)
ATA7550
Photodiode
VOUT
(50Ω)
CEXT
0.1µF DC blocking
capacitor
1nH typical
1nF MIM capacitor
RF and DC
ground plane
Figure 9: Bonding Diagram
PRELIMINARY DATA SHEET - Rev 0
07/01
7
ATA7550
Packaging
The ATA7550D1 is provided as bare die. For optimum
performance, the die should be packaged in a
hermetic enclosure and a low inductance ground
plane should be made available for power supply
bypassing and ground bonds. When packaging the
ATA7550D1, the temperature of the die must be kept
below 260°C to ensure the device reliability. The
ATA7550D1 does not have backside metal and must
be epoxy mounted. A good thermally conductive, silver
filled epoxy is recommended for epoxy mounting. A
soft silicon/rubber tip collet or pyramidal collet should
be used for die mounting, although tweezers can be
used with extreme care.
Thermosonic ball bonding, at a stage temperature
of 150 to 175°C with 1 to 1.3 mil gold wire, is the
recommended interconnect technique. The bond
force, time and ultrasonic power are all critical
parameters and may require optimization to achieve
the correct bond without causing bonding pad
delamination or damage under the bonding pad.
lensed single mode fiber with the photodetector and
TIA in an open test fixture under the following
conditions:
Photodetector active area: 50mm
Photodetector capacitance: 0.3pF
Photodetector responsivity: 0.90A/W
Lensed fiber beam width: 13mm (86.5% of
contained power)
Lensed fiber focal distance: 3mm
When the photodetector and TIA are packaged in a
hermetic enclosure, with the fiber optimally aligned
to the active area of the photodiode, an improvement
in sensitivity should be observed.
The bond wire from the photodetector to IIN should
be made as short as possible. As the inductance of
this connection increases beyond 1nH, more gain
peaking will occur and the group delay performance
will degrade.
Output Connections
The ATA7550D1 provides a differential output that
must be AC coupled to the next stage of the receiver
as the output buffer is not designed to drive a DC
coupled 50W load. For single-ended applications,
one output of the ATA7550D1 must be AC terminated
to a 50W load.
CEXT Connection
In order to achieve the desired low frequency cutoff,
an external capacitor is required. A low inductance
surface mount chip capacitor or MIM capacitor is
recommended.
Sensitivity Measurement
The typical sensitivity, as specified in the AC
characteristics, is –23dBm. This was measured at a
BER of 10-10 with a 2.5Gb/s, 223-1 PRBS, using a
8
PRELIMINARY DATA SHEET - Rev 0
07/01
ATA7550
NOTES
PRELIMINARY DATA SHEET - Rev 0
07/01
9
ATA7550
NOTES
10
PRELIMINARY DATA SHEET - Rev 0
07/01
ATA7550
NOTES
PRELIMINARY DATA SHEET - Rev 0
07/01
11
ATA7550
ORDERING INFORMATION
PAR T N U MB ER
ATA7550D 1
PAC K AGE OPTION
D1
PAC K AGE D ESC R IPTION
Die
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
http://www.anadigics.com
[email protected]igics.com
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without
notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are
subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are
assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges
customers to verify that the information they are using is current before placing orders.
WARNING
ANADIGICS products are not intended for use in life support appliances, devices, or systems. Use of an ANADIGICS
product in any such application without written consent is prohibited.
PRELIMINARY DATA SHEET - Rev 0
07/01
12