TC7116/A/TC7117/A 3-1/2 Digit Analog-to-Digital Converters with Hold Features General Description • Low Temperature Drift Internal Reference - TC7116/TC7117 80 ppm/°C Typ. - TC7116A/TC7117A 20 ppm/°C Typ. • Display Hold Function • Directly Drives LCD or LED Display • Zero Reading with Zero Input • Low Noise for Stable Display - 2V or 200mV Full Scale Range (FSR) • Auto-Zero Cycle Eliminates Need for Zero • Adjustment Potentiometer • True Polarity Indication for Precision Null Applications • Convenient 9V Battery Operation: (TC7116/TC7116A) • High Impedance CMOS Differential Inputs: 1012Ω • Low Power Operation: 10mW The TC7116A/TC7117A are 3-1/2 digit CMOS analogto-digital converters (ADCs) containing all the active components necessary to construct a 0.05% resolution measurement system. Seven-segment decoders, polarity and digit drivers, voltage reference, and clock circuit are integrated on-chip. The TC7116A drives liquid crystal displays (LCDs) and includes a backplane driver. The TC7117A drives common anode light emitting diode (LED) displays directly with an 8mA drive current per segment. Applications • Thermometry • Bridge Readouts: Strain Gauges, Load Cells, Null Detectors • Digital Meters: Voltage/Current/Ohms/Power, pH • Digital Scales, Process Monitors • Portable Instrumentation Device Selection Table Package Code Package The TC7116A/7117A reduces linearity error to less than 1 count. Rollover error (the difference in readings for equal magnitude but opposite polarity input signals) is below ±1 count. High-impedance differential inputs offer 1pA leakage current and a 1012Ω input impedance. The 15µVP-P noise performance enables a “rock solid” reading. The auto-zero cycle ensures a zero display reading with a 0V input. The TC7116A and TC7117A feature a precision, low drift internal reference, and are functionally identical to the TC7116/TC7117. A low drift external reference is not normally required with the TC7116A/TC7117A. Temperature Range CPL 40-Pin PDIP 0°C to +70°C IJL 40-Pin CERDIP -25°C to +85°C CKW 44-Pin PQFP 0°C to +70°C CLW 44-Pin PLCC 0°C to +70°C 2002 Microchip Technology Inc. These devices incorporate a display hold (HLDR) function. The displayed reading remains indefinitely, as long as HLDR is held high. Conversions continue, but output data display latches are not updated. The reference low input (VREF-) is not available, as it is with the TC7106/7107. VREF- is tied internally to analog common in the TC7116A/7117A devices. DS21457B-page 1 TC7116/A/TC7117/A Package Type 40-Pin PDIP 40-Pin CERDIP 40 OSC1 HLDR 1 D1 2 C1 3 38 OSC3 37 TEST B1 4 A1 5 36 VREF+ 1's F1 6 35 V+ G1 7 E1 8 34 CREF+ G1 7 E1 8 34 CREF+ TC7116CPL 33 CREFTC7116ACPL 32 COMMON TC7117CPL 31 VIN+ TC7117ACPL B2 11 30 VIN29 CAZ F2 13 28 VBUFF 27 VINT F2 13 F3 17 25 G2 24 C3 E3 18 23 A3 AB4 19 22 G3 100's 1000's F3 17 25 G2 24 C3 E3 18 23 A3 AB4 19 22 G3 100's 21 BP/GND (TC7116/7117) (TC7116A/TC7117A) POL 20 (Minus Sign) V- VINT VBUFF CAZ 1 44 43 42 41 40 VIN- 2 COMMON 3 VIN+ HLDR NC 4 CREF+ D1 5 V+ VREF+ C1 VREF+ B1 6 TEST A1 OSC3 44-Pin PQFP OSC2 44-Pin PLCC OSC1 26 V- D3 15 B3 16 100's 21 BP/GND (TC7116/7117) (TC7116A/TC7117A) POL 20 (Minus Sign) 28 VBUFF 27 VINT E2 14 26 V- D3 15 B3 16 33 CREF- TC7116IJL 32 COMMON TC7116AIJL 31 V + IN TC7117IJL B2 11 30 VINTC7117AIJL A2 12 29 CAZ D2 9 C2 10 10's A2 12 E2 14 1000's 36 VREF+ 35 V+ C2 10 100's 38 OSC3 37 TEST B1 4 A1 5 F1 6 D2 9 10's 39 OSC2 C1 3 CREF- 1's 40 OSC1 HLDR 1 D1 2 39 OSC2 44 43 42 41 40 39 38 37 36 35 34 39 V+ NC 1 33 NC G1 8 38 CREF+ NC 2 32 G3 E1 9 37 CREF- TEST 3 31 C3 D2 10 36 COMMON OSC3 4 30 A3 F1 7 C2 11 35 VIN+ TC7116CLW TC7116ACLW TC7117CLW TC7117ACLW NC 12 B2 13 A2 14 NC 5 34 NC OSC2 6 33 VIN- OSC1 7 32 CAZ HLDR 8 29 G3 28 BP/ GND 27 POL TC7116CKW TC7116ACKW TC7117CKW TC7117ACKW 26 AB4 D1 9 25 E3 F2 15 31 VBUFF E2 16 30 VINT C1 10 24 F3 29 V- B1 11 23 B3 D3 E2 F2 A2 B2 C2 D2 E1 G1 12 13 14 15 16 17 18 19 20 21 22 F1 G2 A3 C3 NC BP/ GND G3 POL AB4 F3 E3 B3 18 19 20 21 22 23 24 25 26 27 28 A1 D3 17 Note 1: NC = No internal connection. 2: Pins 9, 25, 40 and 56 are connected to the die substrate. The potential at these pins is approximately V+. No external connections should be made. DS21457B-page 2 2002 Microchip Technology Inc. TC7116/A/TC7117/A Typical Application TC7116/A TC7117/A Display Hold 0.1µF 1MΩ + Analog Input – 0.01µF LCD Display (TC7116/7116A) or Common Anode LED Display 1 33 34 (TC7117/7117A) CREF+ CREF- HLDR 31 2–19 Segment VIN+ 22–25 Drive POL 20 30 VINBackplane Drive Minus Sign BP/GND 21 32 ANALOG COMMON V+ 35 28 47kΩ 0.22µF 24kΩ VBUFF 0.47µF 29 + 36 VREF CAZ VREF+ 100mV 9V 1kΩ 27 V INT V- 26 OSC2 OSC3 OSC1 39 38 COSC 40 ROSC 100pF To Analog Common (Pin 32) 3 Conversions Per Second 100kΩ 2002 Microchip Technology Inc. DS21457B-page 3 TC7116/A/TC7117/A 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings* Supply Voltage: TC7116/TC7116A (V+ to V-) ........................... 15V TC7117/TC7117A (V+ to GND) .......................+6V V- to GND.........................................................-9V Analog Input Voltage (Either Input) (Note 1) ... V+ to VReference Input Voltage (Either Input) ............ V+ to VClock Input: TC7116/TC7116A............................... TEST to V+ TC7117/TC7117A.................................GND to V+ Package Power Dissipation; TA ≤ 70°C (Note 2) 40-Pin CDIP ................................................2.29W 40-Pin PDIP ................................................1.23W 44-Pin PLCC ...............................................1.23W 44-Pin PQFP ...............................................1.00W Operating Temperature: C (Commercial) Device ................... 0°C to +70°C I (Commercial) Device.................... 0°C to +70°C Storage Temperature.......................... -65°C to +150°C *Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. TC7116/A AND TC7117/A ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7116/A and TC7117/A at TA = 25°C, fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit. Symbol Min Typ Max Zero Input Reading — ±0 — Ratiometric Reading 999 999/1000 1000 Rollover Error (Difference in Reading for Equal Positive and Negative Readings Near Full Scale) -1 ±0.2 +1 Counts VIN - = + VIN + ≅ 200mV or ≈ 2V Linearity (Maximum Deviation from Best Straight Line Fit) -1 ±0.2 +1 Counts Full Scale = 200mV or 2V CMRR Common Mode Rejection Ratio (Note 3) — 50 — µV/V VCM = ±1V, VIN = 0V Full Scale = 200mV eN Noise (Peak to Peak 95% of Time) — 15 — µV VIN = 0V Full Scale = 200mV Leakage Current at Input — 1 10 pA Zero Reading Drift — 0.2 1 µV/°C VIN = 0V “C” Device = 0°C to +70°C — 1.0 2 µV/°C “I” Device = -25°C to +85°C ZIR R/O IL Parameter Unit Test Conditions Digital VIN = 0V Reading Full Scale = 200mV Digital VIN = VREF Reading VREF = 100mV VIN = 0V Note 1: 2: 3: 4: Input voltages may exceed the supply voltages provided the input current is limited to ±100µA. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. Refer to “Differential Input” discussion. Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 5: The TC7116/TC7116A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to TEST, Pin 37. The TC7117/TC7117A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to GND, Pin 21. DS21457B-page 4 2002 Microchip Technology Inc. TC7116/A/TC7117/A TC7116/A AND TC7117/A ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7116/A and TC7117/A at TA = 25°C, fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit. Symbol TCSF Parameter Min Typ Max Unit Test Conditions Scale Factor Temperature Coefficient — 1 5 ppm/°C VIN = 199mV, “C” Device = 0°C to +70°C (Ext. Ref = 0ppm°C) — — 20 ppm/°C “I” Device = -25°C to +85°C Input Resistance, Pin 1 30 70 — kΩ (Note 5) VIL, Pin 1 — — Test + 1.5 V TC7116/A Only VIL, Pin 1 — — GND + 1.5 V TC7117/A Only VIH, Pin 1 V+ - 1.5 — — V Both IDD Supply Current (Does not Include LED Current for TC7117/A) — 0.8 1.8 mA VC Analog Common Voltage (with Respect to Positive Supply) 2.4 3.05 3.35 V 25kΩ Between Common and Positive Supply VCTC Temperature Coefficient of Analog Common (with Respect to Positive Supply) — — 20 80 — 50 — — ppm/°C ppm/°C “C” Device: 0°C to +70°C TC7116A/TC7117A TC7116/TC7117 VSD TC7116/TC7117A ONLY Peak to Peak Segment Drive Voltage 4 5 6 V V+ to V- = 9V (Note 4) VBD TC7116A/TC7116A ONLY Peak to Peak Backplane Drive Voltage 4 5 6 V V+ to V- = 9V (Note 4) TC7117/TC7117A ONLY Segment Sinking Current (Except Pin 19) 5 8 — mA V+ = 5.0V Segment Voltage = 3V 10 16 — mA V+ = 5.0V Segment Voltage = 3V TC7117/TC7117A ONLY Segment Sinking Current (Pin 19 Only) VIN = 0V Note 1: 2: 3: 4: Input voltages may exceed the supply voltages provided the input current is limited to ±100µA. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. Refer to “Differential Input” discussion. Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 5: The TC7116/TC7116A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to TEST, Pin 37. The TC7117/TC7117A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to GND, Pin 21. 2002 Microchip Technology Inc. DS21457B-page 5 TC7116/A/TC7117/A 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Pin Number (40-Pin PDIP) (40-Pin CERDIP) Pin Number (44-Pin PQFP) Symbol 1 8 HLDR 2 9 D1 Activates the D section of the units display. 3 10 C1 Activates the C section of the units display. 4 11 B1 Activates the B section of the units display. 5 12 A1 Activates the A section of the units display. 6 13 F1 Activates the F section of the units display. 7 14 G1 Activates the G section of the units display. 8 15 E1 Activates the E section of the units display. 9 16 D2 Activates the D section of the tens display. 10 17 C2 Activates the C section of the tens display. Description Hold pin, Logic 1 holds present display reading. 11 18 B2 Activates the B section of the tens display. 12 19 A2 Activates the A section of the tens display. 13 20 F2 Activates the F section of the tens display. 14 21 E2 Activates the E section of the tens display. 15 22 D3 Activates the D section of the hundreds display. 16 23 B3 Activates the B section of the hundreds display. 17 24 F3 Activates the F section of the hundreds display. 18 25 E3 Activates the E section of the hundreds display. Activates both halves of the 1 in the thousands display. 19 26 AB4 20 27 POL Activates the negative polarity display. 21 28 BP/ GND LCD backplane drive output (TC7116/TC7116A). Digital ground (TC7117/TC7117A). 22 29 G3 Activates the G section of the hundreds display. 23 30 A3 Activates the A section of the hundreds display. 24 31 C3 Activates the C section of the hundreds display. 25 32 G2 Activates the G section of the tens display. 26 34 V- Negative power supply voltage. 27 35 VINT 28 36 VBUFF 29 37 CAZ 30 38 VIN - The analog LOW input is connected to this pin. 31 39 VIN+ The analog HIGH input signal is connected to this pin. 32 40 Integrator output. Connection point for integration capacitor. See Section 4.3, Integrating Capacitor for more details. Integration resistor connection. Use a 47kΩ resistor for a 200mV full scale range and a 470kΩ resistor for 2V full scale range. The size of the auto-zero capacitor influences system noise. Use a 0.47µF capacitor for 200mV full scale, and a 0.047µF capacitor for 2V full scale. See Section 4.1, Auto-Zero Capacitor for more details. COMMON This pin is primarily used to set the Analog Common mode voltage for battery operation, or in systems where the input signal is referenced to the power supply. It also acts as a reference voltage source. See Section 3.1.6, Analog Common for more details. 33 41 CREF- See Pin 34. 34 42 CREF + A 0.1µF capacitor is used in most applications. If a large Common mode voltage exists (for example, the VIN - pin is not at analog common), and a 200mV scale is used, a 1µF capacitor is recommended and will hold the rollover error to 0.5 count. DS21457B-page 6 2002 Microchip Technology Inc. TC7116/A/TC7117/A TABLE 2-1: PIN FUNCTION TABLE (CONTINUED) Pin Number (40-Pin PDIP) (40-Pin CERDIP) Pin Number (44-Pin PQFP) 35 43 V+ 36 44 VREF + The analog input required to generate a full scale output (1999 counts). Place 100mV between Pins 32 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for 2V full scale. See Section 4.6, Reference Voltage. 37 3 TEST Lamp test. When pulled HIGH (to V+), all segments will be turned on and the display should read -1888. It may also be used as a negative supply for externally generated decimal points. See Section 3.1.7, TEST for additional information. 38 4 OSC3 See Pin 40. 39 6 OSC2 See Pin 40. 40 7 OSC1 Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock (3 readings per section), connect Pin 40 to the junction of a 100kΩ resistor and a 100pF capacitor. The 100kΩ resistor is tied to Pin 39 and the 100pF capacitor is tied to Pin 38. 3.0 Symbol Description Positive Power Supply Voltage. DETAILED DESCRIPTION (All Pin Designations Refer to 40-Pin PDIP.) 3.1 Analog Section Figure 3-1 shows the block diagram of the analog section for the TC7116/TC7116A and TC7117/TC7117A. Each measurement cycle is divided into three phases: (1) Auto-Zero (AZ), (2) Signal Integrate (INT), and (3) Reference Integrate (REF), or De-integrate (DE). 3.1.1 AUTO-ZERO PHASE 3.1.2 SIGNAL INTEGRATE PHASE The auto-zero loop is opened, the internal short is removed, and the internal high and low inputs are connected to the external pins. The converter then integrates the differential voltages between VIN+ and VINfor a fixed time. This differential voltage can be within a wide Common mode range: 1V of either supply. However, if the input signal has no return with respect to the converter power supply, VIN- can be tied to analog common to establish the correct Common mode voltage. At the end of this phase, the polarity of the integrated signal is determined. High and low inputs are disconnected from the pins and internally shorted to analog common. The reference capacitor is charged to the reference voltage. A feedback loop is closed around the system to charge the auto-zero capacitor (C AZ) to compensate for offset voltages in the buffer amplifier, integrator, and comparator. Since the comparator is included in the loop, AZ accuracy is limited only by system noise. The offset referred to the input is less than 10µV. 2002 Microchip Technology Inc. DS21457B-page 7 TC7116/A/TC7117/A FIGURE 3-1: ANALOG SECTION OF TC7116/TC7117A AND TC7117/TC7117A CREF VREF+ CREF+ 34 V+ VIN+ VBUFF CREF- 36 33 DE (–) VIN- DE (+) Auto-Zero VINT 29 27 Low Temp. Drift DE (+) – + Comparator V+ -3V TC7116 TC7116A TC7117 TC7117A DE (–) AZ & DE (±) 30 26 INT + To Digital Section + Zener VREF – AZ CINT Integrator + AZ 32 35 – 31 INT Analog Common V+ 28 AZ 10µA CAZ RINT V- 3.1.3 REFERENCE INTEGRATE PHASE The final phase is reference integrate, or de-integrate. Input low is internally connected to analog common and input high is connected across the previously charged reference capacitor. Circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. The time required for the output to return to zero is proportional to the input signal. The digital reading displayed is: EQUATION 3-1: 1000 = 3.1.4 VIN VREF REFERENCE 3.1.6 ANALOG COMMON This pin is included primarily to set the Common mode voltage for battery operation (TC7116/TC7116A), or for any system where the input signals are floating, with respect to the power supply. The analog common pin sets a voltage approximately 2.8V more negative than the positive supply. This is selected to give a minimum end of life battery voltage of about 6V. However, analog common has some attributes of a reference voltage. When the total supply voltage is large enough to cause the zener to regulate (>7V), the analog common voltage will have a low voltage coefficient (0.001%), low output impedance (≅15Ω), and a temperature coefficient of less than 20ppm/°C, typically, and 50 ppm maximum. The TC7116/TC7117 temperature coefficients are typically 80ppm/°C. The positive reference voltage (VREF+) is referred to analog common. An external reference may be used, if necessary, as shown in Figure 3-2. 3.1.5 FIGURE 3-2: DIFFERENTIAL INPUT This input can accept differential voltages anywhere within the Common mode range of the input amplifier or, specifically, from 1V below the positive supply to 1V above the negative supply. In this range, the system has a CMRR of 86dB, typical. However, since the integrator also swings with the Common mode voltage, care must be exercised to ensure that the integrator output does not saturate. A worst case condition would be a large, positive Common mode voltage with a near full scale negative differential input voltage. The negative input signal drives the integrator positive, when most of its swing has been used up by the positive Common mode voltage. For these critical applications, the integrator swing can be reduced to less than the recommended 2V full scale swing with little loss of accuracy. The integrator output can swing within 0.3V of either supply without loss of linearity. DS21457B-page 8 USING AN EXTERNAL REFERENCE V+ V+ TC7116 TC7116A TC7117 TC7117A 6.8kΩ 20kΩ VREF+ 1.2V REF COMMON 2002 Microchip Technology Inc. TC7116/A/TC7117/A Analog common is also used as V IN- return during auto-zero and de-integrate. If VIN- is different from analog common, a Common mode voltage exists in the system and is taken care of by the excellent CMRR of the converter. However, in some applications, VIN- will be set at a fixed, known voltage (power supply common for instance). In this application, analog common should be tied to the same point, thus removing the Common mode voltage from the converter. The same holds true for the reference voltage; if it can be conveniently referenced to analog common, it should be. This removes the Common mode voltage from the reference system. Within the IC, analog common is tied to an N-channel FET, that can sink 30mA or more of current to hold the voltage 3V below the positive supply (when a load is trying to pull the analog common line positive). However, there is only 10µA of source current, so analog common may easily be tied to a more negative voltage, thus overriding the internal reference. 3.1.7 TEST The TEST pin serves two functions. On the TC7117/ TC7117A, it is coupled to the internally generated digital supply through a 500Ω resistor. Thus, it can be used as a negative supply for externally generated segment drivers, such as decimal points, or any other presentation the user may want to include on the LCD. (Figure 3-3 and Figure 3-4 show such an application.) No more than a 1mA load should be applied. The second function is a "lamp test." When TEST is pulled HIGH (to V+), all segments will be turned ON and the display should read -1888. The TEST pin will sink about 10mA under these conditions. FIGURE 3-3: SIMPLE INVERTER FOR FIXED DECIMAL POINT V+ V+ TC7116 TC7116A 4049 BP TEST 21 GND 37 2002 Microchip Technology Inc. FIGURE 3-4: EXCLUSIVE “OR” GATE FOR DECIMAL POINT DRIVE V+ V+ BP TC7116 TC7116A TEST 3.2 To LCD Decimal Point Decimal Point Select 4030 GND Digital Section Figure 3-5 and Figure 3-6 show the digital section for TC7116/TC7116A and TC7117/TC7117A, respectively. For the TC7116/TC7116A (Figure 3-5), an internal digital ground is generated from a 6V zener diode and a large P-channel source follower. This supply is made stiff to absorb the relative large capacitive currents when the backplane (BP) voltage is switched. The BP frequency is the clock frequency 4800. For 3 readings per second, this is a 60Hz square wave with a nominal amplitude of 5V. The segments are driven at the same frequency and amplitude, and are in phase with BP when OFF, but out of phase when ON. In all cases, negligible DC voltage exists across the segments. Figure 3-6 is the digital section of the TC7117/ TC7117A. It is identical to the TC7116/TC7116A, except that the regulated supply and BP drive have been eliminated, and the segment drive is typically 8mA. The 1000's output (Pin 19) sinks current from two LED segments, and has a 16mA drive capability. The TC7117/TC7117A are designed to drive common anode LED displays. In both devices, the polarity indication is ON for analog inputs. If VIN- and VIN+ are reversed, this indication can be reversed also, if desired. To LCD Decimal Point To LCD Backplane DS21457B-page 9 TC7116/A/TC7117/A FIGURE 3-5: TC7116/TC7116A DIGITAL SECTION TC7116 TC7116A Backplane 21 LCD Phase Driver Typical Segment Output V+ 7-Segment Decode 7-Segment Decode 0.5mA 7-Segment Decode ÷200 Segment Output Latch 2mA Internal Digital Ground Thousands Tens Hundreds Units To Switch Drivers From Comparator Output 35 ~70kΩ Clock ÷4 Logic Control VTH = 1V 40 39 38 OSC1 OSC2 OSC3 3.2.1 Internal Digital Ground SYSTEM TIMING The clocking method used for the TC7116/TC7116A and TC7117/TC7117A is shown in Figure 3-6. Three clocking methods may be used: 1. 2. 3. An external oscillator connected to Pin 40. A crystal between Pins 39 and 40. An RC network using all three pins. The oscillator frequency is ÷4 before it clocks the decade counters. It is then further divided to form the three convert cycle phases: Signal Integrate (1000 counts), Reference De-integrate (0 to 2000 counts), and Auto-Zero (1000 to 3000 counts). For signals less than full scale, auto-zero gets the unused portion of reference de-integrate. This makes a complete measure cycle of 4000 (16,000 clock pulses), independent of input voltage. For 3 readings per second, an oscillator frequency of 48kHz would be used. DS21457B-page 10 6.2V 37 V+ TEST 500Ω 26 1 V- HLDR To achieve maximum rejection of 60Hz pickup, the signal integrate cycle should be a multiple of 60Hz. Oscillator frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 48kHz, 40kHz, etc. should be selected. For 50Hz rejection, oscillator frequencies of 200kHz, 100kHz, 66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note that 40kHz (2.5 readings per second) will reject both 50Hz and 60Hz. 3.2.2 HOLD READING INPUT When HLDR is at a logic HIGH, the latch will not be updated. Analog-to-digital conversions will continue, but will not be updated until HLDR is returned to LOW. To continuously update the display, connect to TEST (TC7116/TC7116A) or GROUND (TC7117/TC7117A), or disconnect. This input is CMOS compatible with 70kΩ typical resistance to TEST (TC7116/TC7116A) or GROUND (TC7117/TC7117A). 2002 Microchip Technology Inc. TC7116/A/TC7117/A FIGURE 3-6: TC7117/TC711A DIGITAL SECTION TC7117 TC7117A Typical Segment Output V+ 7-Segment Decode 0.5mA 7-Segment Decode 7-Segment Decode To Segment 8mA Latch Digital Ground Internal Digital Ground Thousands V+ Hundreds Tens Units To Switch Drivers From Comparator Output 35 37 Clock ÷4 Control Logic 39 OSC2 2002 Microchip Technology Inc. 38 OSC3 TEST 500Ω 21 40 OSC1 V+ Digital GND 1 ~70kΩ HLDR DS21457B-page 11 TC7116/A/TC7117/A 4.0 4.1 COMPONENT VALUE SELECTION Auto-Zero Capacitor The size of the auto-zero capacitor has some influence on system noise. For 200mV full scale, where noise is very important, a 0.47µF capacitor is recommended. On the 2V scale, a 0.047µF capacitor increases the speed of recovery from overload and is adequate for noise on this scale. 4.2 Reference Capacitor A 0.1µF capacitor is acceptable in most applications. However, where a large Common mode voltage exists (i.e., the VIN- pin is not at analog common), and a 200mV scale is used, a larger value is required to prevent rollover error. Generally, 1µF will hold the rollover error to 0.5 count in this instance. 4.3 Integrating Capacitor The integrating capacitor should be selected to give the maximum voltage swing that ensures tolerance buildup will not saturate the integrator swing (approximately 0.3V from either supply). In the TC7116/TC7116A or the TC7117/TC7117A, when the analog common is used as a reference, a nominal ±2V full scale integrator swing is acceptable. For the TC7117/TC7117A, with ±5V supplies and analog common tied to supply ground, a ±3.5V to ±4V swing is nominal. For 3 readings per second (48kHz clock), nominal values for CINT are 0.22µ1F and 0.10µF, respectively. If different oscillator frequencies are used, these values should be changed in inverse proportion to maintain the output swing. The integrating capacitor must have low dielectric absorption to prevent rollover errors. Polypropylene capacitors are recommended for this application. 4.4 Integrating Resistor Both the buffer amplifier and the integrator have a class A output stage with 100µA of quiescent current. They can supply 20µA of drive current with negligible nonlinearity. The integrating resistor should be large enough to remain in this very linear region over the input voltage range, but small enough that undue leakage requirements are not placed on the PC board. For 2V full scale, 470kΩ is near optimum and, similarly, 47kΩ for 200mV full scale. 4.5 4.6 Reference Voltage To generate full scale output (2000 counts), the analog input requirement is VIN = 2VREF. Thus, for the 200mV and 2V scale, VREF should equal 100mV and 1V, respectively. In many applications, where the ADC is connected to a transducer, a scale factor exists between the input voltage and the digital reading. For instance, in a measuring system, the designer might like to have a full scale reading when the voltage from the transducer is 700mV. Instead of dividing the input down to 200mV, the designer should use the input voltage directly and select VREF = 350mV. Suitable values for integrating resistor and capacitor would be 120kW and 0.22µF. This makes the system slightly quieter and also avoids a divider network on the input. The TC7117/ TC7117A, with ±5V supplies, can accept input signals up to ±4V. Another advantage of this system is when a digital reading of zero is desired for VIN ≠ 0. Temperature and weighing systems with a variable tare are examples. This offset reading can be conveniently generated by connecting the voltage transducer between VIN+ and analog common, and the variable (or fixed) offset voltage between analog common and VIN-. 5.0 TC7117/TC7117A POWER SUPPLIES The TC7117/TC7117A are designed to operate from ±5V supplies. However, if a negative supply is not available, it can be generated with a TC7660 DC-to-DC converter and two capacitors. Figure 5-1 shows this application. In selected applications, a negative supply is not required. The conditions for using a single +5V supply are: 1. 2. 3. The input signal can be referenced to the center of the Common mode range of the converter. The signal is less than ±1.5V. An external reference is used. FIGURE 5-1: +5V 35 V+ 36 VREF+ LED Drive Oscillator Components TC7117 COM TC7117A VIN- 8 2 EQUATION 4-1: + 0.45 f = ----------RC For a 48kHz clock (3 readings per second), C = 100pF. 32 VIN+ 31 For all frequency ranges, a 100kΩ resistor is recommended; the capacitor is selected from the equation: DS21457B-page 12 NEGATIVE POWER SUPPLY GENERATION WITH TC7660 TC7660 10µF 5 (-5V) 4 V26 GND 30 21 + VIN – 3 + 10µF 2002 Microchip Technology Inc. TC7116/A/TC7117/A 6.0 TYPICAL APPLICATIONS The TC7117/TC7117A sink the LED display current, causing heat to build up in the IC package. If the internal voltage reference is used, the changing chip temperature can cause the display to change reading. By reducing the LED common anode voltage, the TC7117/ TC7117A package power dissipation is reduced. Figure 6-1 is a curve tracer display showing the relationship between output current and output voltage for typical TC7117CPL/TC7117ACPL devices. Since a typical LED has 1.8V across it at 8mA and its common anode is connected to +5V, the TC7117/TC7117A output is at 3.2V (Point A, Figure 6-1). Maximum power dissipation is 8.1mA x 3.2V x 24 segments = 622mW. However, notice that once the TC7117/TC7117A's output voltage is above 2V, the LED current is essentially constant as output voltage increases. Reducing the output voltage by 0.7V (Point B Figure 6-1) results in 7.7mA of LED current, only a 5% reduction. Maximum power dissipation is now only 7.7mA x 2.5V x 24 = 462mW, a reduction of 26%. An output voltage reduction of 1V (Point C) reduces LED current by 10% (7.3mA), but power dissipation by 38% (7.3mA x 2.2V x 24 = 385mW). FIGURE 6-1: TC7117/TC7117A OUTPUT VS. OUTPUT VOLTAGE The change in LED brightness caused by the resistor is almost unnoticeable as more segments turn off. If display brightness remaining steady is very important to the designer, a diode may be used instead of the resistor. FIGURE 6-2: DIODE OR RESISTOR LIMITS PACKAGE POWER DISSIPATION +5V In + 150kΩ TP3 1kΩ 100 pF TP5 100 kΩ 0.01 µF TP2 0.1 µF TP1 35 1 30 10 A 8.000 0.47 µF 0.22 µF Display 47 kΩ TC7117 TC7117A 9.000 -5V – 1MΩ 24kΩ 40 10.000 Output Current (mA) In addition to limiting maximum power dissipation, the resistor reduces change in power dissipation as the display changes. The effect is caused by the fact that, as fewer segments are ON, each ON output drops more voltage and current. For the best case of six segments (a “111” display) to worst case (a “1888” display), the resistor circuit will change about 230mW, while a circuit without the resistor will change about 470mW. Therefore, the resistor will reduce the effect of display dissipation on reference voltage drift by about 50%. TP 4 21 20 Display B 1.5W, 1/4Ω C 1N4001 7.000 6.000 2.00 2.50 3.00 3.50 4.00 Output Voltage (V) Reduced power dissipation is very easy to obtain. Figure 6-2 shows two ways: either a 5.1Ω, 1/4W resistor, or a 1A diode placed in series with the display (but not in series with the TC7117/TC7117A). The resistor reduces the TC7117/TC7117A's output voltage (when all 24 segments are ON) to Point C of Figure 6-1. When segments turn off, the output voltage will increase. The diode, however, will result in a relatively steady output voltage, around Point B. 2002 Microchip Technology Inc. DS21457B-page 13 TC7116/A/TC7117/A FIGURE 6-3: TC7116/TC7117A USING THE INTERNAL REFERENCE (200mV FULL SCALE, 3 READINGS PER SECOND - RPS) TC7116 TC7116A FIGURE 6-4: Set VREF = 100mV 100kΩ 100pF 22kΩ 0.1pF 1kΩ 1MΩ + In 0.01µF + 0.47µF – 47kΩ 9V – 0.22µF To Display To Backplane TC7117/TC7117A INTERNAL REFERENCE (200mV FULL SCALE, 3 RPS, VIN- TIED TO GND FOR SINGLE ENDED INPUTS) TC7117 TC7117A DS21457B-page 14 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 Set VREF = 100mV 100kΩ 100pF 22kΩ +5V 0.1pF 1kΩ 1MΩ + In 0.01µF 0.47µF – 47kΩ 0.22µF -5V To Display 2002 Microchip Technology Inc. TC7116/A/TC7117/A FIGURE 6-5: CIRCUIT FOR DEVELOPING UNDER RANGE AND OVER RANGE SIGNALS FROM TC7116/TC7117A OUTPUTS V+ 40 To Logic VCC 35 TC7116 TC7116A 26 O/R To Logic GND V- U/R 20 CD4023 or 74C10 FIGURE 6-6: 21 CD4077 O/R = Over Range U/R = Under Range TC7117/TC7117A WITH A 1.2 EXTERNAL BANDGAP REFERENCE (VIN- TIED TO COMMON) TC7117 TC7117A 2002 Microchip Technology Inc. 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 100kΩ Set VREF = 100mV 100pF 10kΩ 0.1pF 10kΩ V+ 1kΩ + 1.2V 0.01µF 0.47µF In 1MΩ – 47kΩ 0.22µF To Display DS21457B-page 15 TC7116/A/TC7117/A FIGURE 6-7: RECOMMENDED COMPONENT VALUES FOR 2V FULL SCALE (TC7116/TC7116A AND TC7117/TC7117A) TC7116 TC7116A TC7117 TC7117A FIGURE 6-8: Set VREF = 1V 100kΩ 100pF 24kΩ V+ 0.1µF 25kΩ 1MΩ + In 0.01µF 0.047µF – 470kΩ 0.22µF V- To Display TC7117/TC7117A OPERATED FROM SINGLE +5V SUPPLY (AN EXTERNAL REFERENCE MUST BE USED IN THIS APPLICATION) TC7117 TC7117A DS21457B-page 16 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 100kΩ Set VREF = 100mV 100pF 10kΩ 0.1pF 10kΩ V+ 1kΩ + 1.2V 0.01µF 0.47µF In 1MΩ – 47kΩ 0.22µF To Display 2002 Microchip Technology Inc. TC7116/A/TC7117/A 7.0 PACKAGING INFORMATION 7.1 Package Marking Information Package marking data not available at this time. 7.2 Taping Form Component Taping Orientation for 44-Pin PLCC Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package 44-Pin PLCC Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 32 mm 24 mm 500 13 in Note: Drawing does not represent total number of pins. Component Taping Orientation for 44-Pin PQFP Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package 44-Pin PQFP Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 24 mm 16 mm 500 13 in Note: Drawing does not represent total number of pins. 2002 Microchip Technology Inc. DS21457B-page 17 TC7116/A/TC7117/A 7.3 Package Dimensions 40-Pin PDIP (Wide) PIN 1 .555 (14.10) .530 (13.46) 2.065 (52.45) 2.027 (51.49) .610 (15.49) .590 (14.99) .200 (5.08) .140 (3.56) .040 (1.02) .020 (0.51) .150 (3.81) .115 (2.92) .110 (2.79) .090 (2.29) .070 (1.78) .045 (1.14) .015 (0.38) .008 (0.20) 3° MIN. .700 (17.78) .610 (15.50) .022 (0.56) .015 (0.38) Dimensions: inches (mm) 40-Pin CERDIP (Wide) PIN 1 .540 (13.72) .510 (12.95) .030 (0.76) MIN. .098 (2.49) MAX. 2.070 (52.58) 2.030 (51.56) .620 (15.75) .590 (15.00) .060 (1.52) .020 (0.51) .210 (5.33) .170 (4.32) .150 (3.81) MIN. .200 (5.08) .125 (3.18) .110 (2.79) .090 (2.29) .065 (1.65) .045 (1.14) .020 (0.51) .016 (0.41) .015 (0.38) .008 (0.20) 3° MIN. .700 (17.78) .620 (15.75) Dimensions: inches (mm) DS21457B-page 18 2002 Microchip Technology Inc. TC7116/A/TC7117/A 7.3 Package Dimensions (Continued) 44-Pin PLCC PIN 1 .021 (0.53) .013 (0.33) .050 (1.27) TYP. .695 (17.65) .685 (17.40) .630 (16.00) .591 (15.00) .656 (16.66) .650 (16.51) .032 (0.81) .026 (0.66) .020 (0.51) MIN. .656 (16.66) .650 (16.51) .120 (3.05) .090 (2.29) .695 (17.65) .685 (17.40) .180 (4.57) .165 (4.19) Dimenisons: inches (mm) 44-Pin PQFP 7° MAX. .009 (0.23) .005 (0.13) PIN 1 .018 (0.45) .012 (0.30) .041 (1.03) .026 (0.65) .398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65) .031 (0.80) TYP. .398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65) .010 (0.25) TYP. .083 (2.10) .075 (1.90) .096 (2.45) MAX. Dimenisons: inches (mm) 2002 Microchip Technology Inc. DS21457B-page 19 TC7116/A/TC7117/A PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART CODE 6 = LCD 7 = LED TC711X X X XXX } A or blank* R (reversed pins) or blank (CPL pkg only) * "A" parts have an improved reference TC Package Code (see Device Selection Table) SALES AND SUPPORT Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. DS21457B-page 20 2002 Microchip Technology Inc. TC7116/ATC7117/A Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. 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Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 03/01/02 *DS21457B* DS21457B-page 22 2002 Microchip Technology Inc.