CATALYST CAT5111ZI-00-G

CAT5111
100-Tap Digitally Programmable Potentiometer (DPP™)
with Buffered Wiper
FEATURES
DESCRIPTION
„ 100-position linear taper potentiometer
The CAT5111 is a single digitally programmable
potentiometer (DPP™) designed as a electronic
replacement for mechanical potentiometers. Ideal for
automated adjustments on high volume production
lines, they are also well suited for applications where
equipment requiring periodic adjustment is either
difficult to access or located in a hazardous or remote
environment.
„ Non-volatile EEPROM wiper storage;
buffered wiper
„ Low power CMOS technology
„ Single supply operation: 2.5V-6.0V
„ Increment up/down serial interface
„ Resistance values: 10kΩ, 50kΩ and 100kΩ
The CAT5111 contains a 100-tap series resistor array
connected between two terminals RH and RL. An
up/down counter and decoder that are controlled by
three input pins, determines which tap is connected to
the wiper, RWB. The CAT5111 wiper is buffered by an
op amp that operates rail to rail. The wiper setting,
stored in non-volatile memory, is not lost when the
device is powered down and is automatically recalled
when power is returned. The wiper can be adjusted to
test new system values without effecting the stored
setting.
Wiper-control
of
the
CAT5111
is
¯¯ , U/D
¯,
accomplished with three input control pins, CS
¯¯¯. The INC
¯¯¯ input increments the wiper in the
and INC
direction which is determined by the logic state of the
¯ input. The CS
¯¯ input is used to select the device
U/D
and also store the wiper position prior to power down.
„ Available in PDIP, SOIC, TSSOP and MSOP
packages
APPLICATIONS
„ Automated product calibration
„ Remote control adjustments
„ Offset, gain and zero control
„ Tamper-proof calibrations
„ Contrast, brightness and volume controls
„ Motor controls and feedback systems
„ Programmable analog functions
The digitally programmable potentiometer can be
used as a buffered voltage divider. For applications
where the potentiometer is used as a 2-terminal
variable resistor, please refer to the CAT5113. The
buffered wiper of the CAT5111 is not compatible with
that application.
For Ordering Information details, see page 10.
FUNCTIONAL DIAGRAM
RH
VCC
RH
U/D
INC
Control
and
Memory
CS
Power On Recall
+
+
RWB
–
–
RWB
RL
RL
GND
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Electronic Potentiometer Implementation
1
Doc. No. MD-2008 Rev. P
CAT5111
PIN CONFIGURATION
PDIP 8-Lead (L)
SOIC 8 Lead (V)
MSOP 8 Lead (Z)
PIN DESCRIPTIONS
Name Function
TSSOP 8 Lead (Y)
¯¯¯ 1
INC
8 VCC
¯¯ 1
CS
8 RL
¯ 2
U/D
¯¯
7 CS
VCC 2
7 RWB
6 RL
¯¯¯ 3
INC
5 RWB
¯ 4
U/D
RH 3
CAT
GND 4
CAT
¯¯¯
INC
¯
U/D
Increment Control
RH
Potentiometer High Terminal
Up/Down Control
GND Ground
6 GND
RWB
5 RH
Buffered Wiper Terminal
RL
Potentiometer Low Terminal
¯¯
CS
Chip Select
VCC
Supply Voltage
PIN DESCRIPTION
¯¯¯ and U/D
¯ inputs will not
high state, activity on the INC
affect or change the position of the wiper.
¯¯¯ : Increment Control Input
INC
¯¯¯ input (on the falling edge) moves the wiper in
The INC
the up or down direction determined by the condition
¯ input.
of the U/D
DEVICE OPERATION
The CAT5111 operates like a digitally controlled
potentiometer with RH and RL equivalent to the high
and low terminals and RWB equivalent to the mecha–
nical potentiometer's wiper. There are 100 available
tap positions including the resistor end points, RH and
RL. There are 99 resistor elements connected in
series between the RH and RL terminals. The wiper
terminal is connected to one of the 100 taps and
¯¯¯, U/D
¯ and CS
¯¯ . These
controlled by three inputs, INC
inputs control a seven-bit up/down counter whose
output is decoded to select the wiper position. The
selected wiper position can be stored in nonvolatile
¯¯ inputs.
memory using the INC and CS
¯ : Up/Down Control Input
U/D
¯ input controls the direction of the wiper
The U/D
¯¯ is low, any
movement. When in a high state and CS
¯¯¯ will cause the wiper to
high-to-low transition on INC
move one increment toward the RH terminal. When in
¯¯ is low, any high-to-low transition
a low state and CS
¯¯¯ will cause the wiper to move one increment
on INC
towards the RL terminal.
RH: High End Potentiometer Terminal
RH is the high end terminal of the potentiometer. It is
not required that this terminal be connected to a
potential greater than the RL terminal. Voltage applied
to the RH terminal cannot exceed the supply voltage,
VCC or go below ground, GND.
¯¯ set LOW the CAT5111 is selected and will
With CS
¯ and INC
¯¯¯ inputs. HIGH to LOW
respond to the U/D
¯¯¯ wil increment or decrement the
transitions on INC
¯ input and
wiper (depending on the state of the U/D
seven-bit counter). The wiper, when at either fixed
terminal, acts like its mechanical equivalent and does
not move beyond the last position. The value of the
¯¯
counter is stored in nonvolatile memory whenever CS
¯¯¯ input is also HIGH.
transitions HIGH while the INC
When the CAT5111 is powered-down, the last stored
wiper counter position is maintained in the nonvolatile
memory. When power is restored, the contents of the
memory are recalled and the counter is set to the
value stored.
RWB: Wiper Potentiometer Terminal (Buffered)
RWB is the buffered wiper terminal of the poten–
tiometer. Its position on the resistor array is controlled
¯¯¯, U/D
¯ and CS
¯¯ .
by the control inputs, INC
RL: Low End Potentiometer Terminal
RL is the low end terminal of the potentiometer. It is
not required that this terminal be connected to a
potential less than the RH terminal. Voltage applied to
the RL terminal cannot exceed the supply voltage,
VCC or go below ground, GND. RL and RH are electrically interchangeable.
¯¯¯ set low, the CAT5111 may be de-selected
With INC
and powered down without storing the current wiper
position in nonvolatile memory. This allows the system
to always power up to a preset value stored in nonvolatile memory.
¯¯ : Chip Select
CS
The chip select input is used to activate the control
input of the CAT5111 and is active low. When in a
Doc. No. MD-2008 Rev. P
2
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CAT5111
OPERATION MODES
RH
¯¯¯
INC
¯¯
CS
¯
U/D
Operation
High to Low
Low
High
Wiper toward RH
High to Low
Low
Low
Wiper toward RL
High
Low to High
X
Store Wiper Position
Low
Low to High
X
No Store, Return to Standby
X
High
X
Standby
CH
RWI
RWB
CW
CL
Potentiometer
Equivalent Circuit
RL
ABSOLUTE MAXIMUM RATINGS(1)
Parameters
Supply Voltage
VCC to GND
Inputs
¯¯ to GND
CS
¯¯¯ to GND
INC
¯ to GND
U/D
RH to GND
RL to GND
RWB to GND
Ratings
Units
-0.5 to +7V
V
-0.5 to VCC +0.5
-0.5 to VCC +0.5
-0.5 to VCC +0.5
-0.5 to VCC +0.5
-0.5 to VCC +0.5
-0.5 to VCC +0.5
V
V
V
V
V
V
Parameters
Operating Ambient Temperature
Commercial (‘C’ or Blank suffix)
Industrial (‘I’ suffix)
Junction Temperature
Storage Temperature
Lead Soldering (10s max)
Ratings
Units
0 to 70
-40 to +85
+150
-65 to 150
+300
ºC
ºC
ºC
ºC
ºC
Max
Units
RELIABILITY CHARACTERISTICS
Symbol
Parameter
Test Method
Min
VZAP(2)
ILTH(2) (3)
Typ
ESD Susceptibility
MIL-STD-883, Test Method 3015
2000
V
Latch-Up
JEDEC Standard 17
100
mA
TDR
Data Retention
MIL-STD-883, Test Method 1008
100
Years
NEND
Endurance
MIL-STD-883, Test Method 1003
1,000,000
Stores
DC ELECTRICAL CHARACTERISTICS
VCC = +2.5V to +6V unless otherwise specified
Power Supply
Symbol
Parameter
VCC
Operating Voltage Range
ICC1
Supply Current (Increment)
ICC2
Supply Current (Write)
ISB1(3)
Supply Current (Standby)
Conditions
Min
Typ
Max
Units
2.5
–
6
V
VCC = 6V, f = 1MHz, IW = 0
–
–
200
µA
VCC = 6V, f = 250kHz, IW = 0
–
–
100
µA
Programming, VCC = 6V
–
–
1000
µA
VCC = 3V
¯¯ = VCC - 0.3V
CS
¯ , INC
¯¯¯ = VCC - 0.3V or GND
U/D
–
–
500
µA
–
75
150
µA
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2)
This parameter is tested initially and after a design or process change that affects the parameter.
(3)
Latch-up protection is provided for stresses up to 100mA on address and data pins from -1V to VCC + 1V
(4)
IW = source or sink
(5)
These parameters are periodically sampled and are not 100% tested.
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
3
Doc. No. MD-2008 Rev. P
CAT5111
Logic Inputs
Symbol
Parameter
Conditions
IIH
Input Leakage Current
VIN = VCC
–
–
10
µA
IIL
Input Leakage Current
VIN = 0V
–
–
-10
µA
2
–
VCC
V
0
–
0.8
V
VCC x 0.7
–
VCC + 0.3
V
-0.3
–
VCC x 0.2
V
VIH1
TTL High Level Input Voltage
VIL1
TTL Low Level Input Voltage
VIH2
CMOS High Level Input Voltage
VIL2
CMOS Low Level Input Voltage
4.5V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 6V
Min
Typ
Max
Units
Potentiometer Characteristics
Symbol
RPOT
Parameter
Potentiometer Resistance
Conditions
Min
Typ
-10 Device
10
-50 Device
50
-00 Device
100
Pot. Resistance Tolerance
Max
Units
kΩ
±20
%
VRH
Voltage on RH pin
0
VCC
V
VRL
Voltage on RL pin
0
VCC
V
Resolution
1
%
INL
Integral Linearity Error
IW ≤ 2µA
0.5
1
LSB
DNL
Differential Linearity Error
IW ≤ 2µA
0.25
0.5
LSB
ROUT
Buffer Output Resistance
0.05VCC ≤ VWB ≤ 0.95VCC,
VCC = 5V
1
Ω
IOUT
Buffer Output Current
0.05VCC ≤ VWB ≤ 0.95VCC,
VCC = 5V
3
mA
TCRPOT
TC of Pot Resistance
300
ppm/ºC
TCRATIO
Ratiometric TC
TBD
ppm/ºC
Isolation Resistance
TBD
Ω
8/8/25
pF
1.7
MHz
RISO
CRH/CRL/CRW Potentiometer Capacitances
fc
Frequency Response
Passive Attenuator, 10kΩ
VWB(SWING)
Output Voltage Range
IOUT ≤ 100µA, VCC = 5V
Doc. No. MD-2008 Rev. P
4
0.01VCC
0.99VCC
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CAT5111
AC CONDITIONS OF TEST
VCC Range
2.5V ≤ VCC ≤ 6V
Input Pulse Levels
0.2VCC to 0.7VCC
Input Rise and Fall Times
10ns
Input Reference Levels
0.5VCC
AC OPERATING CHARACTERISTICS
VCC = +2.5V to +6.0V, VH = VCC, VL = 0V, unless otherwise specified
Symbol
tCI
tDI
tID
tIL
tIH
tIC
tCPH
tCPH
tIW
tCYC
tR, tF
tPU
(2)
(2)
tWR
Parameter
Min
Typ (1)
Max
Units
¯¯ to INC
¯¯¯ Setup
CS
¯ to INC
¯¯¯ Setup
U/D
100
–
–
ns
50
–
–
ns
¯ to INC
¯¯¯ Hold
U/D
¯¯¯ LOW Period
INC
100
–
–
ns
250
–
–
ns
¯¯¯ HIGH Period
INC
¯¯¯ Inactive to CS
¯¯ Inactive
INC
250
–
–
ns
1
–
–
µs
¯¯ Deselect Time (NO STORE)
CS
¯¯ Deselect Time (STORE)
CS
100
–
–
ns
10
–
–
ms
¯¯¯ to VOUT Change
INC
¯¯¯ Cycle Time
INC
–
1
5
µs
1
–
–
µs
¯¯¯ Input Rise and Fall Time
INC
–
–
500
µs
Power-up to Wiper Stable
–
–
1
ms
Store Cycle
–
5
10
ms
A.C. TIMING
CS
tCI
tIL
tCYC
tIC
tIH
(store)
tCPH
90%
INC
90%
10%
tDI
tID
tF
U /D
tIW
tR
MI(3)
RWB
Notes:
(1)
(2)
(3)
Typical values are for TA = 25ºC and nominal supply voltage.
This parameter is periodically sampled and not 100% tested.
MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
5
Doc. No. MD-2008 Rev. P
CAT5111
PACKAGE OUTLINES
PDIP 8-LEAD (300MIL) (L)
E1
E
D
A2
A
c
A1
L
e
eB
b2
b
SYMBOL
A
A1
A2
b
b2
c
D
E
E1
e
eB
L
MIN
NOM
MAX
4.57
0.38
3.05
0.36
1.14
0.21
9.02
7.62
6.09
7.87
2.92
0.46
0.26
7.87
6.35
2.54 BSC
3.81
0.56
1.77
0.35
10.16
8.25
7.11
9.65
3.81
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC Standard MS001.
(3) Dimensioning and tolerancing per ANSI Y14.5M-1982
Doc. No. MD-2008 Rev. P
6
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CAT5111
SOIC 8-LEAD NARROW BODY (150MIL) (V)
E1
E
h x 45
D
C
A
Ө1
e
A1
L
b
SYMBOL
MIN
A1
A
b
C
D
E
E1
e
h
L
Ө1
0.10
1.35
0.33
0.19
4.80
5.80
3.80
NOM
MAX
0.25
1.75
0.51
0.25
5.00
6.20
4.00
1.27 BSC
0.25
0.40
0°
0.50
1.27
8°
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC Specification MS-012.
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
7
Doc. No. MD-2008 Rev. P
CAT5111
8-LEAD TSSOP (Y)
D
5
8
SEE DETAIL A
c
E
E1
E/2
GAGE PLANE
4
1
PIN #1 IDENT.
0.25
θ1
L
A2
SEATING PLANE
SEE DETAIL A
A
e
A1
b
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
θ1
MIN
0.05
0.80
0.19
0.09
2.90
6.30
4.30
0.50
0.00
NOM
0.90
3.00
6.4
4.40
0.65 BSC
0.60
MAX
1.20
0.15
1.05
0.30
0.20
3.10
6.50
4.50
0.75
8.00
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC Standard MO-153
Doc. No. MD-2008 Rev. P
8
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CAT5111
8-LEAD MSOP (Z)
E1
e
e
E
e
D
GAUGE
PLANE
A2
A
c
L2
θ
b
L
A1
L1
SYMBOL
MIN
NOM
MAX
0.05
0.10
0.15
A
A1
1.1
A2
0.75
0.85
0.95
b
0.28
0.33
0.38
D
2.90
3.00
3.10
E
4.80
4.90
5.00
E1
2.90
3.00
3.10
c
e
L
0.65 BSC
0.35
0.45
0.55
L1
L2
Ө
0º
6º
For current Tape and Reel information,
download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC Specification MS-187.
(3) Stand off height/coplanarity are considered as special characteristics.
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
9
Doc. No. MD-2008 Rev. P
CAT5111
EXAMPLE OF ORDERING INFORMATION
Prefix
CAT
Device #
Suffix
5111
V
Optional
Company ID
I
-10
Temperature Range
I = Industrial (-40ºC to 85ºC)
Product Number
5111
L:
V:
Y:
Z:
Resistance
-10: 10k ohms
-50: 50k ohms
-00: 100k ohms
Package
PDIP
SOIC
TSSOP
MSOP
–
G(4)
T3
Tape & Reel
T: Tape & Reel
3: 3000/Reel
Lead Finish
Blank: Matte-Tin
G:NiPdAu
Notes:
(1)
(2)
(3)
(4)
All packages are RoHS compliant.
Standard lead finish is NiPdAu.
This device used in the above example is a CAT5111VI-10-GT3 (SOIC, Industrial Temperature, 10kΩ, NiPdAu, Tape & Reel).
For Matte-Tin finish, contact factory.
ORDERING PART NUMBER
CAT5111LI-10-G
CAT5111LI-50-G
CAT5111LI-00-G
CAT5111VI-10-G
CAT5111VI-50-G
CAT5111VI-00-G
CAT5111YI-10-G
CAT5111YI-50-G
CAT5111YI-00-G
CAT5111ZI-10-G
CAT5111ZI-50-G
CAT5111ZI-00-G
Doc. No. MD-2008 Rev. P
10
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
REVISION HISTORY
Date
3/10/2004
3/29/2004
4/12/2004
Rev.
M
N
O
06/01/2007
P
Reason
Updated Potentiometer Parameters
Changed Green Package marking for SOIC from W to V
Updated Reel Ordering Information
Updated Example of Ordering Information
Added Package Outline
Added MD- in front of Document No.
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Beyond Memory™, DPP™, EZDim™, LDD™, LDD™, MiniPot™ and Quad-Mode™
Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products.
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PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE
RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING
OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.
Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a situation where
personal injury or death may occur.
Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets labeled
"Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.
Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical
semiconductor applications and may not be complete.
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Corporate Headquarters
2975 Stender Way
Santa Clara, CA 95054
Phone: 408.542.1000
Fax:
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www.catsemi.com
Document No: MD-2008
Revision:
P
Issue date:
06/01/07