CIMD6A SURFACE MOUNT, SUPERmini™ DUAL COMPLEMENTARY SILICON DIGITAL TRANSISTORS 50V, 100mA Central TM Semiconductor Corp. DESCRIPTION: The Central Semiconductor CIMD6A is a Dual Complementary Digital Transistor in a SUPERmini™ SOT-26R surface mount package, designed for switching applications, interface circuit and driver circuit applications. MARKING CODE: CD6 SOT-26R CASE MAXIMUM RATINGS PER TRANSISTOR (TA=25°C) SYMBOL Collector-Emitter Voltage VCEO Collector-Base Voltage Emitter-Base Voltage Collector Current Power Dissipation UNITS 50 V VCBO 50 V VEBO 5.0 V IC PD 100 mA 350 mW TJ,Tstg -55 to +150 °C ΘJA 357 °C/W Operating and Storage Junction Temperature Thermal Resistance ELECTRICAL CHARACTERISTICS PER TRANSISTOR (TA=25°C) SYMBOL TEST CONDITIONS ICBO IEBO BVCBO IC=50µA IC=1.0mA BVCEO BVEBO MAX UNITS VCB=50V 500 nA VEB=4.0V 500 nA hFE IE=50µA IC=5.0mA, IB=250µA VCE=5.0V, IC=1.0mA * fT R1=R2 VCE=10V, IC=5.0mA, f=100MHz - VCE(SAT) MIN TYP 50 V 50 V 5.0 V 0.3 100 600 250 3.3 V 4.7 MHz 6.1 KΩ * Characteristic of transistor only R2 (6-August 2003) Central TM CIMD6A Semiconductor Corp. SURFACE MOUNT, SUPERmini™ DUAL COMPLEMENTARY SILICON DIGITAL TRANSISTORS 50V, 100mA SOT-26R CASE - MECHANICAL OUTLINE with Reverse Pin Configuration E A F 4 B C 5 6 H G 3 2 1 R0 I J D Note: The R suffix added to case type indicates reverse pin configuration as compared with a standard SOT-26 case. All other package specifications are equivalent to SOT-26 package. Please refer to SOT-26 Package Details datasheet for Mounting Pad Geometry, Tape Dimensions & Orientation, Packaging Base, Reel Labeling & Packing Information, and Ordering information. 5 4 6 R1 Q1 R2 Q2 3 2 1 LEAD CODE: 1) COLLECTOR Q1 2) BASE Q2 3) EMITTER Q2 4) COLLECTOR Q2 5) BASE Q1 6) EMITTER Q1 MARKING CODE: CD6 R2 (6-August 2003)