PROCESS CP235 Central Power Transistor TM Semiconductor Corp. NPN - Silicon Power Transistor Chip PROCESS DETAILS Process GLASS PASSIVATED MESA Die Size 106 x 106 MILS Die Thickness 12 MILS Base Bonding Pad Area 25 x 33 MILS Emitter Bonding Pad Area 30 x 36 MILS Top Side Metallization Al 50,000Å Back Side Metallization Ag 10,000Å GEOMETRY GROSS DIE PER 4 INCH WAFER 950 PRINCIPAL DEVICE TYPES 2N3055 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R1 (20-March 2006) Central TM Semiconductor Corp. 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com PROCESS CP235 Typical Electrical Characteristics R1 (20-March 2006)