PROCESS CP337V Small Signal Transistors NPN - Saturated Switch Transistor Chip PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 29 x 29 MILS Die Thickness 7.1 MILS Base Bonding Pad Area 11.8 x 4.5 MILS Emitter Bonding Pad Area 11.8 x 4.5 MILS Top Side Metalization Al - Back Side Metalization Au-As - 13,000Å 30,000Å GEOMETRY GROSS DIE PER 4 INCH WAFER 13,192 PRINCIPAL DEVICE TYPES 2N3725A 2N4014 BACKSIDE COLLECTOR 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R0 (26-August 2005)