TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 200mA, Low Quiescent Current, Ultra-Low Noise, High PSRR Low Dropout Linear Regulator FEATURES APPLICATIONS • • • • • • • • • • • • • • • 200mA Low Dropout Regulator with EN Low IQ: 40µA Available in Multiple Output Voltage Versions: – Fixed Outputs of 1.2V, 1.5V, 1.6V, 1.8V, 1.9V, 2.5V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V, 3.2V, and 3.3V – Adjustable Outputs from 1.2V to 6.5V – Additional Outputs Available Using Innovative Factory EEPROM Programming High PSRR: 66dB at 1kHz Ultra-low Noise: 29.5µVRMS Fast Start-Up Time: 45µs Stable with a Low-ESR, 2.0µF Typical Output Capacitance Excellent Load/Line Transient Response 2% Overall Accuracy (Load/Line/Temp) Very Low Dropout: 100mV ThinSOT-23, WCSP, and 2mm x 2mm SON-6 Packages TPS799xxDDC TSOT23−5 (TOP VIEW) Cellular Phones Wireless LAN, Bluetooth™ VCOs, RF Handheld Organizers, PDAs DESCRIPTION The TPS799xx family of low-dropout (LDO) low-power linear regulators offer excellent AC performance with very low ground current. High power-supply rejection ratio (PSRR), low noise, fast start-up, and excellent line and load transient response are provided while consuming a very low 40µA (typical) ground current. The TPS799xx is stable with ceramic capacitors and uses an advanced BiCMOS fabrication process to yield dropout voltage typically 110mV at 200mA output. The TPS799xx uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over all load, line, process, and temperature variations. It is fully specified from TJ = -40°C to +125°C and is offered in low profile ThinSOT23, Wafer Chip-Scale (WCSP), and 2mm x 2mm SON packages, ideal for wireless handsets and WLAN cards. TPS79901DDC TSOT23−5 (TOP VIEW) TPS799xxYZU WCSP (TOP VIEW) C3 IN GND 1 5 OUT IN GND 2 5 1 OUT 2 IN 3 4 NR EN 1 NR 2 4 3 GND 3 GND C3 OUT GND TPS799xxDRV 2mm x 2mm SON−6 (TOP VIEW) OUT C1 B2 A3 EN TPS79901YZU WCSP (TOP VIEW) 6 IN 5 N/C 4 EN FB IN C1 OUT B2 GND A1 A3 NR EN FB A1 EN TPS79901DRV 2mm x 2mm SON−6 (TOP VIEW) OUT 1 FB 2 GND 3 GND 6 IN 5 N/C 4 EN Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a trademark of Bluetooth SIG, Inc. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005, Texas Instruments Incorporated TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) VOUT (2) PRODUCT XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable). (3) YYY is package designator. Z is package quantity. TPS799xxyyyz (1) (2) (3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Output voltages from 1.2V to 4.5V in 50mV increments are available through the use of innovative factory EEPROM programming; minimum order quantities may apply. Contact factory for details and availability. For fixed 1.2V operation, tie FB to OUT. ABSOLUTE MAXIMUM RATINGS Over operating temperature range (unless otherwise noted) (1) PARAMETER TPS799xx UNIT VIN range –0.3 to +7.0 V VEN range –0.3 to VIN +0.3 V VOUT range –0.3 to VIN +0.3 V Peak output current Internally limited Continuous total power dissipation See Dissipation Ratings Table Junction temperature range, TJ –55 to +150 °C Storage junction temperature range , TSTG –55 to +150 °C ESD rating, HBM 2 kV ESD rating, CDM 500 V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. DISSIPATION RATINGS BOARD PACKAGE RθJC RθJA DERATING FACTOR ABOVE TA = 25°C TA < 25°C TA = 70°C TA = 85°C Low-K (1) DDC 90°C/W 280°C/W 3.6mW/°C 360mW 200mW 145mW High-K (2) DDC 90°C/W 200°C/W 5.0mW/°C 500mW 275mW 200mW Low-K (1) YZU 27°C/W 255°C/W 3.9mW/°C 390mW 215mW 155mW High-K (2) YZU 27°C/W 190°C/W 5.3mW/°C 530mW 295mW 215mW Low-K (1) DRV 20°C/W 140°C/W 7.1mW/°C 715mW 395mW 285mW High-K (2) DRV 20°C/W 65°C/W 15.4mW/°C 1540mW 845mW 615mW (1) (2) 2 The JEDEC low-K (1s) board used to derive this data was a 3in x 3in, two-layer board with 2-ounce copper traces on top of the board. The JEDEC high-K (2s2p) board used to derive this data was a 3in x 3in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 ELECTRICAL CHARACTERISTICS Over operating temperature range (TJ = – 40°C to +125°C), VIN = VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT = 1mA, VEN = VIN, COUT = 2.2µF, CNR = 0.01µF, unless otherwise noted. For TPS79901, VOUT = 3.0V. Typical values are at TJ = +25°C. PARAMETER TEST CONDITIONS range (1) VIN Input voltage VFB Internal reference (TPS79901) Output voltage range (TPS79901) VOUT Output accuracy VOUT ∆VOUT%/ ∆VIN Output (1) (2) +2.0 % 500µA ≤ IOUT≤ 200mA IOUT = 200mA ICL Output current limit VOUT = 0.9 × VOUT(NOM) IGND Ground pin current 500µA ≤ IOUT ≤ 200mA ISHDN Shutdown current (IGND) VEN ≤ 0.4V, 2.7V ≤ VIN ≤ 6.5V Feedback pin current (TPS79901) Power-supply rejection ratio VIN = 3.85V, VOUT = 2.85V, CNR = 0.01µF, IOUT = 100mA Output noise voltage BW = 10Hz to 100kHz, VOUT = 2.8V Startup time VOUT = 2.85V, RL = 14Ω, COUT = 2.2µF IEN(HI) Enable pin current, enabled TSD Thermal shutdown temperature TJ Operating junction temperature UVLO % VOUT(NOM) + 0.3V ≤ VIN≤ 6.5V VOUT≥ 3.3V Enable low (shutdown) +1.0 -2.0 Dropout voltage (VIN = VOUT(NOM) - 0.1V) VEN(LO) V -1.0 VDO Enable high (enabled) 6.5-VDO VOUT + 0.3V ≤ VIN ≤ 6.5V 500µA ≤ IOUT ≤ 200mA Line regulation (1) VEN(HI) V VFB TJ = +25°C VOUT < 3.3V IOUT = 200mA TSTR V 1.217 Over VIN, IOUT, Temp VDO VN 6.5 1.193 1.169 Dropout voltage (2) (VIN = VOUT(NOM) - 0.1V) PSRR MAX Nominal ∆VOUT%/ ∆IOUT Load regulation IFB TYP 2.7 VOUT accuracy (1) MIN 200 ±1.0 UNIT 0.02 %/V 0.002 %/mA 100 175 mV 90 160 mV 400 600 mA 40 60 µA 0.15 1.0 µA 0.5 µA -0.5 f = 100Hz 70 dB f = 1kHz 66 dB f = 10kHz 51 dB f = 100kHz 38 dB CNR = 0.01µF 29.5 µVRMS CNR = none 263 µVRMS CNR = 0.001µF 45 µs CNR = 0.047µF 45 µs CNR = 0.01µF 50 µs CNR = none 50 1.2 µs VIN 0 V 0.4 V 1.0 µA VEN = VIN = 6.5V 0.03 Shutdown, temperature increasing 165 °C Reset, temperature decreasing 145 °C –40 Under voltage lockout VIN rising Hysteresis VIN falling 1.90 +125 2.20 70 2.50 °C V mV Minimum VIN = VOUT + VDO or 2.7V, whichever is greater. VDO is not measured for devices with VOUT(NOM) < 2.8V because minimum VIN = 2.7V. 3 TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 DEVICE INFORMATION FUNCTIONAL BLOCK DIAGRAMS IN OUT IN OUT 400Ω 400Ω 2µA Current Limit Overshoot Detect Thermal Shutdown EN 3.3MΩ Current Limit Overshoot Detect Thermal Shutdown EN UVLO UVLO Quickstart 1.193V Bandgap 1.193V Bandgap NR FB 500k 500k GND GND Figure 1. Fixed Voltage Versions Figure 2. Adjustable Voltage Versions PIN CONFIGURATIONS TPS799xxDDC TSOT23−5 (TOP VIEW) TPS79901DDC TSOT23−5 (TOP VIEW) TPS799xxYZU WCSP (TOP VIEW) C3 IN GND 1 OUT 5 IN GND 2 5 1 OUT 2 IN 3 EN NR 4 1 NR 2 4 3 GND 3 GND C3 OUT GND TPS799xxDRV 2mm x 2mm SON−6 (TOP VIEW) OUT C1 B2 A3 EN TPS79901YZU WCSP (TOP VIEW) 6 IN 5 N/C 4 EN FB IN C1 OUT B2 GND A1 A3 NR EN FB A1 EN TPS79901DRV 2mm x 2mm SON−6 (TOP VIEW) OUT 1 FB 2 GND 3 GND 6 IN 5 N/C 4 EN Table 1. PIN DESCRIPTIONS TPS799xx 4 NAME DDC YZU DRV IN 1 C3 6 DESCRIPTION GND 2 B2 3, Pad EN 3 A1 4 Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. EN can be connected to IN if not used. NR 4 A3 2 Fixed voltage versions only; connecting an external capacitor to this pin bypasses noise generated by the internal bandgap. This allows output noise to be reduced to very low levels. FB 4 A3 2 Adjustable version only; this is the input to the control loop error amplifier, and is used to set the output voltage of the device. OUT 5 C1 1 Output of the regulator. A small capacitor (total typical capacitance ≥ 2.0µF ceramic) is needed from this pin to ground to assure stability. N/C — — 5 Not internally connected. This pin must either be left open, or tied to GND. Input supply. Ground. The pad must be tied to GND. TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS Over operating temperature range (TJ=- 40°C to +125°C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2µF, CNR=0.01µF, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25°C. LOAD REGULATION LINE REGULATION 28.50 1.0 21.38 0.8 IOUT = 100mA Change in VOUT (%) Change in VOUT (mV) 0.6 14.25 TJ = +25°C 7.13 TJ = −40°C 0 −7.13 −14.25 TJ = +125°C −21.38 TJ = −40°C 0.4 TJ = +25°C 0.2 0 −0.2 TJ = +125°C −0.4 TJ = +85°C −0.6 TJ = +85°C −0.8 −1.0 −28.50 0 50 100 150 2.5 200 3.5 4.5 5.5 6.5 7.5 VIN (V) IOUT (mA) Figure 3. Figure 4. OUTPUT VOLTAGE vs JUNCTION TEMPERATURE TPS799285 DROPOUT VOLTAGE vs OUTPUT CURRENT 200 2.0 180 1.5 TJ = +125 C 1.0 IOUT = 1mA 0.5 0 −0.5 IOUT = 200mA −1.0 TJ = +85 C 140 IOUT = 100mA VDO (mV) Change in VOUT (%) 160 120 100 80 TJ = +25C 60 40 −1.5 TJ = −40 C 20 −2.0 0 −40 −25 −15 5 20 35 50 65 80 95 0 110 125 50 100 TJ (°C) Figure 5. Figure 6. TPS799285 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE TPS79901 DROPOUT vs INPUT VOLTAGE 200 110 180 100 200 I OUT = 200mA 90 160 I OUT = 200mA 120 100 IOUT = 100mA 80 60 80 VDO (mV) 140 VDO (mV) 150 I OUT (mA) 70 60 50 40 30 40 20 20 IOUT = 1mA 10 0 0 −40 −25 −15 5 20 35 50 TJ (°C) Figure 7. 65 80 95 110 125 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 VIN (V) Figure 8. 5 TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ=- 40°C to +125°C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2µF, CNR=0.01µF, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25°C. GROUND PIN CURRENT vs INPUT VOLTAGE TPS799285 GROUND PIN CURRENT vs JUNCTION TEMPERATURE 60 60 50 50 VIN = 3.2V VIN = 5.0V IOUT = 200mA 40 IOUT = 500µA IGND (µA) IGND (µA) 40 30 30 20 20 10 10 0 VIN = 2.7V (dropout) VOUT = 2.85V IOUT = 200mA 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.5 6.0 −40 −25 −15 7.0 5 20 VIN (V) 600 65 80 95 110 125 Figure 9. Figure 10. GROUND PIN CURRENT (DISABLED) vs JUNCTION TEMPERATURE TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 1.0V) 90 VEN = 0.4V I OUT = 100mA 80 I OUT = 1mA 70 PSRR (dB) 400 IGND (nA) 50 TJ (°C) 500 300 60 VIN = 6.5V 40 20 100 10 VIN = 3.2V CNR = 0.01µF COUT = 2.2µF 0 0 −40 −25 −15 IOUT = 200mA 50 30 200 5 20 35 50 TJ (°C) Figure 11. 6 35 65 80 95 110 125 10 100 1k 10k 100k Frequency (Hz) Figure 12. 1M 10M TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ=- 40°C to +125°C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2µF, CNR=0.01µF, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25°C. TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 0.5V) TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 0.25V) 90 90 IOUT = 100mA IOUT = 1mA 80 70 70 60 60 PSRR (dB) PSRR (dB) 80 50 40 30 IOUT = 200mA 10 CNR = 0.01µF COUT = 2.2µF IOUT = 100mA 0 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M Frequency (Hz) Frequency (Hz) Figure 13. Figure 14. TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 1.0V) TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 0.25V) 90 90 80 80 IOUT = 1mA 70 60 IOUT = 200mA 50 40 30 60 50 40 IOUT = 200mA 30 20 10 IOUT = 1mA 70 PSRR (dB) PSRR (dB) 40 20 IOUT = 200mA CNR = 0.01µF COUT = 2.2µF 0 20 CNR = 0.01µF COUT = 10.0µF 10 0 CNR = 0.01µF COUT = 10.0µF 0 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) Figure 15. Figure 16. TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 1.0V) POWER-SUPPLY RIPPLE REJECTION vs VIN - VOUT, IOUT = 1mA 90 90 80 80 70 0.1kHz 1kHz 60 60 50 40 30 50 40 100kHz 10kHz 30 20 20 10 1MHz 10M 70 IOUT = 1mA PSRR (dB) PSRR (dB) 50 30 20 10 IOUT = 1mA IOUT = 200mA CNR = None COUT = 10.0µF 10 0 10 100 1k 10k 100k 1M 10M 0 0.0 CNR = 0.01µF COUT = 2.2µF 0.5 1.0 1.5 2.0 2.5 Frequency (Hz) VIN − VOUT (V) Figure 17. Figure 18. 3.0 3.5 4.0 7 TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ=- 40°C to +125°C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2µF, CNR=0.01µF, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25°C. POWER-SUPPLY RIPPLE REJECTION vs VIN - VOUT, IOUT = 100mA POWER-SUPPLY RIPPLE REJECTION vs VIN - VOUT, IOUT = 200mA 90 90 0.1kHz 80 70 1kHz 70 60 60 10kHz PSRR (dB) PSRR (dB) 0.1kHz 80 1kHz 50 40 30 100kHz 1MHz 20 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 40 30 100kHz 1MHz 20 CNR = 0.01µF COUT = 2.2µF 10 10kHz 50 CNR = 0.01µF COUT = 2.2µF 10 0 0.0 4.0 0.5 1.0 1.5 2.0 2.5 3.0 VIN − VOUT (V) VIN − VOUT (V) Figure 19. Figure 20. TPS799285 TOTAL NOISE vs CNR TPS799285 TOTAL NOISE vs COUT 200 4.0 35 IOUT = 1mA COUT = 2.2µF 180 3.5 30 Total Noise (µVrms) Total Noise (µVrms) 160 140 120 100 80 60 25 20 15 10 40 5 20 0 0.01 IOUT = 1mA CNR = 0.01µF 0 0.1 10 1 0 5 10 CNR (nF) 15 20 25 COUT (µF) Figure 21. Figure 22. TPS799285 LINE TRANSIENT RESPONSE TPS799285 LOAD TRANSIENT RESPONSE VIN = 3.35V IOUT = 150mA COUT = 2.2µF 100mV/div IOUT COUT = 10µF 20mV/div VOUT COUT = 10 µF 100mV/div 20mV/div C OUT = 2.2µF VOUT 4.15V dVIN = 1V/µs 1V/div 1mA IOUT VIN 20µs/div Figure 23. 8 150mA 100mA/div dt 3.15V IOUT 20µs/div Figure 24. TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ=- 40°C to +125°C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2µF, CNR=0.01µF, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25°C. TPS799285 TURN-ON RESPONSE (VEN = VIN) TPS799285 ENABLE RESPONSE RLOAD = 19Ω COUT = 2.2µF VIN = 3.85V RLOAD = 19Ω, 2.85kΩ COUT = 2.2µF VOUT VOUT RLOAD = 19Ω, 2.85kΩ COUT = 10µF RLOAD = 2.85kΩ C OUT = 2.2µF, 10µF 1V/div 1V/div 3.85V VIN 0V 4V/div VEN 5V/div 10µs/div 10µs/div Figure 25. Figure 26. TPS799285 POWER-UP / POWER-DOWN 7 RL = 19Ω 6 VIN 5 Volts 4 3 2 VOUT 1 0 −1 50ms/div Figure 27. 9 TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 APPLICATION INFORMATION The TPS799xx family of LDO regulators combines the high performance required of many RF and precision analog applications with ultra-low current consumption. High PSRR is provided by a high gain, high bandwidth error loop with good supply rejection at very low headroom (VIN – VOUT). Fixed voltage versions provide a noise reduction pin to bypass noise generated by the bandgap reference and to improve PSRR while a quick-start circuit fast-charges this capacitor at startup for quick startup times. The combination of high performance and low ground current also make the TPS799xx an excellent choice for portable applications. All versions have thermal and over-current protection and are fully specified from –40°C to +125°C. Figure 28 shows the basic circuit connections for fixed voltage models. Figure 29 gives the connections for the adjustable output version (TPS79901). R1 and R2 can be calculated for any output voltage using the formula in Figure 29. Sample resistor values for common output voltages are shown in Figure 29. Optional input capacitor. May improve source impedance, noise, or PSRR. VIN Optional input capacitor. May improve source impedance, noise, or PSRR. IN GND VIN NR IN R2 × 1.193 2.2µF Ceramic Optional bypass capacitor to reduce output noise and increase PSRR. Figure 28. Typical Application Circuit for Fixed Voltage Versions VOUT OUT TPS799xx EN VEN (R1 + R2) VOUT OUT TPS799xx EN VOUT = GND R1 FB CFB 2.2µF Ceramic R2 VEN Figure 29. Typical Application Circuit for Adjustable Voltage Version Input and Output Capacitor Requirements Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1µF to 1µF low ESR capacitor across the input supply near the regulator. This will counteract reactive input sources and improve transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or the device is located several inches from the power source. If source impedance is not sufficiently low, a 0.1µF input capacitor may be necessary to ensure stability. The TPS799xx is designed to be stable with standard ceramic capacitors of values 2.2µF or larger. X5R and X7R type capacitors are best as they have minimal variation in value and ESR over temperature. Maximum ESR should be < 1.0Ω. Feedback Capacitor Requirements (TPS79901 only) The feedback capacitor, CFB, shown in Figure 29 is required for stability. For a parallel combination of R1 and R2 equal to 250kΩ, any value from 3pF to 1nF can be used. Fixed voltage versions have an internal 30pF feedback capacitor which is quick-charged at start-up. The adjustable version does not have this quick-charge circuit, so values below 5pF should be used to ensure fast startup; values above 47pF can be used to implement an output voltage soft-start. Larger value capacitors also improve noise slightly. The TPS79901 is stable in unity-gain configuration (OUT tied to FB) without CFB. 10 TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 Output Noise In most LDOs, the bandgap is the dominant noise source. If a noise reduction capacitor (CNR) is used with the TPS799xx, the bandgap does not contribute significantly to noise. Instead, noise is dominated by the output resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01µF noise reduction capacitor; for the adjustable version, smaller value resistors in the output resistor divider reduce noise. A parallel combination that gives 2µA of divider current will have the same noise performance as a fixed voltage version. To further optimize noise, equivalent series resistance of the output capacitor can be set to approximately 0.2Ω. This configuration maximizes phase margin in the control loop, reducing total output noise by up to 10%. Noise can be referred to the feedback point (FB pin) such that with CNR = 0.01µF total noise is approximately given by Equation 1: 10.7VRMS VN VOUT V (1) The TPS79901 adjustable version does not have the noise-reduction pin available, so ultra-low noise operation is not possible. Noise can be minimized according to the above recommendations. Board Layout Recommendations to Improve PSRR and Noise Performance To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device. Internal Current Limit The TPS799xx internal current limit helps protect the regulator during fault conditions. During current limit, the output will source a fixed amount of current that is largely independent of output voltage. For reliable operation, the device should not be operated in current limit for extended periods of time. The PMOS pass element in the TPS799xx has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting may be appropriate. Shutdown The enable pin (EN) is active high and is compatible with standard and low voltage TTL-CMOS levels. When shutdown capability is not required, EN can be connected to IN. Dropout Voltage The TPS799xx uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output resistance is the RDS,ON of the PMOS pass element. Because the PMOS device behaves like a resistor in dropout, VDO will approximately scale with output current. As with any linear regulator, PSRR and transient response are degraded as (VIN – VOUT) approaches dropout. This effect is shown in Figure 18 through Figure 20 in the Typical Characteristics section. Startup Fixed voltage versions of the TPS799xx use a quick-start circuit to fast-charge the noise reduction capacitor, CNR, if present (see Functional Block Diagrams, Figure 1). This allows the combination of very low output noise and fast start-up times. The NR pin is high impedance so a low leakage CNR capacitor must be used; most ceramic capacitors are appropriate in this configuration. Note that for fastest startup, VIN should be applied first, then the enable pin (EN) driven high. If EN is tied to IN, startup will be somewhat slower. Refer to Figure 25 and Figure 26 in the Typical Characteristics section. The quick-start switch is closed for approximately 135µs. To ensure that CNR is fully charged during the quick-start time, a 0.01µF or smaller capacitor should be used. 11 TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 Transient Response As with any regulator, increasing the size of the output capacitor will reduce over/undershoot magnitude but increase duration of the transient response. In the adjustable version, adding CFB between OUT and FB will improve stability and transient response. The transient response of the TPS799xx is enhanced by an active pull-down that engages when the output overshoots by approximately 5% or more when the device is enabled. When enabled, the pull-down device behaves like a 350Ω resistor to ground. Under-Voltage Lock-Out (UVLO) The TPS799xx utilizes an under-voltage lock-out circuit to keep the output shut off until internal circuitry is operating properly. The UVLO circuit has a de-glitch feature so that it will typically ignore undershoot transients on the input if they are less than 50µs duration. Minimum Load The TPS799xx is stable and well-behaved with no output load. To meet the specified accuracy, a minimum load of 500µA is required. Below 500µA at junction temperatures near +125°C, the output can drift up enough to cause the output pull-down to turn on. The output pull-down will limit voltage drift to 5% typically but ground current could increase by approximately 50µA. In typical applications, the junction cannot reach high temperatures at light loads since there is no appreciable dissipated power. The specified ground current would then be valid at no load in most applications. Thermal Information Thermal Protection Thermal protection disables the output when the junction temperature rises to approximately +165°C, allowing the device to cool. When the junction temperature cools to approximately +145°C the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage due to overheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to +125°C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least +35°C above the maximum expected ambient condition of your particular application. This configuration produces a worst-case junction temperature of +125°C at the highest expected ambient temperature and worst-case load. The internal protection circuitry of the TPS799xx has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS799xx into thermal shutdown will degrade device reliability. Power Dissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the PCB layout. The PCB area around the device that is free of other components moves the head from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Dissipation Ratings table. Using heavier copper will increase the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers will also improve the heatsink effectiveness. Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the output current time the voltage drop across the output pass element, as shown in Equation 2: P D VINV OUT I OUT (2) Package Mounting Solder pad footprint recommendations for the TPS799xx are available from the Texas Instruments' web site at www.ti.com. 12 TPS799xx www.ti.com SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005 Thermal Information (continued) 1,052 0,952 1,416 1,316 Pin A1 Index Area 0,35 0,25 0,625 Max 0,30 0,20 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. NanoStar package configuration. NanoStar is a trademark of Texas Instruments. Figure 30. YZU Wafer Chip-Scale Preliminary Package Dimensions (mm) 13 PACKAGE OPTION ADDENDUM www.ti.com 5-Dec-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS79901DDCR ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79901DDCRG4 ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79901DDCT ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79901DDCTG4 ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79901DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79901DRVT ACTIVE SON DRV 6 250 CU NIPDAU Level-1-260C-UNLIM TPS79901YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79901YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79912YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79912YZUT ACTIVE DSBGA YZU 5 250 SNAG Level-1-260C-UNLIM TPS79915DDCR ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79915DDCRG4 ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79915DDCT ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79915DDCTG4 ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79918DDCR ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79918DDCRG4 ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79918DDCT ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79918DDCTG4 ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79918DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79918DRVT ACTIVE SON DRV 6 250 CU NIPDAU Level-1-260C-UNLIM TPS79918YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79918YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79919YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79919YZUT ACTIVE DSBGA YZU 5 250 SNAG Level-1-260C-UNLIM TPS79925DDCR ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 5-Dec-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS79925DDCRG4 ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79925DDCT ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79925DDCTG4 ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79925YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79925YZUT ACTIVE DSBGA YZU 5 250 SNAG Level-1-260C-UNLIM TPS79927DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79927DRVT ACTIVE SON DRV 6 250 CU NIPDAU Level-1-260C-UNLIM TPS79927YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79927YZUT ACTIVE DSBGA YZU 5 250 SNAG Level-1-260C-UNLIM TPS799285DDCR ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS799285DDCRG4 ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS799285DDCT ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS799285DDCTG4 ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS799285YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS799285YZUT ACTIVE DSBGA YZU 5 250 SNAG Level-1-260C-UNLIM TPS79928DDCR ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79928DDCRG4 ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79928DDCT ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79928DDCTG4 ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79928DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79928DRVT ACTIVE SON DRV 6 250 CU NIPDAU Level-1-260C-UNLIM TPS79928YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79928YZUT ACTIVE DSBGA YZU 5 250 SNAG Level-1-260C-UNLIM TPS79930DDCR ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79930DDCRG4 ACTIVE TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79930DDCT ACTIVE TO/SOT DDC 5 250 CU NIPDAU Level-1-260C-UNLIM Addendum-Page 2 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 5-Dec-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS79930DDCTG4 ACTIVE TO/SOT DDC 5 250 TPS79930YZUR ACTIVE DSBGA YZU 5 TPS79930YZUT ACTIVE DSBGA YZU TPS79933DDCR ACTIVE TO/SOT TPS79933DDCRG4 ACTIVE TPS79933DDCT Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) CU NIPDAU Level-1-260C-UNLIM 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM 5 250 SNAG Level-1-260C-UNLIM DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TO/SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79933DDCTG4 ACTIVE TO/SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79933YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS & no Sb/Br) SNAG Level-1-260C-UNLIM TPS79933YZUT ACTIVE DSBGA YZU 5 250 SNAG Level-1-260C-UNLIM Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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