[ /Title (CD74 HCU04 ) /Subject (High Speed CMOS Logic Hex Inverter CD74HCU04 Data sheet acquired from Harris Semiconductor SCHS127 High Speed CMOS Logic Hex Inverter February 1998 Features Description • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25oC, Fastest Part in QMOS Line The Harris CD74HCU04 unbuffered hex inverter utilizes silicongate CMOS technology to achieve operation speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. These devices are especially useful in crystal oscillator and analog applications. Figures 10 and 11 are supplied as design information for the above applications. • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs Ordering Information • HCU Types - 2V to 6V Operation - High Noise Immunity: NIL = 20%, NIH = 30% of VCC at VCC = 5V CD74HCU04E -55 to 125 14 Ld PDIP E14.3 • CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH CD74HCU04M -55 to 125 14 Ld SOIC M14.15 PART NUMBER TEMP. RANGE (oC) PKG. NO. PACKAGE NOTES: 1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel. 2. Wafer or die for this part number is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information. Pinout CD74HC04, (PDIP, SOIC) TOP VIEW 1A 1 14 VCC 1Y 2 13 6A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1998 1 File Number 1655.1 CD74HCU04 Functional Diagram 1A 1Y 2A 2Y 3A 3Y GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y Logic Symbol nA nY Schematic Diagram VCC (3, 5, 9, 11, 13) 1 2 (4, 6, 8, 10, 12) 2 CD74HCU04 Absolute Maximum Ratings Thermal Information DC Supply Voltage, VCC Voltages Referenced to Ground . . . . . . . . . . . . . . . . -0.5V to +7V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA DC Drain Current, per Output, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA Thermal Resistance (Typical, Note 3) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180 Maximum Junction Temperature (Hermetic Package or Die) . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Range TA . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time 2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 3. θJA is measured with the component mounted on an evaluation PC board in free air. DC Electrical Specifications TEST CONDITIONS PARAMETER High Level Input Voltage Low Level Input Voltage High Level Output Voltage CMOS Loads SYMBOL VI (V) VIH - MAX MIN MAX MIN MAX UNITS 1.7 - 1.7 - 1.7 - V 4.5 3.6 - 3.6 - 3.6 - V 6 4.8 - 4.8 - 4.8 - V 2 - 0.3 - 0.3 - 0.3 V 4.5 - 0.8 - 0.8 - 0.8 V 6 - 1.1 - 1.1 - 1.1 V -0.02 2 1.8 - 1.8 - 1.8 - V -0.02 4.5 4 - 4 - 4 - V -0.02 6 5.5 - 5.5 - 5.5 - V -4 4.5 3.98 - 3.84 - 3.7 - V -5.2 6 5.48 - 5.34 - 5.2 - V 0.02 2 - 0.2 - 0.2 - 0.2 V 0.02 4.5 - 0.5 - 0.5 - 0.5 V 0.02 6 - 0.5 - 0.5 - 0.5 V 4 4.5 - 0.26 - 0.33 - 0.4 V VCC or GND 5.2 6 - 0.26 - 0.33 - 0.4 V II VCC or GND - 6 - ±0.1 - ±1 - ±1 µA ICC VCC or GND 0 6 - 2 - 20 - 40 µA VOH Quiescent Device Current - VIH or VIL VCC or GND VOL Low Level Output Voltage TTL Loads Input Leakage Current -55oC TO 125oC MIN VIL VIH or VIL IO (mA) VCC (V) -40oC TO +85oC 2 High Level Output Voltage TTL Loads Low Level Output Voltage CMOS Loads 25oC - - 3 CD74HCU04 Switching Specifications Input tr, tf = 6ns PARAMETER Propagation Delay, Input to Output Y (Figure 1) Transition Times (Figure 1) Input Capacitance Power Dissipation Capacitance (Notes 4, 5) 25oC -40oC TO 85oC -55oC TO 125oC SYMBOL TEST CONDITIONS tPLH, tPHL CL = 50pF 2 - - 70 - 90 - 105 ns CL = 50pF 4.5 - - 14 - 18 - 21 ns CL = 15pF 5 - 5 - - - - - ns CL = 50pF 6 - - 12 - 15 - 18 ns CL = 50pF 2 - - 75 - 95 18 110 ns 4.5 - - 15 - 19 - 22 ns 6 - - 13 - 16 - 19 ns tTLH, tTHL CI - CPD - VCC (V) MIN TYP MAX MIN MAX MIN MAX UNITS See Figure 3 5 - 14 - - pF - - - NOTES: 4. CPD is used to determine the dynamic power consumption, per inverter. 5. PD = VCC2 fi (CPD + CL) where fi = input frequency, CL = output load capacitance, VCC = supply voltage. Test Circuits and Waveforms tr = 6ns tf = 6ns VCC 90% 50% 10% INPUT GND tTHL tTLH 90% 50% 10% INVERTING OUTPUT tPLH tPHL FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGATION DELAY TIMES, COMBINATION LOGIC ICC, VCC TO GND CURRENT (mA) Typical Performance Curves AMBIENT TEMPERATURE TA = 25o C 25.0 22.5 VCC = 6V 20.0 17.5 15.0 VCC = 4.5V 12.5 10.0 7.5 5.0 VCC = 2V 2.5 0 1 2 3 4 5 VI, INPUT VOLTAGE (V) 6 FIGURE 2. TYPICAL INVERTER SUPPLY CURRENT AS FUNCTION OF INPUT VOLTAGE 4 pF CD74HCU04 CI, INPUT CAPACITANCE (pF) Typical Performance Curves 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 (Continued) AMBIENT TEMPERATURE, TA = 25oC VDD = 2V, VI 0-2V INPUT PIN 5 CONDITIONS VDD = 3V, VI 0-3V VDD = 4V, VI 0-4V VDD = 5V, VI 0-5V VDD = 6V, VI 0-6V 1 2 3 VIN, INPUT VOLTAGE (V) 4 FIGURE 3. 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