FUJITSU SEMICONDUCTOR DATA SHEET DS04-27216-4E ASSP For Power Supply Applications BIPOLAR Switching Regulator Controller MB3817 ■ DESCRIPTION The MB3817 is a pulse width modulator (PWM) type switching regulator controller IC designed for low-voltage and high-speed operation. This can be used in applications as down-conversion or down/up-conversion (Zeta method) . With fewer external components and faster operating speed, the MB3817 enables reduction in power supply unit size, making it ideal for use with internal power supplies in compact, high-performance portable devices. ■ FEATURES • • • • • • • • • Wide range of operating power supply voltages : 2.5 V to 18 V Built-in high-precision reference voltage generator : 1.5 V ± 2% High speed operation is possible : Max 500 kHz Wide input voltage range of error amplifier : 0 V to VCC − 0.9 V Built-in soft start function Built-in timer/latch-actuated short-circuiting protection circuit Totem-pole type output with adjustable on/off current (for PNP transistors) Built-in standby function Small package : SSOP-16P (FPT-16P-M05) ■ PACKAGE 16-pin Plastic SSOP (FPT-16P-M05) MB3817 ■ PIN ASSIGNMENT (TOP VIEW) CT 1 16 VREF RT 2 15 CTL +IN 3 14 CSCP −IN 4 13 CS FB 5 12 GND DTC 6 11 VE CB1 7 10 OUT CB2 8 9 VCC (FPT-16P-M05) 2 MB3817 ■ PIN DESCRIPTION Pin no. Pin name I/O Descriptions 1 CT This terminal connects to a capacitor for setting the triangular-wave frequency. 2 RT This terminal connects to a resistor for setting the triangular-wave frequency. 3 +IN I Error amplifier non-inverted input terminal 4 −IN I Error amplifier inverted input terminal 5 FB O Error amplifier output terminal 6 DTC I Dead time control terminal 7 CB1 Boot capacitor connection terminal 8 CB2 Boot capacitor connection terminal 9 VCC Power supply terminal 10 OUT O Totem-pole type output terminal 11 VE Output current setting terminal 12 GND Ground terminal 13 CS Soft start setting capacitor connection terminal 14 CSCP Short detection setting capacitor connection terminal 15 CTL I Power supply control terminal When this terminal is High, IC is inactive state When this terminal is Low, IC is standby state 16 VREF O Reference voltage output terminal 3 MB3817 ■ BLOCK DIAGRAM CB1 OUT 7 FB 8 5 −IN +IN DTC CB2 4 Error − Amp. 3 + PWM + Comp. + + − OFF current setting block 9 VCC Q4 10 6 OUT CS CS 13 Q6 1 µA Soft Start − Comp. + Q1 (0.9 V) − D1 (0.5 V) Q5 SCP Comp. 11 VE + 1.5 V SCP 1 µA −1.4 V −1.0 V RS Latch OSC 1 2 CT 4 bias RT bias UVLO Q2 Q3 VCC Power Ref (1.5 V) ON/OFF 14 16 CSCP VREF 12 GND 15 CTL MB3817 ■ ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Power supply voltage VCC Power dissipation Storage temperature Rating Unit Min Max 20 V PD Ta ≤ +25 °C 440* mW Tstg −55 +125 °C * : The package is mounted on the epoxy board (10 cm × 10 cm) . WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Parameter Symbol Condition Power supply voltage VCC Reference voltage output current Value Unit Min Typ Max 2.5 6.0 18 V IOR −1 0 mA Error amp. input voltage VIN 0 VCC − 0.9 V Control input voltage VCTL 0 18 V Output current IO 3 30 mA Timing capacitance CT 150 1500 pF Timing resistance RT 5.1 100 kΩ Oscillation frequency fOSC 10 200 500 kHz Soft start capacitance CS 0.1 1.0 µF CSCP 0.1 1.0 µF Boot capacitance CB 0.1 µF Operating temperature Ta −40 +25 +85 °C Short detection capacitance WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 5 MB3817 ■ ELECTRICAL CHARACTERISTICS (VCC = 6 V, Ta = +25 °C) Symbol Pin no. Condition VREF 16 ∆VREF/ VREF Input stability Load stability Parameter Typ Max 1.47 1.50 1.53 V 16 Ta = −40°C to +85°C 0.5* % Line 16 VCC = 2.5 V to 18 V 2 10 mV Load 16 IOR = 0 mA to −1 mA 2 10 mV IOS 16 VREF = 1 V −10 −5 −2 mA VTH 13 VCC = 2.0 2.3 V VTL 13 VCC = 1.5 1.8 V VH 13 0.1 0.2 V VR 13 0.6 1.0 V VT0 10 Duty cycle = 0% 0.9 1.0 V VT100 10 Duty cycle = 100% 1.4 1.5 V Input standby voltage VSTB 13 50 100 mV Charge current ICHG 13 −1.4 −1.0 −0.6 µA Threshold voltage VTH 14 0.60 0.65 0.70 V Input standby voltage VSTB 14 50 100 mV Input latch voltage VI 14 50 100 mV Input source current II 14 −1.4 −1.0 −0.6 µA Oscillator frequency fOSC 10 CT = 330 pF RT = 6.2 kΩ 450 500 550 kHz Frequency voltage stability ∆f/fdv 10 VCC = 3.6 V to 16 V 1 10 % Frequency temperature stability ∆f/fdt 10 Ta = −40°C to +85°C 1* % Output temperature stability Short circuit output current Under voltage Threshold voltage lockout protection Hysteresis width section (UVLO) Reset voltage Threshold voltage Soft start section (CS) Short circuit detection section (SCP) Triangular waveform oscillator section (OSC) Unit Min Output voltage Reference section (Ref) Value * : Standard design value. (Continued) 6 MB3817 (Continued) (VCC = 6 V, Ta = +25 °C) Parameter Symbol Pin no. Condition Value Min Typ Max Unit Input offset voltage VIO 3, 4 VFB = 1.2 V 10 mV Input offset current IIO 3, 4 VFB = 1.2 V 100 nA Input bias current II 3, 4 VFB = 1.2 V −200 −100 nA 0 VCC − 0.9 V Common mode input voltage range VCM 3, 4 CMRR 5 DC 60 100 dB Voltage gain AV 5 DC 60 100 dB Frequency bandwidth BW 5 AV = 0 dB 800* kHz VOM+ 5 1.8 2.0 V OM− 5 50 500 mV Output sink current O+ I 5 VFB = 1.2 V 60 120 µA Output source current IO− 5 VFB = 1.2 V −2.0 −0.6 mA VT0 10 Duty cycle = 0% 0.9 1.0 V VT100 10 Duty cycle = 100% 1.4 1.5 V ON duty cycle Dtr 10 VDTC = VREF × 0.88 CT = 330 pF, RT = 6.2 kΩ 70 80 90 % Input current IDTC 6 VDTC = 0 V −500 −250 nA VT0 10 Duty cycle = 0% 0.9 1.0 V VT100 10 Duty cycle = 100% 1.4 1.5 V Input sink current I+ I 5 60 120 µA Input source current II− 5 −2.0 −0.6 mA Output sink current IO+ 10 RE = 15 kΩ 18 30 42 mA Output source current IO− 10 Duty ≤ 5 % −100 −50 mA Standby leakage current ILO 10 VCC = 18 V, VO = 18 V 10 µA Input on condition VON 11 2.1 18 V Input off condition VOFF 11 0 0.7 V II 15 VCTL = 5 V 100 200 µA Standby current ICCS 9 VCTL = 0 V 10 µA Power supply current ICC 9 Output “H” 2.7 4.0 mA Error amp. section (Error Amp.) Common mode rejection ratio Maximum output voltage width Threshold voltage Dead time control section (DTC) PWM comparator section (PWM Comp.) Output section (OUT) Control section (CTL) Threshold voltage Input current V * : Standard design value. 7 MB3817 ■ TYPICAL CHARACTERISTICS Power supply current vs. power supply voltage 2.0 Ta = +25 °C Reference voltage VREF (V) Power supply current ICC (mA) 5 Reference voltage vs. power supply voltage 4 3 2 1 Ta = +25 °C IOR = 0 mA 1.5 1.0 0.5 0.0 0 0 2 4 6 8 10 12 14 16 Power supply voltage VCC (V) 18 0 20 2 4 6 8 10 12 14 16 Power supply voltage VCC (V) 18 20 Reference voltage vs. ambient temperature 1.55 VCC = 6 V IOR = 0 mA Reference voltage VREF (V) 1.54 1.53 1.52 1.51 1.50 1.49 1.48 1.47 1.46 1.45 −60 −40 −20 0 20 40 60 80 100 Ambient temperature Ta (°C) Control current vs. control voltage Reference voltage vs. control voltage 500 Reference voltage VREF (V) Control current ICTL (µA) VCC = 6 V Ta = +25 °C IOR = 0 mA 1.7 1.6 1.5 1.4 VCC = 6 V Ta = +25 °C 400 300 200 100 1.3 0 0 1 2 3 Control voltage VCTL (V) 4 5 0 4 8 12 16 20 Control voltage VCTL (V) (Continued) 8 Triangular wave frequency fOSC (Hz) Triangular wave frequency vs. timing resistance 10 M VCC = 6 V Ta = +25 °C 1M 100 k CT = 150 pF CT = 1500 pF 10 k CT = 15000 pF 1k 1k 10 k 100 k 1M Timing resistance RT (Ω) Triangular wave maximum amplitude voltage VCT (V) MB3817 Triangular wave maximum amplitude voltage vs. timing capacitance 1.8 1.4 1.2 1.0 0.8 0.6 10 103 105 104 Triangular wave cycle vs. timing capacitance 1000 Triangular wave cycle tOSC (µs) 100 80 VCC = 6 V Ta = +25 °C RT = 6.2 kΩ VDTC = VREF × 0.88 60 40 20 100 VCC = 6 V Ta = +25 °C RT = 6.2 kΩ 10 1 0.1 1k 10 k 100 k 1M 102 10 10 M 103 104 105 Timing capacitance CT (pF) Triangular wave frequency fOSC (Hz) Frequency stability vs. ambient temperature 10.00 Frequency stability (%) Duty Dtr (%) 102 Timing capacitance CT (pF) Duty vs. triangular wave frequency 0 VCC = 6 V Ta = +25 °C RT = 6.2 kΩ 1.6 VCC = 6 V fOSC = 500 kHz (CT = 330 pF, RT = 6.2 kΩ) 5.00 0.00 −5.00 −10.00 −60 −40 −20 0 20 40 60 80 100 Ambient temperature Ta (°C) (Continued) 9 MB3817 (Continued) Error amp. frequency 50 Ta = +25 °C 40 180 30 135 φ 10 VCC = 6 V 11 kΩ 90 45 AV 0 φ (deg) AV (dB) 20 • Measurement circuit 225 0 −10 −45 −20 −90 −30 −135 −40 −180 −50 1k 10 k 100 k 240 kΩ 2.4 kΩ − + 4 − 3 + 10 µF 5 VREF 11 kΩ Error Amp. −225 10 M 1M Frequency fOSC (Hz) 1.0 500 VCC = 6 V Ta = +25 °C 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 −10 −20 −30 −40 Output current setting pin current IE (mA) 10 Power dissipation vs. ambient temperature Power dissipation PD (mW) Output current setting pin voltage VE (V) Output current setting pin voltage vs. output current setting pin current −50 440 400 300 200 100 0 −40 −20 0 20 40 60 80 Ambient temperature Ta (°C) 100 120 MB3817 ■ FUNCTIONAL DESCRIPTION 1. Switching Regulator Functions (1) Reference voltage circuit (Ref) The reference voltage circuit generates a temperature-compensated stable voltage ( =: 1.50 V) . This reference voltage is used as the reference voltage and bias level for the power control unit. (2) Triangular-wave oscillator circuit By connecting a timing capacitor and a resistor to the CT (pin1) and the RT (pin2) terminals, it is possible to generate any desired triangular oscillation waveform. (3) Error amplifier The error amp. is an amplifier circuit that detects the output voltage from the switching regulator and produces the PWM control signal. The broad in-phase input voltage range of 0 V to Vcc − 0.9 V provides easy setting from external power supplies and enables use with applications such as DC motor speed control systems. Also, it is possible to provide stable phase compensation for a system by setting up any desired level of loop gain, by connecting feedback resistance and a capacitor between the error amp. output terminal (FB terminal (pin 5) ) and the inverse input terminal (−IN terminal (pin 4) ) . (4) PWM comparator (PWM Comp.) This is a voltage comparator with one inverted input and three non-inverted inputs, and operates as a voltagepulse width modulator controlling output duty in relation to input voltage. The output transistor is turned on during the interval in which the triangular waveform is lower than any of three voltages : the error amp. output voltage (FB terminal (pin 5) ) , soft start set voltage (CS terminal (pin 13) ) , or dwell time setting voltage (DTC terminal (pin 6) ) . (5) Output circuits (OUT) The output circuit has totem pole type configuration, and can drive an external PNP transistor. The on current value can be set up to a maximum of 30 mA using the resistance (RE) connected to the VE terminal (pin 11) . The off current is set by connecting a bootstrap capacitor CB between the CP1 terminal (pin 7) and CP2 terminal (pin 8) . 2. Power Supply Control Functions The output is switched on and off according to the voltage level at the CTL terminal (pin 15) . CTL terminal voltage level Channel on/off status L ( ≤ 0.7 V) Standby mode* H ( ≥ 2.1 V) Operating mode * : Supply current in standby mode is 10 µA or less. 11 MB3817 3. Protective Circuit Functions (1) Soft start and short protection circuits (CS, SCP) Soft starting, by preventing a rush current at power-on, can be provided by connecting a capacitor CS to the CS terminal (pin 13) . After the soft start operation is completed, the CSCP terminal (pin 14) is held at “L” level (standby voltage VSTB), which functions as short detection standby mode. If an output short causes the error amp. output to rise above 1.5 V, capacitor CSCP begins charging, and after reaching threshold voltage VTH of 0.65 V causes the OUT terminal (pin 10) to be fixed at “H” level and the dwell time to be set to 100%, and the CSCP terminal (pin 14) is held at “L” level. Once the protection circuit has been activated, the power supply must be reset to restore operation. (2) Low input voltage error prevention circuit (UVLO) Power-on surges and momentary drops in power supply voltage can cause errors in control IC operation, which can destroy or damage systems. The low input voltage error protection circuit compares the supply voltage to the internal reference voltage, and sets the OUT terminal (pin 10) to “H” level in the event of a drop in supply voltage. Operation is restored when the power supply voltage returns above the threshold voltage of the low input voltage error prevention circuit. 12 MB3817 ■ SETTING OUTPUT VOLTAGE • Output voltage VO is plus VO+ R1 Error Amp. −IN 4 − 3 + +IN R2 VO+ = VREF R2 (R1 + R2) VREF • Output voltage VO is minus VREF R2 R Error Amp. −IN 4 +IN 3 R1 − + VO− = − VREF 2 × R2 (R1 + R2) + VREF R VO− ■ OSCILATOR FREQUENCY SETTING The oscillator frequency can be set by connecting a timing capacitor (CT) to the CT terminal (pin1) and a timing resistor (RT) to the RT terminal (pin2) . Oscillator frequency : fOSC fOSC (kHz) =: 1023000 CT (pF) •RT (kΩ) 13 MB3817 ■ METHOD OF SETTING THE OUTPUT CURRENT The output circuit is comprised of a totem-pole configuration. Its output current waveform is such that the ONcurrent value is set by constant current and the OFF-current value is set by a time constant. These output currents are set using the equations below. 500 ON current : IO+ [mA] =: (Voltage on output current-setting pin VE = 0.5 V) RE [Ω] OFF current : OFF-current time constant = proportional to the value of CB • Output circuit 7 CB1 CB 8 CB2 Outside putting PNP transistor OFF current setting block 9 VCC OFF current Q4 10 Q6 Q5 D1 (0.5 V) 11 OUT ON current RE VE • Output current waveform Output current ON current 0 OFF current t 14 MB3817 • Voltage and current waveforms on output terminal VCC = 3 V 4 VO (V) 2 0 −2 −4 20 0 IO (mA) 40 −20 0 2 4 6 8 10 t (µs) • Measuring circuit diagram 7 8 9 CB1 CB 1000 pF CB2 VCC VCC 2S81121S U1FWJ44N (5.0 V) OUT RE 22 µF VE 16 Ω VO 35 kΩ 10 22 µF 15 kΩ 11 15 MB3817 ■ METHOD OF SETTING THE SHORT DETECTION TIME The error amp. output is connected to the inverted input of the short detector comparator circuit (SCP Comp.) , where it is constantly compared to the reference voltage of approximately 1.5 V that is connected to the noninverted input. If the switching regulator load conditions are stabilized, the short detector comparator output is at “H” level, transistor Q3 is on, and the CSCP terminal (pin14) holds the input standby voltage VSTB which is 50 mV. If load conditions change rapidly due to a cause such as a load short, so that output voltage falls, the short detector comparator circuit output changes to “L” level. When this happens, transistor Q3 turns off and the short detector capacitor CSCP connected externally to the CSCP terminal starts charging from the input source current II, which is −1.0 µA. Short detection time (tPE) tPE [s] =: 0.65 × CSCP [µF] When the short detector capacitor CSCP has been charged to the threshold voltage VTH, which is 0.65 V, the SR latch is set, and the external PNP transistor is turned off (setting dwell time to 100%) . At this time, the SR latch input is closed, and the CSCP terminal is set to input latch voltage VI which is 50 mV. • Short protection circuit FB 5 −IN +IN 4 − 3 + Error Amp. + + + − Outside putting PNP transistor PWM Comp. 9 OFF current setting block VCC Q4 10 OUT Q6 − Q5 SCP Comp. + 1.5 V 1 µA bias RS Latch UVLO Q2 Q3 14 CSCP 16 D1 (0.5V) RE 11 VE MB3817 ■ TREATMENT WHEN NOT USING CSCP When you do not use the timer/latch-actuated short-circuiting protection circuit, connect the CSCP terminal (pin 14) to GND. • Treatment when not using CSCP 14 CSCP 17 MB3817 ■ METHOD OF SETTING SOFT START TIME To protect against surge currents when the IC is turned on, a soft start setting can be made by connecting a soft start capacitor (CS) to the CS terminal (pin 13) . When the IC starts up (CTL terminal (pin 15) to “H” level, Vcc ≥ UVLO threshold voltage VTH) the transistor Q1 turns off and the soft start capacitor (CS) connected to the CS terminal begins charging from the charge current ICHG which is −1.0 µA. At this time, if the CS terminal voltage is less than 0.9 V, the soft start comparator circuit output goes to “H” level, transistor Q2 turns on and the CSCP terminal (pin 14) holds input standby voltage VSTB which is 50 mV so that the short protection circuit is not activated. When the CS terminal voltage is greater than or equal to 0.9 V, transistor Q2 turns off, the PWM comparator circuit compares the CS terminal voltage with the triangular wave and changes the ON duty of the OUTPUT terminal, thus achieving a soft start. Note that the soft start time is determined by the following formula. Soft start time (time before output ON duty reaches 50%) tS [ms] =: 1.2 × CS [µF] • Soft start circuit + + + − PWM Comp. Outside putting PNP transistor 9 OFF current setting block VCC Q4 10 OUT 1 µA Q6 CS 13 Q5 Q1 − Soft Start Comp. + (0.9 V) 1 µA bias RS Latch UVLO Q2 Q3 14 CSCP 18 D1 (0.5V) RE 11 VE MB3817 ■ TREATMENT WHEN NOT USING CS When not using the soft start function, the CS terminal (pin 13) should be left open. • When no soft start time is set Open 13 CS 19 MB3817 ■ METHOD OF SETTING THE DEAD TIME When the device is set for step-up inverted output based on the flyback method, the output transistor is fixed to a full-on state (ON-duty = 100%) at power switch-on. To prevent this problem, you may determine the voltages on the DTC terminals (pin 6) from the VREF voltage so you can easily set the output transistor’s dead time (maximum ON-duty) independently for each channel as shown below. When the voltage on the DTC terminals (pin 6) is lower than the triangular-wave output voltage from the oscillator, the output transistor turns off. The dead time calculation formula assuming that triangular-wave amplitude ≅ 0.4 V and triangular-wave minimum voltage ≅ 1.4 V is given below. Vdt − 1.0 V × 100 [%] Duty (ON) MAX =: 0.4 When you do not use these DTC terminals, connect them to VREF terminal. • When using DTC to set dead time 16 VREF Ra 6 Vdt Rb • When not using DTC to set dead time 16 VREF 6 20 DTC DTC VIN 13 1000 pF 0.1 µF CS 6 DTC 15 kΩ 10 kΩ 5 0.047 µF 4 −IN 3 +IN FB 18 kΩ 1 CT OSC Q1 CS 1 µA + − 2 RT 6.2 kΩ 1.0 V 1.4 V (0.9 V) + + − 1.5 V RS Latch bias Soft Start − Comp. Error Amp1 UVLO SCP Comp. + + + − Q5 VCC Power ON/OFF 1.5 V Ref bias Q6 Q4 (0.5 V) OFF current setting block 9 15 11 10 14 16 12 GND CSCP VREF Q3 SCP 1 µA 0.1 µF Q2 PWM Comp. OUT 8 7 22 µH U1FWJ44N 22 µF 2SB1121S 4.7 µF VO (3.3 V) 2SB1121S: SANYO Electric Co., Ltd. UIFWJ44N: TOSHIBA CORPORATION (note) Output ON/OFF signal ON : CTL = 5 V OFF : CTL = 0 V CTL VE 47 Ω OUT 22 µF VCC CB2 CB1 1000 pF 15 Ω MB3817 ■ APPLICATION EXAMPLE 1. Step-down scheme 21 22 VIN 15 kΩ 18 kΩ CS 13 6 1000 pF 0.1 µF 10 kΩ DTC 5 0.047 µF 4 −IN 3 +IN FB 1 CT OSC Q1 CS 1 µA + − 2 RT 6.2 kΩ 1.0 V RS Latch bias 1.5 V (0.9 V) 1.4 V + − + Soft Start Comp. − Error Amp1 UVLO SCP Comp. + + + − VCC Power ON/OFF 1.5 V Ref bias Q6 (0.5 V) OFF current setting block 9 15 11 10 14 16 12 GND CSCP VREF Q3 SCP 1 µA Q5 OUT 0.1 µF Q2 PWM Comp. 8 7 22 µF 2SB1121S: SANYO Electric Co., Ltd. UIFWJ44N: TOSHIBA CORPORATION U1FWJ44N 22 µH 2SB1121S 4.7 µF 22 µH (note) Output ON/OFF signal ON : CTL = 5 V OFF : CTL = 0 V CTL VE 47 Ω OUT 22 µF VCC CB2 CB1 1000 pF 4.7 µF VO (3.3 V) 15 Ω MB3817 2. Zeta scheme VIN 15 kΩ 35 kΩ R2 +IN −IN FB 1 µF 13 CT OSC Q1 1 1000 pF CS CS 1 µA + 3 6 − 4 5 13 kΩ 1.2 kΩ DTC 0.047 µF R1 2 6.2 kΩ RT 1.5 V (0.9 V) −1.0 V RS Latch bias + + −1.4 V − Soft Start − Comp. Error Amp. UVLO SCP Comp. + + + − bias VCC D1 (0.5 V) Q6 Q4 Power Ref (1.5 V) ON/OFF Q5 OFF current setting block 9 8 7 15 11 10 14 16 12 CSCP VREF GND Q3 SCP 1 µA 2.2 µF Q2 PWM Comp. OUT 1000 pF 22 µF VO (5.0 V) 2SB1121S: SANYO Electric Co., Ltd. UIFWJ44N: TOSHIBA CORPORATION 22 µF 2SB1121S U1FWJ44N (note) Output ON/OFF signal ON : CTL = 5 V OFF : CTL = 0 V CTL VE OUT 22 µF RE 16 Ω VCC CB2 CB1 CB MB3817 3. Flyback scheme 23 MB3817 ■ APPLICATION 1. Equivalent series resistance and stability of smoothing capacitor The equivalent series resistance (ESR) of the smoothing capacitor in the DC/DC converter greatly affects the loop phase characteristic. A smoothing capacitor with a high ESR improves system stability because the phase is advanced into the highfrequency range of an ideal capacitor (see Fig. 34 and 35) . A smoothing capacitor with a low ESR reduces system stability. Use care when using low ESR electrolytic capacitors (OS-CONTM) and tantalum capacitors. Note : OS-CON is the trademark of Sanyo Electric Co.,Ltd. Figure 33 DC/DC Converter Basic Circuit L Tr RC VIN D RL C Figure 34 Gain vs. Frequency Figure 35 0 0 −20 −60 10 24 (2) (1) : RC = 0 Ω (2) : RC = 31 mΩ 100 (2) −90 −180 (1) 1k 10 k Frequency f (Hz) Phase φ (deg) Gain AV (dB) 20 −40 Phase vs. Frequency 100 k 10 (1) : RC = 0 Ω (2) : RC = 31 mΩ 100 1k 10 k Frequency f (Hz) (1) 100 k MB3817 Reference data In an aluminum electrolytic smoothing capacitor (RC =: 1.0 Ω) is replaced with a low ESR electrolytic capacitor (OS-CONTM : RC =: 0.2 Ω) , the phase margin is reduced by half (see Fig. 37 and 38) . Figure 36 DC/DC Converter AV vs. φ characteristic Test Circuit VOUT VO+ CNF AV vs. φ characteristic Between this point −IN − FB VIN +IN + R2 R1 VREF/2 Error Amp. DC/DC Converter +5 V output Gain vs. Phase 60 VCC = 10 V RL = 25 Ω CP = 0.1 µF φ 40 20 90 62° 0 0 −20 −40 10 100 1k Frequency f (Hz) AI Condenser + 220 µF (16 V) − RC ≅ 1.0 Ω : fOSC = 1 kHz GND 10 k −180 100 k DC/DC Converter +5 V output Gain vs. Phase 60 VCC = 10 V RL = 25 Ω CP = 0.1 µF AV 40 20 0 180 φ 90 27° 0 −20 −40 10 VO+ −90 Figure 38 Gain AV (dB) 180 VO+ Phase φ (deg) Gain AV (dB) AV Phase φ (deg) Figure 37 −90 100 1k Frequency f (Hz) 10 k + − OS-CON TM 22 µF (16 V) RC ≅ 0.2 Ω : fOSC = 1 kHz GND −180 100 k 25 MB3817 ■ NOTES ON USE • Take account of common impedance when designing the earth line on a printed wiring board. • Take measures against static electricity. - For semiconductors, use antistatic or conductive containers. - When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container. - The work table, tools and measuring instruments must be grounded. - The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series. • Do not apply a negative voltage - Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in malfunction. ■ ORDERING INFORMATION Part number MB3817PFV 26 Package 16-pin Plastic SSOP (FPT-16P-M05) Remarks MB3817 ■ PACKAGE DIMENSION Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max) . Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 16-pin Plastic SSOP (FPT-16P-M05) *1 5.00±0.10(.197±.004) 0.17±0.03 (.007±.001) 9 16 *2 4.40±0.10 6.40±0.20 (.173±.004) (.252±.008) INDEX Details of "A" part +0.20 1.25 –0.10 +.008 .049 –.004 LEAD No. 1 8 0.65(.026) 0.10(.004) C (Mounting height) "A" 0.24±0.08 (.009±.003) 0.13(.005) M 0~8˚ 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.10±0.10 (Stand off) (.004±.004) 0.25(.010) 2003 FUJITSU LIMITED F16013S-c-4-6 Dimensions in mm (inches) Note : The values in parentheses are reference values. 27 MB3817 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F0308 FUJITSU LIMITED Printed in Japan