LT1950 Single Switch PWM Controller with Auxiliary Boost Converter DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Wide Input Range: 3V to 25V Programmable Volt-Second Clamp Output Power Levels from 25W to 500W Auxiliary Boost Converter Provides 10V Gate Drive from VIN as Low as 3V Programmable Operating Frequency (100kHz to 500kHz) with One External Resistor Programmable Slope Compensation Programmable Leading Edge Blanking ±2% Internal 1.23V Reference Accurate Shutdown Pin Threshold with Programmable Hysteresis 60ns Current Sense Delay 2.5V Auxiliary Reference Output Synchronizable to an External Clock up to 1.5 • fOSC Current Mode Control Small 16-Pin SSOP Package U APPLICATIO S ■ ■ ■ Telecom Power Supplies Automotive Power Supplies Portable Electronic Equipment Isolated and Nonisolated DC/DC Converters A resistor programmable duty cycle clamp can be used to generate a volt-second clamp for forward converter applications. An internal boost switcher is available for creating a separate supply for the output gate driver, allowing 10V gate drive from input voltages as low as 3V. The LT1950’s operating frequency can be set with an external resistor over a 100kHz to 500kHz range and a SYNC pin allows the part to be synchronized to an external clock. Additional programmability exists for leading edge blanking and slope compensation. A fast current sense comparator achieves 60ns current sense delay and the error amplifier is a true voltage mode error amplifier, allowing a wide range of compensation networks. An accurate shutdown pin with programmable hysteresis is available for undervoltage lockout and shutdown. The LT1950 is available in a small 16-Pin SSOP package. , LTC and LT are registered trademarks of Linear Technology Corporation. U ■ The LT®1950 is a wide input range, forward, boost, flyback and SEPIC controller that drives an N-channel power MOSFET with few external components required. TYPICAL APPLICATIO 36V to 72V DC to 26V/5A (Single Switch) Forward Converter 10VBIAS 0.1µF 249k 4.99k VREF VIN2 BOOST VSEC ROSC MBRB20200 47µH VOUT 26V 5A 47µF 470k SHDN 1µF 18k LT1950 BLANK GATE SYNC ISENSE GND PGND FB COMP VIN = 36V 90 EFFICIENCY (%) 2.5V 95 VIN VIN SLOPE Efficiency vs Load Current Si7450 VIN = 48V VIN = 72V 85 80 75 0.015Ω 4.7k 0.022µF 70 0.5 100k 1.5 3.5 4.5 2.5 LOAD CURRENT (A) 5.5 1950 TA01a 1950 TA01b 1950fs sn1950 1 LT1950 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) BOOST ....................................................... –0.3V to 35V VIN, VIN2, SHDN ......................................... –0.3V to 25V FB, SYNC, VSEC ........................................... –0.3V to 6V COMP, BLANK .......................................... –0.3V to 3.5V SLOPE ...................................................... –0.3V to 2.5V ISENSE ......................................................... –0.3V to 1V ROSC .................................................................... –50µA VREF .................................................................... –10mA Operating Junction Temperature Range LT1950EGN/LT1950IGN (Notes 2, 5) ... – 40°C to 125°C Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER TOP VIEW COMP 1 FB 2 16 VSEC 15 VIN ROSC 3 14 BOOST SYNC 4 13 PGND SLOPE 5 12 GATE VREF 6 SHDN 7 GND 8 LT1950EGN LT1950IGN 11 VIN2 10 ISENSE 9 GN PART MARKING BLANK 1950E 1950I GN PACKAGE 16-LEAD NARROW PLASTIC SSOP TJMAX = 125°C, θJA = 110°C/W, θJC (PIN 8) = 30°C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF = 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS PWM Controller Operating Input Voltage IVREF = 0µA ● Minimum Start-Up Voltage IVREF = 0µA ● VIN Quiescent Current IVREF = 0µA, FB = 1V, ISENSE = 0.2V VIN Shutdown Current SHDN = 0V Shutdown Threshold 3V < VIN < 25V Shutdown Pin Current SHDN = 70mV Above Threshold Shutdown Pin Current Hysteresis SHDN = 100mV Below Threshold VIN2 Quiescent Current I(VREF) = 0µA, FB = 1V, ISENSE = 0.2V VIN2 Shutdown Current SHDN = 0V, VIN2 = 2.7V (Boost Diode from VIN = 3V) ● 3.0 25 V 2.6 3.0 V 2.3 3.0 mA 5 20 µA 1.261 1.32 1.379 V –7 –10 –13 µA 4 7 10 µA 1.7 2.5 mA 500 700 µA VREF (External Output) Output Voltage IVREF = 0µA 2.500 2.575 Line Regulation IVREF = 0µA, 3V < VIN < 25V 1 5 mV Load Regulation 0µA < IVREF < 2.5mA 1 5 mV 170 200 230 kHz ● 2.425 V Oscillator Frequency: fOSC ROSC = 249k, FB = 1V Minimum Programmable fOSC ROSC = 499k 85 100 115 kHz Maximum Programmable fOSC ROSC = 90.9k 440 500 560 kHz ● SYNC Input Resistance 20 SYNC Switching Threshold 1.5 kΩ 2.2 V SYNC Frequency/fOSC (ROSC = 249k, fOSC =200kHz), FB = 1V (Note 7) 1.25 1.5 fOSC Line Reg 3V < VIN < 25V 0.05 0.15 %/V 9.5V < VIN2 < 25V 0.05 0.25 %/V VROSC 1 V sn1950 1950fs 2 LT1950 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF = 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS 1.205 1.230 1.254 V –75 –200 nA Error Amplifier FB Reference Voltage 3V < VIN < 25V, VOL + 0.2V < COMP < VOH – 0.2 FB Input Bias Current FB = FB Reference Voltage Open Loop Voltage Gain VOL + 0.2V < COMP < VOH – 0.2 Unity Gain Bandwidth (Note 6) COMP Source Current FB = 1V, COMP = 1.6V COMP Sink Current FB = 1.4V, COMP = 1.6V COMP High Level: VOH COMP Active Threshold COMP Low Level: VOL ● 65 85 dB –0.3 –1.1 8 13 mA FB = 1V, ICOMP = – 250µA 2.5 V Start of GATE Switching (Duty Cycle > 0%) 1.0 V FB = 1.4V, ICOMP = 250µA 0.15 V 3 ● MHz –1.8 mA Current Sense ISENSE Maximum Threshold Duty Cycle < 10%, COMP = VOH ISENSE Input Bias Current COMP = 2.5V, ISENSE = ISENSE Max Threshold 90 100 110 mV –125 –170 –250 µA Default Blanking Time FB = 1V, COMP = 2V, ISENSE = 75mV 110 ns Adjustable Blanking Time FB = 1V, COMP = 2V, ISENSE = 75mV BLANK = 75k to Ground 290 ns Blanking Override Voltage– ISENSE Maximum Threshold BLANK = Open, COMP = 2.5V (Note 4) Turn-Off Delay to Gate COMP = 2V 60 ns Slope Compensation (Note 4) ISENSE Max Threshold (DC < 10%) – (DC = 80%) (Note 4) Default, RSLOPE = ∞ 2x Default, RSLOPE = 8k 3x Default, RSLOPE = 3.3k 14 28 42 mV mV mV 15 25 40 mV Internal Switcher Boost Switch ILIMIT VIN2 = 8V, 3V < VIN < 10V 70 125 180 mA Boost Switch Off Time VIN2 = 8V, 3V < VIN < 10V 250 500 1000 ns VIN2: Boost Disable 3V < VIN < 10V 9.5 11.0 11.75 V VIN2: Boost Disable Hysteresis 3V < VIN < 10V VIN2: Gate Enable 3V < VIN < 10V, FB = 1V (Note 4) VIN2: Gate Enable Hysteresis 3V < VIN < 10V, FB = 1V (Note 4) ● –1.0 ● 7.0 8.2 V 9.27 V –0.6 V 50 ns GATE Driver Output GATE Rise Time FB = 1V, VIN2 = 12V, CL = 1nF (Notes 3, 6) GATE Fall Time FB = 1V, VIN2 = 12V, CL = 1nF (Notes 3, 6) GATE Clamp Voltage IGATE = 0µA, COMP = 2.5V, FB = 6V GATE Low Level IGATE = 20mA IGATE = 200mA GATE High Level IGATE = –20mA, VIN2 = 12V, COMP = 2.5V, FB = 6V IGATE = –200mA, VIN2 = 12V, COMP = 2.5V, FB = 6V Maximum Duty Cycle FB = 1V, fOSC = 200kHz 30 11.5 ns 13 14.5 V 0.25 1.2 0.4 1.75 V V 10 9.75 90 V V 95 97 % sn1950 1950fs 3 LT1950 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF = 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise specified. PARAMETER CONDITIONS MIN Maximum Duty Cycle Clamp VSEC = 1.4V, FB = 1V, COMP = VOH VSEC Input Bias Current 0V < VSEC < 2.8V Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT1950EGN is guaranteed to meet performance specifications from 0°C to 125°C operating junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT1950IGN is guaranteed over the full –40°C to 125°C operating junction temperature range. Note 3: Rise and Fall times are between 10% and 90% levels. 63 TYP MAX UNITS 75 87 % –0.3 –1.0 µA Note 4: Guaranteed by correlation to static test. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 6: Guaranteed but not tested. Note 7: Maximum recommended SYNC frequency = 500kHz. U W TYPICAL PERFOR A CE CHARACTERISTICS Switching Frequency vs Temperature FB Voltage vs Temperature FREQUENCY (kHz) FB VOLTAGE (V) 1.25 1.24 1.23 1.22 VIN Shutdown IQ vs Temperature 240 16 230 14 220 12 VIN SHUTDOWN IQ (µA) 1.26 210 200 190 180 1.21 170 1.20 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 –25 50 25 75 0 TEMPERATURE (°C) Shutdown Threshold vs Temperature 100 4 0 –50 125 1.35 1.30 1.25 100 125 1950 • G04 –25 50 25 75 0 TEMPERATURE (°C) 270 120 250 115 230 110 105 100 95 90 210 190 170 150 85 130 80 110 –25 50 0 75 25 TEMPERATURE (°C) 125 ISENSE Pin Current vs Temperature 125 75 –50 100 1950 • G03 ISENSE CURRENT (µA) MAXIMUM ISENSE THRESHOLD (mV) SHUTDOWN THRESHOLD (V) 1.40 50 25 75 0 TEMPERATURE (°C) 6 Maximum ISENSE Threshold vs Temperature 1.45 –25 8 1950 • G02 1950 G01 1.20 –50 10 2 160 –50 125 SHDN = 0V 100 125 1950 G05 90 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 1950 G06 sn1950 1950fs 4 LT1950 U W TYPICAL PERFOR A CE CHARACTERISTICS BLANK Override Threshold – ISENSE Maximum Threshold vs Temperature Minimum VIN Start-Up Voltage vs Temperature (VIN2 Boosted) 3.1 3.00 35 30 25 20 15 10 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 2.9 2.7 2.75 VIN IQ (mA) MINIMUM VIN START-UP VOLTAGE (V) BLANK OVERRIDE THRESHOLD –ISENSE MAXIMUM THRESHOLD (mV) 40 2.50 0 25 50 75 1.5 –50 –25 125 12 10 SHDN = SHDN THRESHOLD + 70mV 8 6 SHDN = SHDN THRESHOLD – 100mV 2 100 25 50 75 100 GATE Rise/Fall Time vs GATE Capacitance 125 9 8 7 6 5 TA = 25°C 100 tr 75 tf 50 25 4 3 –50 –25 125 0 0 25 50 75 100 0 125 TEMPERATURE (°C) 1000 3000 4000 2000 GATE CAPACITANCE (pF) VIN2: BOOST Disable vs Temperature VIN2: GATE Enable vs Temperature 5000 1950 G12 1950 G11 1950 G10 BOOST Switch ILIMIT vs Temperature 13.0 9.2 125 1950 G09 GATE RISE/FALL TIME (ns) 11 10 0 TEMPERATURE (°C) SHDN Current Hysteresis vs Temperature SHDN CURRENT HYSTERESIS (µA) SHDN INPUT CURRENT*(–1) (µA) 100 1950 G08 14 50 25 75 0 TEMPERATURE (°C) 2.1 TEMPERATURE (°C) SHDN Input Current *(–1) vs Temperature 0 –50 –25 2.3 1.7 2.00 –50 –25 125 2.5 1.9 2.25 1950 G07 4 VIN IQ vs Temperature 250 8.7 GATE ENABLE 8.2 HYSTERESIS 7.7 GATE DISABLE 7.2 –50 –25 50 25 75 0 TEMPERATURE (°C) 12.0 11.5 BOOST DISABLE 11.0 HYSTERESIS 10.5 10.0 125 1950 G13 9.0 –50 200 150 100 BOOST RE-ENABLE 9.5 100 BOOST SWITCH ILIMIT (mA) VIN2 BOOST DISABLE (V) VIN2 GATE ENABLE (V) 12.5 –25 50 25 75 0 TEMPERATURE (°C) 100 125 1950 G14 50 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 1950 G15 sn1950 1950fs 5 LT1950 U W TYPICAL PERFOR A CE CHARACTERISTICS BOOST Switch Off Time vs Temperature Maximum Duty Cycle vs VSEC Voltage 100 MAX DUTY CYCLE = (105/VSEC)% 1.25V < VSEC < 2.8V TA = 25°C MAXIMUM DUTY CYCLE (%) 90 600 500 400 80 70 60 50 50 25 75 0 TEMPERATURE (°C) 100 125 30 0.8 15 14 13 12 11 40 300 –50 –25 16 GATE CLAMP VOLTAGE (V) 700 BOOST SWITCH OFF TIME (ns) GATE Clamp Voltage vs Temperature 1.2 1.6 2.0 2.4 VSEC VOLTAGE (V) 1950 G16 2.8 3.2 10 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) 1950 G17 1950 G18 U U U PI FU CTIO S COMP (Pin 1): The COMP pin is the output of the error amplifier. The error amplifier is a true op amp which allows the use of an RC network to be connected between the Comp and FB pins to compensate the feedback loop for optimum transient response. The peak switch current in the external MOSFET will be proportional to the voltage on the COMP pin. Typical operating voltage range for this pin is 1V to 2.5V. FB (Pin 2): The FB pin is the inverting input to the error amplifier. The output voltage is set with a resistor divider. The error amplifier adjusts the peak switch current to maintain the FB pin voltage at the value of the internal reference voltage of 1.23V. SLOPE (Pin 5): The SLOPE pin is used to adjust the amount of slope compensation. Leaving the pin open circuit results in a default level of slope compensation. The amount of slope compensation can be adjusted above this default level by connecting a resistor from the SLOPE pin to the VREF pin. VREF (Pin 6): The VREF pin is the output of an internal 2.5V reference. This pin is capable of sourcing up to 2.5mA for external use. It is recommended that the VREF pin is bypassed to ground with a 0.1µF ceramic capacitor. ROSC (Pin 3): A resistor from the ROSC pin to ground programs the operating frequency of the LT1950. Operating frequency range is 100kHz to 500kHz. Nominal voltage on the ROSC pin is 1V. SHDN (Pin 7): The SHDN pin is used to put the device into a low power shutdown state. In shutdown the VIN supply current drops to 5µA. The SHDN pin has an accurate threshold of 1.32V which can be used to program an undervoltage lockout threshold. Input current levels on the SHDN pin can be used to program hysteresis into the undervoltage lockout levels. SYNC (Pin 4): The SYNC pin is used to synchronize the internal oscillator to an external clock signal. The pin is directly logic compatible and can be driven with any signal with a duty cycle of 10% to 90%. If the SYNC function is not used the pin can be left open circuit or connected to ground. GND (Pin 8): The GND pin is the analog ground for the internal circuitry of the LT1950. Sensitive circuitry such as the feedback divider, frequency setting resistor, reference bypass capacitor should be tied directly to this pin. See the Applications Information section for recommendations on ground connections. sn1950 1950fs 6 LT1950 U U U PI FU CTIO S BLANK (Pin 9): The BLANK pin is used to adjust the leading edge blanking period of the current sense amplifier during FET turn-on. Shorting the BLANK pin to ground provides a default blanking period of approximately 110ns. A resistor from the BLANK pin to ground increases the blanking period up to 290ns for RBLANK = 75k. ISENSE (Pin 10): The ISENSE pin is the current sense input for the control loop. Connect this pin to the sense resistor in the source of the external power MOSFET. BOOST (Pin 14): The BOOST pin is the NPN collector output of the internal boost converter which can be used to generate an 11V supply for the MOSFET gate driver circuit. The boost converter runs with a fixed off-time of 0.5µs and a current limit of 125mA. The converter runs until the VIN2 voltage exceeds 11V and then turns off until the VIN2 voltage drops below 10V. If the VIN2 voltage is supplied externally, the BOOST pin should be shorted to ground or left open. VIN2 (Pin 11): The VIN2 pin is the supply pin for the MOSFET gate drive circuit. Power can be supplied to this pin by an external supply such as VIN, and must exceed 8V (the undervoltage lockout threshold for the gate driver supply). For low VIN supply voltages an internal boost regulator can be used to generate as much as 11V at the VIN2 pin. This allows the LT1950 to run with VIN supply voltages down to 3V while still supplying enough gate drive for standard level MOSFETs. VIN (Pin 15): The VIN pin is the main supply pin for the LT1950. This pin must be closely bypassed to ground. If VIN2 is generated using the BOOST pin then the LT1950 will be fully functional, internal VREF will be active and the gate output will be enabled with a VIN voltage as low as 3V. An internal undervoltage lockout threshold exists at approximately 2.6V on the VIN pin. Undervoltage lockout voltages greater than 3V can be programmed using a voltage divider on the SHDN pin. GATE (PIN 12): The GATE pin is the output of a high current gate drive circuit used to drive an external MOSFET. The output is actively clamped to a max voltage of 13V if VIN2 is supplied by a high voltage. VSEC (Pin 16): The VSEC pin is used to program the maximum duty cycle of the gate driver circuit. The maximum duty cycle will be equal to (105/VSEC)% for VSEC between 1.4V and 2.8V. This is a useful function to limit the flyback voltage in a forward converter. If the maximum duty cycle function is not used then the VSEC pin should be tied to ground. PGND (Pin 13): This is the ground connection for the high current gate driver stage. See the Applications Information section for recommendations on ground connections. sn1950 1950fs 7 LT1950 W BLOCK DIAGRA VIN VREF VSEC BOOST VIN2 15 6 16 14 11 VIN2 VREF = INTERNAL + EXTERNAL SUPPLY + SWITCHING PREREGULATOR FIXED OFF TIME 11V (125mA CURRENT LIMIT) 2.5V (SOURCE 2.5mA EXTERNALLY) DISABLE – PGND (VIN) (2.6V) U/V LOCKOUT + (VIN2) (8V) U/V LOCKOUT 8V 1.23V – (105/VSEC)% – – + ENABLE MAX DC + CLAMP 1.32V 3µA – (TYPICAL 200kHz) SHDN 7 OSC SYNC 4 S ±1A DRIVER Q 12 GATE + (100-500)khz R SLOPE COMP RAMP 13 PGND ROSC 3 SLOPE 5 1.23V + 13V BLANKING ERROR AMPLIFIER VOLTAGE GAIN = 85dB CURRENT SENSE CMP – BLANKING OVERRIDE CMP – + – + 0mV – >100mV 10 ISENSE 125mV 2 1 8 FB COMP GND 9 BLANK 1950 BD Figure 1. LT1950 Block Diagram U OPERATIO The LT1950 is a constant frequency, current mode controller for DC/DC forward, boost, flyback and SEPIC converter applications. The Block Diagram in Figure 1 shows all of the key functions of the IC. In normal operation, a VIN voltage as low as 3V allows an internal switcher at the BOOST pin to generate a separate 11V supply at VIN2 using a small surface mount external inductor, diode and capacitor. Since VIN2 supplies the output driver of the IC, this architecture achieves high GATE drive for an external N-channel power MOSFET even though VIN voltage is very low. High GATE drive capability reduces MOSFET RDS(ON) for improved efficiency, sn1950 1950fs 8 LT1950 U OPERATIO increases the range of MOSFETs that can be selected and allows applications requiring high gate drive with a large swing in VIN voltage. When VIN2 exceeds 8V, the GATE output driver is enabled. The GATE switches between 0V and VIN2 at a constant frequency set by a resistor from the ROSC pin to ground. When VIN2 reaches 11V, the internal switcher at the BOOST pin is disabled to save power and only re-enabled when VIN2 drops below 10V. The internal boost switcher runs in burst mode operation, asynchronous to the main oscillator. If low VIN operation with high GATE drive is not required, the BOOST pin is left open and the VIN2 pin shorted to VIN. With VIN2 shorted to VIN the minimum operational VIN voltage will increase from 3V to 8V (required at VIN2 to enable the GATE output driver). For GATE turn on, a PWM latch is set at the start of each main oscillator cycle. For GATE turn off, the PWM latch is reset when either the current sense comparator is tripped, the maximum duty cycle is reached, or the BLANK override threshold is exceeded. A resistor divider from the application’s output voltage generates a voltage at the FB pin that is compared to the internal 1.23V reference by the error amplifier. The error amplifier output (COMP) defines the input threshold (ISENSE) of the current sense comparator. Maximum ISENSE voltage is clamped to 100mV. By connecting ISENSE to a sense resistor in series with the source of the external MOSFET, the peak switch current is controlled by COMP. An increase in output load current causing the output voltage to fall, will cause COMP to rise, increasing ISENSE threshold, increasing the current delivered to the output. This current mode technique means that the error amplifier commands current to be delivered to the output rather than voltage. This makes frequency compensation easier and provides faster loop response to output load transients. The current mode architecture requires slope compensation to be added to the current sensing loop to prevent subharmonic oscillations which can occur for duty cycles above 50%. Unlike most current mode converters which have a slope compensation ramp that is fixed internally, placing a constraint on inductor value and operating frequency, the LT1950 has externally adjustable slope compensation. A default level of slope compensation is achieved with the SLOPE pin open. Increased slope compensation can be programmed by reducing the value of resistance inserted between the SLOPE pin and VREF pin. A SYNC pin allows the LT1950 main oscillator to be synchronized to an external clock . To avoid loss of slope compensation during synchronization, the free running main oscillator frequency should be programmed to approximately 80% of the external clock frequency. The LT1950 can be placed into shutdown mode when the SHDN pin drops below an accurate 1.32V threshold. This threshold can be used to program undervoltage lockout (UVLO) at VIN for current limited or high source resistance supplies. SHDN pin current hysteresis also exists to allow external programming of UVLO voltage hysteresis. When VIN and VIN2 exceed internally set UVLO thresholds of 2.6V and 6.8V, the VREF output becomes active. The VREF output is a 2.5V reference supplying the majority of LT1950 control circuitry and capable of sourcing up to 2.5mA for external use. To prevent noise in the system causing premature turn off of the external MOSFET the LT1950 has leading edge blanking. This means the current sense comparator output is ignored during MOSFET turn on and for an extended period after turn on. The extended blanking period is adjusted by inserting a resistor from the BLANK pin to ground. A short to ground defines a minimum default blanking period. Increased resistance from the BLANK pin to ground will increase blanking duration. Fault conditions causing ISENSE to exceed 125mV will override blanking and reduce the ISENSE to GATE delay to 60ns. For applications requiring maximum duty cycle clamping, the VSEC pin reduces duty cycle for increased voltage on the pin. The VSEC pin provides a volt-second clamp critical in forward converter applications. Maximum duty cycle follows (105/VSEC)% for VSEC voltages between 1.4V to 2.8V. If unused, the VSEC pin should be shorted to ground, leaving the natural maximum duty cycle of the part to be typically 95% for 200kHz operation. sn1950 1950fs 9 LT1950 U W U U APPLICATIO S I FOR ATIO LT1950 Input Supplies, VREF Output and GATE Enable VIN = VIN2 Operation VIN is the main input supply for the LT1950. VIN2 is the input supply for the LT1950 output driver. VIN2 can be provided by shorting the VIN2 pin to the VIN pin or by generating VIN2 using the BOOST pin. Waveforms of VIN, VIN2, VREF and GATE switching are shown in Figures 2 and 3. Figure 2 represents low VIN operation with VIN2 generated using the B00ST pin. Figure 3 represents VIN = VIN2 operation with the BOOST pin open circuit or shorted to ground. If low VIN operation is not required below approximately 8V on VIN the LT1950 can be configured to run without the use of the BOOST pin by shorting the VIN2 pin to the VIN pin. Figure 3 shows that both VIN and VIN2 must now exceed 6.8V to activate the 2.5V VREF output and must exceed approximately 8V to enable the output driver (GATE pin). 12 VIN2 8 Low VIN Operation The LT1950 can be configured to provide a minimum of 10V GATE drive for an external N-channel MOSFET from VIN voltages as low as 3V, if the BOOST pin is used to generate a second supply at the VIN2 pin (see Figure 2 and Applications Information “ Generating VIN2 Supply Using BOOST Pin”). The advantage of this configuration is that a lower RDS(ON) is achieved for the external N-channel MOSFET, improving efficiency, versus a controller running at 3V input without boosted gate drive. In addition, typical controllers running at low input voltages have the limitation of only being able to use logic level MOSFETs. The LT1950 allows a greater range of usable MOSFETs. This versatility allows optimization of the overall power supply performance and allows applications which would otherwise not be possible without a more complex topology. Figure 2 shows that for VIN above 2V, the internal switcher at the BOOST pin is enabled. This switch generates the VIN2 supply. As VIN2 ramps up above the undervoltage lockout threshold of 6.8V the 2.5V reference VREF becomes active and powers up internal control circuitry. When VIN2 exceeds approximately 8V, the gate driver is enabled. VIN2 is regulated between 10V and 11V, providing a supply to the LT1950 output driver to ensure a minimum of 10V drive at the GATE pin. MIN 3V GATE 4 0 L1 VIN 4 VIN 3 D1 BOOST LT1950 VIN2 C1 VREF 2 1 0 50µs/DIV 1950 F02 Figure 2. Low VIN Operation 10.2 8.5 6.8 5.1 3.4 VIN = VIN2 TYPICAL START-UP INPUT >8.2V 5.0 VIN VREF 2.5 BOOST LT1950 VIN2 0 10 * C1 GATE *BOOST PIN CAN BE LEFT OPEN OR SHORTED TO GROUND 5 0 10µs/DIV 1950 F03 Figure 3. VIN = VIN2 Operation sn1950 1950fs 10 LT1950 U W U U APPLICATIO S I FOR ATIO Shutdown and Undervoltage Lockout Figure 4 shows how to program undervoltage lockout (UVLO) for the VIN supply. Typically, UVLO is used in situations where the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source, hence source current increases as source voltage drops. This looks like a negative load resistance to the source and can cause the source to current limit or latch low under low source voltage conditions. An internally set undervoltage lockout (UVLO) threshold prevents the regulator from operating at source voltages where these problems might occur. An internal comparator will force the part into shutdown below the minimum VIN of 2.6V. This feature can be used to prevent excessive discharge of battery-operated systems. Alternatively, UVLO threshold is adjustable. The shutdown threshold voltage of the SHDN pin is 1.32V. Forcing the SHDN pin below this 1.32V threshold causes VREF to be disabled and stops switching at the GATE pin. If the SHDN pin is left open circuit, a permanent 3µA flows out of the pin to ensure that the pin defaults high to allow normal operation. Voltages above the 1.32V threshold cause an extra 7µA to be sourced out of the pin, providing current hysteresis. This can be used to set voltage hysteresis of the UVLO threshold using the following equations: VH – VL 7µA 1.32V R2 = (VH – 1.32V) + 3µA R1 R1 = VH = Turn on threshold VL = Turn off threshold Example: switching should not start until the input is above 11V and is to stop if the input falls below 9V. VH = 11V VL = 9V 11V – 9V = 286k 7µA 1.32V R2 = = 36k (11V – 1.32V) + 3µA 286k R1 = Keep the connections from the resistors to the SHDN pin short and make sure that the interplane or surface capacitance to the switching nodes are minimized. If high resistance values are used, the SHDN pin should be bypassed with a 1nF capacitor to prevent coupling problems from the switch node. LT1950 VIN R1 3µA 1.32V 7µA VREF + C1 R2 GND 1950 F04 Figure 4. Undervoltage Lockout Generating VIN2 Supply Using BOOST Pin The LT1950’s BOOST pin is used to provide a “boosted” 11V supply at the VIN2 pin for VIN voltages as low as 3V. Since VIN2 supplies the output driver for the GATE pin of the IC, it is advantageous to generate a boosted VIN2. This architecture achieves high GATE drive for an external sn1950 1950fs 11 LT1950 U U W U APPLICATIO S I FOR ATIO N-channel power MOSFET even though VIN voltage is very low. High GATE drive voltage reduces MOSFET RDS(ON), improves efficiency and increases the range of MOSFETs that can be selected. A small switching regulator at the BOOST pin, with fixed current limit and fixed off time, generates the VIN2 supply. With an external inductor connected between the BOOST pin and VIN (see Figure 5), the BOOST pin will draw current until approximately 125mA is reached, turn off for 0.5µs and then turn back on. The cycle is repeated for as long as the switcher is enabled. By using a diode connected from BOOST to VIN2 and a capacitor from VIN2 to ground, energy from the external inductor is transferred to the VIN2 capacitor during the offtime of the internal switcher. An auxiliary boost converter is realized providing a supply to the VIN2 pin. The typical inductor current, VIN2 voltage and BOOST pin voltage waveforms are shown in Figure 5. When VIN2 reaches 11V, the internal switcher is disabled. Since VIN2 supplies the output driver of the LT1950, switching at the GATE pin will eventually discharge the VIN2 capacitor until VIN2 reaches a lower level of approximately 10V. At this level the internal switcher is re-enabled and switches until VIN2 returns to 11V. This hysteretic (burst mode) operation for the internal switcher minimizes power dissipation from VIN. The VREF output is a 2.5V reference supplying most of the LT1950 control circuitry. It is available for external use with maximum current capability of 2.5mA. The pin should be bypassed to ground using a 0.1µF capacitor. Internal undervoltage lockout thresholds for VIN and VIN2 of approximately 2.6V and 6.8V respectively must be exceeded before VREF becomes active. Programming Oscillator Frequency The oscillator frequency of the LT1950 is programmed using an external resistor connected between the ROSC pin and ground. Figure 6 shows typical fOSC vs ROSC resistor values. The LT1950 is programmable for a free-running oscillator frequency in the range of 100kHz to 500kHz. Stray capacitance and potential noise pickup on the ROSC pin should be minimized by placing the ROSC resistor as close as possible to the ROSC pin and keeping the area of the ROSC node as small as possible. The ground side of the ROSC resistor should be returned directly to the GND (analog ground) pin. 500 12 VIN2 10 0.25 450 MIN 3V 400 ID1 (A) L1 VIN 0 0.25 IL1 (A) D1 BOOST LT1950 VIN2 C1 0 15 FREQUENCY (kHz) (V) 350 300 250 200 150 BOOST (V) 0 5µs/DIV 1950 F05 100 50 100 150 200 250 300 350 400 450 500 ROSC (kΩ) 1950 F06 Figure 5. VIN2 Generation Using the BOOST Pin Figure 6. Oscillator Frequency (fOSC) vs ROSC sn1950 1950fs 12 LT1950 U W U U APPLICATIO S I FOR ATIO The SYNC pin is used to synchronize the LT1950 main oscillator to an external clock. The SYNC pin can be driven directly from a logic level output, requiring less than 0.8V for a logic level low and greater than 2.2V for a logic level high. Duty cycle must be between 10% and 90%. When synchronizing the part, slope compensation will be reduced by approximately SYNC f/fOSC. If the reduction of slope compensation affects performance, RSLOPE can be reduced to increase slope compensation and reestablish correct operation. If unused, the pin is left open or shorted to ground. If left open, be aware that the internal pin resistance is 20k and board layout should be checked to avoid noise coupling to the pin. SLOPE COMPENSATION Programmability The LT1950 allows its default level of slope compensation to be easily increased by use of a single resistor connected between the SLOPE pin and the VREF pin. The ability to adjust slope compensation allows the designer to tailor his application for a wider inductor value range as well as to optimize the loop bandwidth. A resistor, RSLOPE, connected between the SLOPE pin and VREF increases the LT1950 slope compensation from its default level to as high as 3X of default. The curves in Figure 7 show the typical ISENSE maximum threshold vs duty cycle for various values of RSLOPE. It can be seen that slope compensation subtracts from the maximum ISENSE threshold as duty cycle increases from 0%. For example, with RSLOPE open, ISENSE max threshold is 100mV at low duty cycle, but falls to approximately 86mV at 80% duty cycle. This must be accounted for when designing a converter to operate up to a maximum load current and over a given duty cycle range. The application and inductor value will define the minimum amount of slope compensation. Refer to the Electrical Characteristics for 1X, 2X and 3X default slope compensation vs RSLOPE. Requirement in Current Mode Converters/Advantage of Adjustability The LT1950 uses a current mode architecture to provide fast response to load transients and to ease frequency compensation requirements. Current mode switching regulators which operate with duty cycles above 50% and have continuous inductor current, must add slope compensation to their current sensing loop to prevent subharmonic oscillations. (For more information on slope compensation see Application Note 19). Typical current mode switching regulators have a fixed internal slope compensation. This can place constraints on the value of the inductor. If too large an inductor is used, the fixed internal slope compensation will be greater than needed, causing operation to approach voltage mode. If too small an inductor is used, the fixed internal slope compensation will be too small, resulting in subharmonic oscillations. The LT1950 increases the range of usable inductor values by allowing slope compensation to be adjusted externally. 100 RSLOPE = OPEN 90 ISENSE MAX THRESHOLD (mV) Synchronizing 80 RSLOPE = 8k 70 RSLOPE = 3.3k 60 50 40 30 20 0 20 40 60 80 100 DUTY CYCLE (%) 1950 F07 Figure 7. ISENSE Maximum Threshold vs Duty Cycle sn1950 1950fs 13 LT1950 U U W U APPLICATIO S I FOR ATIO Programming Leading Edge Blank Time Programming Volt-Second Clamp For PWM controllers driving external MOSFETs, noise can be generated during GATE rise time due to various parasitic effects. This noise can disturb the input to the current sense comparator (ISENSE) and cause premature turn-off of the external MOSFET. The LT1950 provides programmable leading edge blanking of the current sense comparator to avoid this effect. The VSEC pin is used to provide an adaptive maximum duty cycle clamp for sophisticated control of the simplest forward converter topology (single primary-side switch). This adaptive maximum duty cycle clamp allows the use of the smallest transformers, MOSFETs and output rectifiers by addressing the biggest concern in single switch forward converter topologies - transformer reset. The section “Application Circuits-Forward Converter Applications” covers transformer reset requirements and highlights the advantages of the LT1950 adaptive maximum duty cycle clamp. The programmable maximum duty cycle clamp is controlled by the voltage on the VSEC pin. As voltage on the VSEC pin increases within a specified range, maximum duty cycle decreases. By deriving VSEC pin voltage from the system input supply, a volt-second clamp is realized. Maximum GATE output duty cycle follows a 1/X relationship given by (105/VSEC)%. (see Maximum Duty Cycle vs VSEC Voltage graph in the Typical Performance Characteristics section). For example, if the minimum input supply for a forward converter application is 36V, the VSEC pin can be programmed with a maximum duty cycle of 75% at 1.4V. A movement of input voltage to 72V will lift the VSEC pin to 2.8V, resulting in a maximum duty cycle of 37.5%. As the section on Forward Converter Applications will show, transformer reset requirements are met with the Blanking is provided in 2 phases: The first phase is during GATE rise time. GATE rise times vary depending on MOSFET type. For this reason the LT1950 automatically blanks the current comparator output until the “leading edge” of the GATE is detected. This occurs when the GATE voltage has risen within 0.5V of the output driver supply (VIN2) or has reached its clamp level of 13V. The second phase of blanking starts immediately after “leading edge” has been detected. This phase is programmable using a resistor (RBLANK) from the BLANK pin to ground. Typical values for this portion of the blanking period are 110ns at RBLANK = 0Ω up to 290ns at RBLANK = 75k. Figure 8 shows blanking vs RBLANK. Blanking duration can be approximated as: R BLANKING (EXTENDED) = 110 + 60 • BLANK ns 25k (AUTOMATIC) (DEFAULT) LEADING EDGE EXTENDED BLANKING BLANKING (PROGRAMMABLE) EXTENDED BLANKING CURRENT SENSE DELAY RBLANK = 0Ω 0Ω < RBLANK < = 75k 60ns GATE BLANKING 0 Xns (X + 110)ns [X + 110 + (60 • RBLANK/25k)]ns 1950 F04 Figure 8. Blanking Timing Diagram sn1950 1950fs 14 LT1950 U W U U APPLICATIO S I FOR ATIO ability of the VSEC pin to follow input voltage and control maximum switch duty cycle. Forward Converter Applications The LT1950 provides sophisticated control of the simplest forward converter topology (single primary switch, see Q1 Figure 11). A significant problem in a single switch forward converter topology is transformer reset. Optimum transformer utilization requires maximum duty cycles. Unfortunately as duty cycles increase the transformer reset time decreases and reset voltages increase. This increases the voltage requirements and stress on both transformer and switch. The LT1950 incorporates an adaptive maximum duty cycle clamp which controls maximum switch duty cycle based on system input voltage. The adaptive clamp allows the converter to operate at up to 75% duty cycle, allowing 25% of the switching period for resetting the transformer. This results in greater utilization of MOSFET, transformer and output rectifier components. The VSEC pin can be programmed from system input to adaptively control maximum duty cycle (see Applications Information “Programming Volt-Second Clamp” and the Maximum Duty Cycle vs VSEC Voltage graph in the Typical Performance Characteristics section). 94% Efficient 3.3V, 20A Synchronous Forward Converter The synchronous forward converter in Figure 11 is based on the LT1950 and uses MOSFETs as synchronous output rectifiers to provide an efficient 3.3V, 20A isolated output from 48V input. The output rectifiers are driven by the LTC1698 which also serves as an error amplifier and optocoupler driver. Efficiency and transient response are shown in Figures 9 and 10. Peak efficiencies of 94% and ultra-fast transient response are superior to presently available power modules. In addition, the circuit in␣ Figure␣ 11 is an all-ceramic capacitor solution providing low output ripple voltage and improved reliability. The LT1950-based converter can be used to replace power module converters at a much lower cost. The LT1950 solution benefits from thermal conduction of the system board resulting in higher efficiencies and lower rise in component temperatures. The 7mm height allows dense packaging and the circuit can be easily adjusted to provide an output voltage from 1.23V to 15V. In addition, higher currents are achievable by simple scaling of power components. The LT1950based solution in Figure 11 is a powerful topology for replacement of a wide range of power modules. 100 EFFICIENCY (%) 95 LT1950 VOUT (100mV/DIV) 90 85 POWER MODULE VOUT (100mV/DIV) 80 VIN = 48V VOUT = 3.3V fOSC = 235kHz 75 70 0 5 10 15 LOAD CURRENT (A) 20 1950 F09 Figure 9. LT1950-Based Synchronous Forward Converter Efficiency vs Load Current 500µs/DIV 1950 F10 Figure 10. Output Voltage Transient Response to Load Steps (0A to 3.3A) LT1950 (Trace1) vs Power Module (Trace 2) sn1950 1950fs 15 LT1950 U W U U APPLICATIO S I FOR ATIO +VIN 36V TO 72V INPUT R1 4.7k 1 2 R17, 210k 3 4 C1 0.1µF 5 6 7 R4, 18k 8 LT1950 COMP FB VSEC VIN ROSC BOOST SYNC PGND SLOPE GATE VREF VIN2 SHDN ISENSE GND BLANK R5 470k 16 R7 255Ω CU1 1µF UV 13 8 1 D1 BAS516 U2A LTC1693-1 7 D2 BAT760 6 3 U2B LTC1693-1 5 4 CG SYNC R13 270Ω 560Ω R3 4.7k D3 BAT760 0.1µF 6 1 5 2 4 3 2 3 T2 U4 HCPL-M453 10VBIAS C6 4.7µF 1µF X5R C9, 33nF R2 4.7k UV 220pF CS 100k Q4 BC847BF 7VBIAS 1 R18 27k 100k RS 0.015Ω 10VBIAS 9 C01 100µF X5R 4× Q3 Si7380 2× CG +V01 3.3V 20A 47Ω CS 10 R9 470k Q2 Si7380 2× FG 2 C3 10nF 11 +VIN Q1 Si4490 C4 1000pF 12 L1 C.PI-1365-1R2 T1 STG-0313W 10VBIAS R6 18k 15 14 –VIN 10VBIAS +VIN COMP CIN 2.2µF 100V X5R R14 1.2k 4 5 6 7 8 LTC1698 VDD FG CG SYNC PGND VAUX GND ICOMP OPTO +ISNS VCOMP –ISNS MARG PWTOK VFB=1.233V OVP 16 15 FG SYNC 14 13 0.1µF 12 11 10 9 +V01 R15 4.7k R16 2.8k COMP Figure 11. 36V to 72V Input to 3.3V at 20A Synchronous Forward Converter sn1950 1950fs 16 LT1950 U W U U APPLICATIO S I FOR ATIO High Efficiency, Isolated 26V 5A Output, Nonsynchronous Forward Converter 94 93 92 Figure 13 illustrates a nonsynchronous forward converter based on the LT1950 to provide a highly efficient, 26V 5A isolated output from 48V input. The LT1950-based converter using a single switch topology and utilizing the LT1950s adaptive maximum duty cycle clamp is a simple and highly optimized solution. Peak efficiencies of 92.8% (Figure 12) are achievable. Transformer and inductor are standard components. The quarter brick sized DC/DC converter (2.3" by 1.45") delivers over 125W and is only 0.4" high. The 26V converter can be used as a “front line” (isolating) converter in telecom systems with multiple outputs. +VIN CIN 2.2µF 100V X5R 36V TO 72V INPUT –VIN EFFICIENCY (%) 91 86 3 210k 9 27k 4 2 1 VIN2 VSEC ROSC SHDN BLANK GATE SYNC FB COMP ISENSE GND PGND VIN = 48V VOUT = 26V fOSC = 235kHz 85 84 2 1 4 3 LOAD CURRENT (A) Figure 12. LT1950-Based Nonsynchronous Forward Converter Efficiency vs Load Current (Figure 13 Circuit) T1 PA0581 +VOUT 47µH 232k 47µF 15 11 24.9k 470k 470pF 16 7 12 13 18k 18k Si7450 10 8 5 1950 F12 330R 1 5 2 0.015 OC1 – VREF 0.1µF VIN 88 + 6 LT1950 SLOPE 89 87 10V BIAS +VIN 6.8k 5 90 1µF 4 U3 3 LT1797 47k 1µF FMMT625 22k 8.2V U2 LT1009 1950 F13 Figure 13. 36V to 72V Input to 26V at 5A Nonsynchronous Forward Converter sn1950 1950fs 17 LT1950 U W U U APPLICATIO S I FOR ATIO 3.3V BIAS +VOUT R1 10.5k C1 2200pF R3 18k 1 2 3 R4 133k R2 1.21k R6 35.7k LT1950 COMP VSEC FB ROSC 4 R5 SYNC 16.2k 5 SLOPE 6 VREF 7 C2 SHDN 0.1µF 8 GND VIN BOOST PGND GATE VIN2 ISENSE BLANK R7 71.5k VIN C3 4.7µF 16V 16 15 L1 4.7µH CIN 10µF 50V TDK L2* 14 13 D2 BAS516 12 R9, 47Ω 9 C6 0.01µF R8 47k C5 10µF D1 50V MBRD660CT Q1 Si7456 11 10 VIN 4V TO 36V L3* C4 4.7µF 16V R10 0.010Ω +VOUT 12V, 1.5A COUT 47µF, 16V X5R, TDK ×4 *L2, L3 (COUPLED INDUCTORS) VP5-0155 Figure 14. 4V to 36V Input, 12V/1.5A Automotive SEPIC Converter sn1950 1950fs 18 LT1950 U PACKAGE DESCRIPTIO GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 TYP RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 2 3 4 5 6 7 .053 – .068 (1.351 – 1.727) 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) .008 – .012 (0.203 – 0.305) .0250 (0.635) BSC 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE GN16 (SSOP) 0502 sn1950 1950fs Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT1950 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1534 Ultralow Noise 2A Switching Regulator Reduces Conducted and Radiated EMI, Low Switching Harmonics, 20kHz to 250kHz Switching Frequency LT1619 Low Voltage Current Mode Controller 1.9V ≤ VIN ≤ 18V, 300kHz Operation, Boost, Flyback, SEPIC LT1681/LT3781 Dual Transistor Synchronous Forward Controller Operation Up to 72V Maximum LTC1693 High Speed MOSFET Driver 1.5A Peak Output Current, 16ns Rise/Fall Time at VCC = 12V, CL = 1nF LTC1698 Secondary Synchronous Rectifier Controller Use with the LT1950 or LT1681, Isolated Power Supplies, Contains Voltage Margining, Optocoupler Driver, Synchronization Circuit with the Primary Side LT1725 General Purpose Isolated Flyback Controller No Optoisolator Required, Accurate Regulation Without User Trims, 50kHz to 250kHz Switching Frequency, SSOP-16 Package LTC1871 Wide Input Range, No RSENSETM Controller Operation as Low as 2.5V Input, Boost, Flyback, SEPIC LT1910 Protected High Side MOSFET Driver 8V to 48V Supply Range, Protected –15V to 60V Supply Transient LTC3440 Micropower Buck-Boost DC/DC Converter Synchronous, Single Inductor, No Schottky Diode Required LTC3704 Positive-to-Negative DC/DC Controller 2.5V ≤ VIN ≤ 36V, No RSENSE Current Mode Operation, Excellent Transient Response No RSENSE is a trademark of Linear Technology Corporation. sn1950 1950fs 20 Linear Technology Corporation LT/TP 0503 1K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2003