Micrel, Inc. SY88883V 3.3V/5V 3.2Gbps CML LOW-POWER LIMITING POST AMPLIFIER WITH TTL SD FEATURES SY88883V DESCRIPTION ■ Multi-rate up to 3.2Gbps operation ■ Wide gain-bandwidth product • 38dB differential gain • 2.2GHz 3dB bandwidth ■ Low noise 50Ω CML data outputs • 800mVPP output swing • 60ps edge rates • 5psRMS typ. random jitter • 15psPP typ. deterministic jitter ■ Chatter-free Signal Detect (SD) output • 4.6dB electrical hysteresis • OC-TTL output with internal 5kΩ pull-up resistor ■ Programmable SD sensitivity using single external resistor ■ Internal 50Ω data input termination ■ Wide operating range • Single 3.3V ±10% or 5V ±10% power supply • –40°C to +85°C industrial temperature range ■ Available in a tiny 10-pin MSOP (3mm × 3mm) package The SY88883V low-power, limiting post amplifier is designed for use in fiber optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88883V quantizes these signals and outputs typically 800mVPP voltage-limited waveforms. The SY88883V operates from a single +3.3V ±10% or +5V ±10% power supply, over the industrial temperature range of –40°C to +85°C. With its wide bandwidth and highgain, signals with data rates up to 3.2Gbps and as small as 10mVpp can be amplified to drive devices with CML inputs or AC-coupled PECL inputs. The SY88883V generates a signal detect (SD) opencollector TTL output with internal 5kΩ pull-up resistor. A programmable signal detect level set pin (SDLVL) sets the sensitivity of the input amplitude detection. SD asserts high if the input amplitude rises above the threshold set by SDLVL and de-asserts low otherwise. Typically 4.6dB SD hysteresis is provided to prevent chattering. All support documentation can be found on Micrel’s web site at www.micrel.com. APPLICATIONS ■ 1.25Gbps and 2.5Gbps Gigabit Ethernet ■ 1.062Gbps and 2.125Gbps Fibre Channel ■ 155Mbps, 622Mbps, 1.25Gbps and 2.5Gbps SONET/SDH ■ Gigabit interface converter (GBIC) ■ Small form factor (SFF) and small form factor pluggable (SFP) transceivers ■ Parallel 10G Ethernet ■ High-gain line driver and line receiver FUNCTIONAL BLOCK DIAGRAM DIN 50Ω Limiting Amplifer DOUT CML Buffer /DIN /DOUT VCC –1.3V VCC GND TYPICAL PERFORMANCE Level Detect VCC 2.8kΩ 5kΩ 3.3V, 25°C, 10mVPP Input @2.5Gbps 223–1 PRBS, RLOAD = 50Ω to VCC SD Output Swing (75mV/div.) SDLVL OC-TTL Buffer TIME (100ps/div.) M9999-081005 [email protected] or (408) 955-1690 Rev.: B 1 Amendment: /0 Issue Date: August 2005 Micrel, Inc. SY88883V PACKAGE/ORDERING INFORMATION Ordering Information GND 1 10 VCC DIN 2 9 DOUT Part Number Package Type Operating Range Package Marking Lead Finish /DIN 3 8 /DOUT SY88883VKI K10-1 Industrial 883V Sn-Pb GND 4 7 VCC SY88823VKITR(1) K10-1 Industrial 883V Sn-Pb 6 SD SY88823VKG K10-1 Industrial 883V with Pb-Free bar-line indicator Pb-Free NiPdAu SY88823VKGTR(1) K10-1 Industrial 883V with Pb-Free bar-line indicator Pb-Free NiPdAu SDLVL 5 10-Pin MSOP (K10-1) Note: 1. Tape and Reel. PIN DESCRIPTION Pin Number Pin Name Type 1, 4 GND Ground 2, 3 DIN, /DIN Differential Data Input Differential data input. Each pin internally terminates to an internal reference voltage (VREF) through 50Ω. 5 SDLVL Input: Default is maximum sensitivity. Signal Detect Level Set: A resistor from this pin to VCC sets the threshold for the data input amplitude at which the SD output will be asserted. Bypass with 0.01µF low ESR capacitor from SDLVL to VCC to stabilize SDLVL. 6 SD Open Collector TTL Output with internal 5kΩ pull-up resistor Signal Detect: Asserts high when the data input amplitude rises above the threshold set by SDLVL. 7, 10 VCC Power Supply Positive power supply. Bypass with 0.1µF0.01µF low ESR capacitors. 0.01µF capacitors should be as close to VCC pins as possible. 8, 9 DOUT, /DOUT Differential CML Output M9999-081005 [email protected] or (408) 955-1690 Pin Function Device ground. Differential data output. 2 Micrel, Inc. SY88883V Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) ....................................... 0V to +7.0V SDLVL Voltage ........................................................0 to VCC SD Current ................................................................. ±5mA DOUT, /DOUT Current ................................................ ±25mA DIN, /DIN Current ...................................................... ±10mA Storage Temperature (TS) ....................... –65°C to +150°C Lead Temperature (soldering, 20 sec.) ..................... 260°C Supply Voltage (VCC) .............................. +3.0V to +3.6V or ............................................................ +4.5V to +5.5V Ambient Temperature (TA) ......................... –40°C to +85°C Junction Temperature (TJ) ....................... –40°C to +120°C Package Thermal Resistance(3) MSOP (θJA) Still-Air .................................................. 113°C/W (ψJB) ................................................................ 74°C/W DC ELECTRICAL CHARACTERISTICS VCC = 3.0V to 3.6V or 4.5V to 5.5V; RLOAD = 50Ω to VCC; TA = –40°C to +85°C; typical values at VCC = 3.3V, TA = 25°C. Symbol Parameter Condition Min Typ Max Units ICC Power Supply Current(4) 3.3V 5V 19 21 28 31 mA mA ICC Power Supply Current(5) 3.3V 5V 32 38 53 58 mA mA VREF Internal Reference Voltage SDLVL SDLVL Level VOH Output HIGH Voltage Note 6 VOL Output LOW Voltage Note 6 VOFFSET Differential Output Offset ZO Single-Ended Output Impedance 40 ZI Single-Ended Input Impedance 40 VCC –1.3 VREF VCC–0.020 VCC–0.005 V VCC V VCC V VCC–0.400 VCC–0.275 V ±80 mV 50 60 Ω 50 60 Ω Max Units VCC V 0.5 V TTL DC ELECTRICAL CHARACTERISTICS VCC = 3.0V to 3.6V or 4.5V to 5.5V; RLOAD = 50Ω to VCC; TA = –40°C to +85°C; typical values at VCC = 3.3V, TA = 25°C. Symbol Parameter Condition Min VOH SD Output HIGH Level Sourcing 100µA 2.4 VOL SD Output LOW Level Sinking 2mA Typ Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Thermal performance assumes use of 4-layer PCB. 4. Excludes current of CML output stage. See “Detailed Description.” 5. Total device current with no output load. 6. Output levels are based on a 50Ω to VCC load impedance. If the load impedance is different, the output level will be changed. Amplifier is in limiting mode. M9999-081005 [email protected] or (408) 955-1690 3 Micrel, Inc. SY88883V AC ELECTRICAL CHARACTERISTICS VCC = 3.0V to 3.6V or 4.5V to 5.5V; RLOAD = 50Ω to VCC; TA = –40°C to +85°C; typical values at VCC = 3.3V, TA = 25°C. Symbol Parameter Condition Min Typ Max Units HYS SD Hysteresis Note 7 2 4.6 8 dB PSRR Power Supply Rejection Ratio 35 tOFF SD Release Time 0.1 0.5 µs tON SD Assert Time 0.2 0.5 µs tr, tf Differential Output Rise/Fall Time (20% to 80%) Note 8 60 120 ps tJITTER Deterministic Random Note 9 15 5 VID Differential Input Voltage Swing VOD Differential Output Voltage Swing Note 10 550 VSR SD Sensitivity Range Note 11 10 B–3dB 3dB Bandwidth AV(Diff) Differential Voltage Gain S21 Single-Ended Small-Signal Gain 10 dB psPP psRMS 1800 800 mVPP mVPP 50 mVPP 2.2 GHz 32 38 dB 26 32 dB Notes: 7. Electrical signal. 8. With input signal VID > 50mVpp and 50Ω load. 9. Deterministic jitter measured using K28.5 pattern at 2.488Gbps, VID = 10mVpp. Random jitter measured using K28.7 pattern at 2.488Gbps, VID = 10mVPP. 10. Input is a 200MHz square wave, tr < 300ps, 50Ω load. VID ≥ 14mVpp. 11. This is the detectable range of input amplitudes that can de-assert SD. The input amplitude to assert SD is 2–8dB higher than the de-assert amplitude. See “Typical Operating Characteristics” for a graph showing how to choose a particular RSDLVL for a particular SD de-assert, and its associated assert, amplitude. TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, GND = 0V, TA = 25°C, unless otherwise stated. 90 SD Assert/De-assert Level vs. RSDLVL 80 VID (mVpp) 70 ASSERT 60 50 40 30 20 DE-ASSERT 10 0 10 M9999-081005 [email protected] or (408) 955-1690 100 1000 10000 100000 RSDLVL 4 Micrel, Inc. SY88883V DETAILED DESCRIPTION Signal Detect The SY88883V generates a chatter-free signal detect (SD) open-collector TTL output with internal 5kΩ pull-up resistor as shown in Figure 5. SD is used to determine that the input amplitude large enough to be considered a valid input. SD asserts high if the input amplitude rises above the threshold set by SDLVL and deasserts low otherwise. Typically 4.6dB SD hysteresis is provided to prevent chattering. Signal Detect-Level Set A programmable signal detect-level set pin (SDLVL) sets the threshold of the input amplitude detection. Connecting an external resistor between VCC and SDLVL sets the voltage at SDLVL. This voltage ranges from VCC to VREF. The external resistor creates a voltage divider between VCC and VREF as shown in Figure 6. If desired, an appropriate external voltage may be applied rather than using a resistor. The smaller the external resistor, implying a smaller voltage difference from SDLVL to VCC, lowers the SD sensitivity. Hence, larger input amplitude is required to assert SD. “Typical Operating Characteristics” shows the relationship between the input amplitude detection sensitivity and the SDLVL setting resistor. Hysteresis The SY88883V provides typically 4.6dB SD electrical hysteresis. By definition, a power ratio measured in dB is 10log(power ratio). Power is calculated as V2IN/R for an electrical signal. Hence, the same ratio can be stated as 20log(voltage ratio). While in linear mode, the electrical voltage input changes linearly with the optical power and, hence, the ratios change linearly. Therefore, the optical hysteresis in dB is half the electrical hysteresis in dB given in the data sheet. The SY88883V provides typically 2.3dB SD optical hysteresis. As the SY88883V is an electrical device, this data sheet refers to hysteresis in electrical terms. With 4.6dB SD hysteresis, a voltage factor of 1.7 is required to assert SD from its deassert level. The SY88883V low-power limiting post amplifier operates from a single +3.3V or +5V power supply, over temperatures from –40°C to +85°C. Signals with data rates up to 3.2Gbps and as small as 10mVPP can be amplified. Figure 1 shows the allowed input voltage swing. The SY88883V generates an SD output. SDLVL sets the sensitivity of the input amplitude detection. Input Amplifier/Buffer The SY88883V’s inputs are internally terminated with 50Ω to an internal reference voltage (VREF). VREF is typically 1.3V below VCC. Unless not affected by this internal termination scheme, upstream devices need to be AC-coupled to the SY88883V’s inputs. Figure 2 shows a simplified schematic of the input stage. The high-sensitivity of the input amplifier allows signals as small as 10mVPP to be detected and amplified. The input amplifier allows input signals as large as 1800mVPP. Input signals are linearly amplified with a typically 38dB differential voltage gain. Since it is a limiting amplifier, the SY88883V outputs typically 800mV PP voltage-limited waveforms for input signals that are greater than 10mVPP. Applications requiring the SY88883V to operate with highgain should have the upstream TIA placed as close as possible to the SY88883V’s input pins to ensure the best performance of the device. Output Buffer The SY88883V’s CML output buffer is designed to drive 50Ω lines. The output buffer requires appropriate termination for proper operation. An external 50Ω resistor to VCC or equivalent for each output pin provides this. Figure 3 shows a simplified schematic of the output stage and includes an appropriate termination method. Of course, driving a downstream device with a CML input that is internally terminated with 50Ω to VCC eliminates the need for external termination. As noted in the previous section, the amplifier outputs typically 800mVPP waveforms across 25Ω total loads. The output buffer, thus, switches typically 16mA tailcurrent. Figure 4 shows the power supply current measurement which excludes the 16mA tail-current. M9999-081005 [email protected] or (408) 955-1690 5 Micrel, Inc. SY88883V DATA+ 5mV (Min.) VIS(mV) 900mV (Max.) DATA– (DATA+) – (DATA–) 10mVpp (Min.) VID(mVpp) 1800mVpp (Max.) Figure 1. VIS and VID Definition VCC VCC 50Ω VCC VREF 50Ω 50Ω 50Ω 0.1µF DOUT Z0 = 50Ω /DOUT 50Ω Z0 = 50Ω 50Ω 0.1µF DIN 0.1µF /DIN AC-Coupling Capacitors 16mA ESD STRUCTURE ESD STRUCTURE GND GND Figure 3. Output Structure Figure 2. Input Structure VCC VCC ICC 16mA 5kΩ SD 50Ω 50Ω Figure 5. SD Output Structure ESD STRUCTURE VCC RSDLVL SDLVL 16mA 2.8kΩ GND VREF Figure 4. Power Supply Current Measurement M9999-081005 [email protected] or (408) 955-1690 Figure 6. SDLVL Setting Circuit 6 AC-Coupling Capacitors Micrel, Inc. SY88883V TYPICAL APPLICATIONS CIRCUIT VCC SD 0.1µF DIN From Transimpedance Amp. DOUT SY88883V /DIN 0.1µF VCC 0.1µF 200kΩ 0.1µF M9999-081005 [email protected] or (408) 955-1690 7 To CDR /DOUT SDLVL GND 0.1µF Micrel, Inc. SY88883V 10 LEAD MSOP (K10-1) Rev. 00 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB USA http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. M9999-081005 [email protected] or (408) 955-1690 8