ULTRA-PRECISION 1:4 LVPECL FANOUT BUFFER/TRANSLATOR WITH INTERNAL TERMINATION Micrel, Inc. Precision Edge® ® SY89831U Precision Edge SY89831U FEATURES ■ Guaranteed AC performance over temperature and voltage: • DC-to > 2.0GHz throughput • <450ps propagation delay (IN-to-Q) • < 20ps within-device skew • < 225ps rise/fall time ■ Ultra-low jitter design: • < 1psRMS cycle-to-cycle jitter • < 1psRMS random jitter • < 10psPP deterministic jitter • < 10psPP total jitter (clock) ■ Unique patent-pending input termination and VT pin accepts DC- and AC-coupled differential inputs ■ 800mV, 100K LVPECL output swing ■ Power supply 2.5V ±5% or 3.3V ±10% ■ Industrial temperature range: –40°C to +85°C ■ Available in 16-pin (3mm × 3mm) MLF® package Precision Edge® DESCRIPTION The SY89831U is a high-speed, 2GHz differential LVPECL 1:4 fanout buffer optimized for ultra-low skew applications. Within device skew is guaranteed to be less than 20ps (5ps typ.) over supply voltage and temperature. The differential input buffer has a unique internal termination design that allows access to the termination network through a VT pin. This feature allows the device to easily interface to different logic standards. A VREF–AC reference output is included for AC-coupled applications. The SY89831U is a part of Micrel's high-speed clock synchronization family. For applications that require a different I/O combination, consult Micrel’s website at www.micrel.com, and choose from a comprehensive product line of high-speed, low-skew fanout buffers, translators and clock generators. APPLICATIONS ■ ■ ■ ■ Processor clock distribution SONET clock distribution Fibre Channel clock distribution Gigabit Ethernet clock distribution FUNCTIONAL BLOCK DIAGRAM TYPICAL PERFORMANCE 1:4 155MHz Output Q0 /Q0 Output Swing (150mV/div.) /Q Q1 IN /Q1 50Ω VT /IN 50Ω EN (TTL/CMOS) Q Q2 VREF-AC TA = 25°C VCC = 3.3V VEE GND VIN = 800mV /Q2 D Q Q3 TIME (1ns/div.) /Q3 Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc. M9999-020707 [email protected] or (408) 955-1690 Rev.: D 1 Amendment: /0 Issue Date: February 2007 Precision Edge® SY89831U Micrel, Inc. /Q0 Q0 VCC GND PACKAGE/ORDERING INFORMATION 16 15 14 13 Ordering Information(1) Q1 1 12 IN /Q1 2 11 VT 10 VREF-AC 4 /IN 5 6 7 8 VCC EN 9 Q3 /Q2 3 /Q3 Q2 Part Number Package Type Operating Range Package Marking Lead Finish SY89831UMI MLF-16 Industrial 831U Sn-Pb SY89831UMITR(2) MLF-16 Industrial 831U Sn-Pb SY89831UMG(3) MLF-16 Industrial 831U with Pb-Free bar-line indicator NiPdAu Pb-Free SY89831UMGTR(2, 3) MLF-16 Industrial 831U with Pb-Free bar-line indicator NiPdAu Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. 16-Pin MLF® (MLF-16) PIN DESCRIPTION Pin Number Pin Name 15, 16 1, 2, 3, 4, 5, 6 Q0, /Q0 Q1, /Q1 Q2, /Q2 Q3, /Q3 Pin Function Differential 100K LVPECL Outputs: These LVPECL outputs are the precision, low skew copies of the inputs. Please refer to the “Truth Table” section for details. Unused output pairs may be left open. Terminate wtih 50Ω to VCC–2V. See “Output Termination Recommendations” section for more details. 8 EN This single-ended TTL/CMOS-compatible input functions as a synchronous output enable. The synchronous enable ensures that enable/disable will only occur when the outputs are in a logic LOW state. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to logic HIGH state (enabled) if left open. 9, 12 /IN, IN Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC- or DC-Coupled differential signs as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50Ω. Note that these inputs will default to an intermediate state if left open. Pleae refer to the “Input Interface Applications” section for more details. 10 VREF–AC Reference Voltage: These outputs bias to VCC–1.4V. They are used when AC coupling the inputs (IN, /IN). For AC-Coupled applications, connect VREF-AC to VT pin and bypass with 0.01µF low ESR capacitor to VCC. See “Input Interface Applications” section for more details. Maximum sink/source current is ±1.5mA. Due to the limited drive capability, each VREF-AC pin is only intended to drive its respective VT pin. 11 VT Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT pins provide a center-tap to a termination network for maximum interface flexibility. See “Input Interface Applications” section for more detaiils. 13 GND Ground. GND pins and exposed pad must be connected to the most negative potential of the device ground. 7, 14 VCC Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors and place as close to each VCC pin as possible. TRUTH TABLE IN /IN EN Q /Q 0 1 1 0 1 1 0 1 1 0 0 0(1) 1(1) X X Note: 1. On next negative transition of the input signal (IN). M9999-020707 [email protected] or (408) 955-1690 2 Precision Edge® SY89831U Micrel, Inc. Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) .................................. –0.5V to +4.0V Input Voltage (VIN) ............................... –0.5V to VCC +0.5V LVPECL Output Current (IOUT) Continuous ......................................................... 50mA Surge ................................................................ 100mA Input Current Source or Sink Current on (IN, /IN) .................. ±50mA VREF-AC Current Source or Sink Current on (IVT) .......................... ±2mA Lead Temperature (soldering, 20sec.) ...................... 260°C Storage Temperature (TS) ....................... –65°C to +150°C Supply Voltage Range ........................ +2.375V to +2.625V ............................................................ +3.0V to +3.6V Ambient Temperature (TA) ......................... –40°C to +85°C Package Thermal Resistance(3) MLF® (θJA) Still-Air ........................................................ 60°C/W (ΨJB) Junction-to-Board ...................................... 32°C/W DC ELECTRICAL CHARACTERISTICS(4) TA = –40°C to +85°C, unless otherwise stated. Symbol Parameter VCC Power Supply ICC Power Supply Current RIN Input Resistance (IN-to-VT) RDIFF-IN Max Units 2.625 3.6 V 47 70 mA 45 50 55 Ω Differential Input Resistance (IN-to-/IN) 90 100 110 Ω VIH Input HIGH Voltage (IN, /IN) VCC–1.2 VCC V VIL Input LOW Voltage (IN, /IN) 0 VIH–0.1 V VIN Input Voltage Swing (IN, /IN) see Figure 1a. 0.1 1.7 V VDIFF_IN Differential Input Voltage Swing |IN – /IN| see Figure 1b. 0.2 VREF–AC Condition Min Typ 2.375 3.0 No load, max. VCC. Output Reference Voltage V VCC–1.525 VCC–1.425VCC–1.325 V LVTTL/LVCMOS INPUT DC ELECTRICAL CHARACTERISTICS VCC = 2.375V to 3.60V; VEE = 0V; TA = –40°C to +85°C Symbol Parameter VIH Input HIGH Voltage VIL Condition Min Typ Max Units 2.0 VCC V Input LOW Voltage 0 0.8 V IIH Input HIGH Current –125 20 µA IIL Input LOW Current –300 µA Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB. ψJB and θJA values are determined for a 4-layer board in stil-air number, unless otherrwise stated. 4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. M9999-020707 [email protected] or (408) 955-1690 3 Precision Edge® SY89831U Micrel, Inc. LVPECL OUTPUT DC ELECTRICAL CHARACTERISTICS(6) VCC = +2.5V ±5% or +3.3V ±10%; RL = 50Ω to VCC –2V; TA = –40°C to +85°C unless otherwise stated. Symbol Parameter VOH Output HIGH Voltage (Q, /Q) Output LOW Voltage (Q, /Q) VOL VOUT VDIFF_OUT Condition Min Typ Max Units VCC–1.145 VCC–0.895 V VCC–1.945 VCC–1.695 V Output Voltage Swing (Q, /Q) See Figure 1a. 550 800 mV Differential Output Voltage Swing (Q, /Q) See Figure 1b. 1100 1600 mV LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS(6) VCC = +2.5V ±5% or +3.3V ±10%; TA = –40°C to +85°C unless otherwise stated. Symbol Parameter Condition Min VIH Input HIGH Voltage VIL Input LOW Voltage IIH Input HIGH Voltage –125 IIL Input LOW Voltage –300 Typ 2.0 Notes: 6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. M9999-020707 [email protected] or (408) 955-1690 4 Max Units VCC V 0.8 V 30 µA µA Precision Edge® SY89831U Micrel, Inc. AC ELECTRICAL CHARACTERISTICS(7) VCC = +2.5V ±5% or +3.3V ±10%; RL = 50Ω to VCC –2V; TA = –40°C to +85°C unless otherwise stated. Symbol Parameter Condition Min Typ fMAX Maximum Frequency VOUT ≥ 450mV 2.0 2.5 GHz tpd Propagation Delay 390 ps tSKEW IN-to-Q VIN ≥ 100mV IN-to-Q VIN ≥ 800mV Within-Device Skew Note 8 Part-to-Part Skew Note 9 250 Max Units 350 450 ps 5 20 ps 150 ps tS Set-Up Time EN to IN, /IN Note 10 300 ps tH Hold Time EN to IN, /IN Note 10 300 ps tJITTER Data Random Jitter (RJ) Deterministic Jitter (DJ) Note 11 Note 12 1 10 psRMS psPP Clock Cycle-to-Cycle Jitter Total Jitter (TJ) Note 13 Note 14 1 10 psRMS psPP 225 ps tr, tf Output Rise/Fall Times (20% to 80%) At full output swing. 70 150 Notes: 7. High-frequency AC parameters are guaranteed by design and characterization. 8. Within device skew is measured between two different outputs under identical input transitions. 9. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective inputs. 10. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications, set-up and hold times do not apply. 11. Random jitter is measured with a K28.7 pattern, measured at ≤fMAX. 12. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 223–1 PRBS pattern. 13. Cycle-to-cycle jitter definition: The variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn –Tn+1, where T is the time between rising edges of the output signal. 14. Total jitter definition: with an ideal clock input frequency of ≤ fMAX (device), no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. TIMING DIAGRAM EN VCC/2 tS VCC/2 tH /IN IN VIN tpd /Q VOUT Q M9999-020707 [email protected] or (408) 955-1690 5 Precision Edge® SY89831U Micrel, Inc. TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, GND = 0V, RL = 50Ω to VCC–2V, TA = 25°C, unless otherwise stated. 390 PROPAGATION DELAY (ps) 900 OUTPUT SWING (mV) 800 700 600 500 400 300 200 100 0 0 1000 2000 FREQUENCY (MHz) M9999-020707 [email protected] or (408) 955-1690 3000 Propagation Delay vs. Temperature Propagation Delay vs. Input Voltage Swing 450 PROPAGATION DELAY (ps) Output Swing vs. Frequency 380 370 360 350 340 330 320 310 300 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) 6 425 400 375 350 325 300 100 300 500 700 900 INPUT VOLTAGE SWING (V) Precision Edge® SY89831U Micrel, Inc. FUNCTIONAL CHARACTERISTICS VCC = 3.3V, GND = 0V, VIN = 800mV, RL = 50Ω to VCC–2V, TA = 25°C, unless otherwise stated. 622MHz Output 155MHz Output /Q Output Swing (150mV/div.) Output Swing (150mV/div.) /Q Q Q TIME (200ps/div.) TIME (1ns/div.) 1GHz Output Output Swing (150mV/div.) /Q Q TIME (150ps/div.) M9999-020707 [email protected] or (408) 955-1690 7 Precision Edge® SY89831U Micrel, Inc. SINGLE-ENDED AND DIFFERENTIAL SWINGS VIN, VOUT 800mV (typical) VDIFF_IN, VDIFF_OUT 1.6V (typical) Figure 1b. Differential Swing Figure 1a. Single-Ended Swing INPUT AND OUTPUT STAGES VCC IN VCC 50Ω VT 50Ω /IN /Q SY89831U Q Figure 2b. Simplified LVPECL Output Stage Figure 2a. Simplified Differential M9999-020707 [email protected] or (408) 955-1690 8 Precision Edge® SY89831U Micrel, Inc. INPUT INTERFACE APPLICATIONS VCC VCC VCC VCC LVPECL IN /IN SY89831U SY89831U Rpd VREF–AC NC VT NC VREF-AC For 2.5V, Rpd = 50Ω For 3.3V, Rpd = 100Ω For 2.5V, Rpd = 19 . For 3.3V, Rpd = 50 . Figure 3a. DC-Coupled LVPECL Input Interface VCC Figure 3b. AC-Coupled LVPECL Input Interface VCC VCC IN IN CML LVDS /IN /IN SY89831U SY89831U VCC SY89831U 0.01µF VREF-AC VCC /IN VT VT Rpd CML VCC Rpd VCC – 2V 0.01µF IN /IN LVPECL VCC VCC VCC IN VT NC VT VREF–AC NC VREF–AC 0.01µF Figure 3d. AC-Coupled CML Input Interface M9999-020707 [email protected] or (408) 955-1690 Figure 3e. LVDS Interface 9 Figure 3c. DC-Coupled CML Input Interface Precision Edge® SY89831U Micrel, Inc. OUTPUT TERMINATION RECOMMENDATIONS +3.3V +3.3V ZO = 50Ω R1 130Ω +3.3V +3.3V Z = 50Ω Z = 50Ω R1 130Ω +3.3V 50Ω 50Ω “source” ZO = 50Ω “destination” 50Ω R2 82Ω R2 82Ω Rb VCC C1 0.01µF (optional) Vt = VCC —2V Figure 5. Three-Resistor “Y-Termination” Figure 4. Parallel Termination— Thevenin Equivalent Notes: 1. Power-saving alternative to Thevenin termination. Note: 2. Place termination resistors as close to destination inputs as possible. 1. For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω. 3. Rb resistor sets the DC bias voltage, equal to Vt. For +2.5V systems Rb = 19Ω. 4. C1 is an optional bypass capacitor intended to compensate for any tr/tf mismatches. RELATED PRODUCT AND SUPPORT DOCUMENTATION Part Number Function Data Sheet Link SY89830U 1:4 LVPECL Fanout Buffer w/2:1 MUX Input www.micrel.com/product-info/products/sy89830u.shtml SY89832U 2.5V Ultra-Precision 1:4 LVDS Fanout Buffer/ Translator with Internal Termination www.micrel.com/product-info/products/sy89832u.shtml SY89833U 3.3V Ultra-Precision 1:4 LVDS Fanout Buffer/ Translator with Internal Termination www.micrel.com/product-info/products/sy89833u.shtml SY89834U 2.5/3.3V Two Input, 1GHz LVTTL/CMOS-to-LVPECL www.micrel.com/product-info/products/sy89833u.shtml 1:4 Fanout Buffer/Translator HBW Solutions New Products and Applications www.micrel.com/product-info/products/solutions.shtml 16-MLF® Manufacturing Guidelines Exposed Pad Application Note M9999-020707 [email protected] or (408) 955-1690 www.amkor.com/products/notes_papers/MLF_AppNote_0301.pdf 10 Precision Edge® SY89831U Micrel, Inc. 16-PIN EPAD MicroLeadFrame® (MLF-16) Package EP- Exposed Pad Die CompSide Island Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane PCB Thermal Consideration for 16-Pin MLF® Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: Note 1. Note 2. Package meets Level 2 moisture sensitivity classification, and are shipped in dry-pack form. Exposed pads must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB USA http://www.micrel.com The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. M9999-020707 [email protected] or (408) 955-1690 11