TI TL1431QD

TL1431
PRECISION PROGRAMMABLE REFERENCE
www.ti.com
SLVS062L – DECEMBER 1991 – REVISED OCTOBER 2007
FEATURES
1
• 0.4% Initial Voltage Tolerance
• 0.2-Ω Typical Output Impedance
• Fast Turnon…500 ns
•
•
•
D PACKAGE
(TOP VIEW)
JG OR PW PACKAGE
(TOP VIEW)
1
8
2
7
3
6
4
5
REF
ANODE
ANODE
NC
NC – No internal connection
ANODE terminals are connected internally.
ANODE
KTP PACKAGE
(TOP VIEW)
CATHODE
NC
NC
NC
1
8
2
7
3
6
4
5
FK PACKAGE
(TOP VIEW)
REF
NC
ANODE
NC
NC – No internal connection
LP PACKAGE
(TOP VIEW)
CATHODE
CATHODE
ANODE
ANODE
REF
REF
NC
NC
NC
NC
NC
4
3 2 1 20 19
18
5
6
17
7
15
14
9 10 11 12 13
8
16
NC
NC
NC
ANODE
NC
NC
NC
NC
NC
NC
CATHODE
ANODE
ANODE
NC
Sink Current Capability…1 mA to 100 mA
Low Reference Current (REF)
Adjustable Output Voltage…VI(ref) to 36 V
NC
CATHODE
NC
REF
NC
2
DESCRIPTION/ORDERING INFORMATION
The TL1431 is a precision programmable reference with specified thermal stability over automotive, commercial,
and military temperature ranges. The output voltage can be set to any value between VI(ref) (approximately 2.5 V)
and 36 V with two external resistors (see Figure 16). This device has a typical output impedance of 0.2 Ω. Active
output circuitry provides a very sharp turnon characteristic, making the device an excellent replacement for Zener
diodes and other types of references in applications such as onboard regulation, adjustable power supplies, and
switching power supplies.
The TL1431C is characterized for operation over the commercial temperature range of 0°C to 70°C. The
TL1431Q is characterized for operation over the full automotive temperature range of –40°C to 125°C. The
TL1431M is characterized for operation over the full military temperature range of –55°C to 125°C.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerFLEX is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1991–2007, Texas Instruments Incorporated
TL1431
PRECISION PROGRAMMABLE REFERENCE
www.ti.com
SLVS062L – DECEMBER 1991 – REVISED OCTOBER 2007
ORDERING INFORMATION (1)
PACKAGE (2)
TA
PowerFLEX™ – KTP
TL1431CKTPR
Tube of 75
TL1431CD
Reel of 2500
TL1431CDR
Bulk of 1000
TL1431CLP
Reel of 2000
TL1431CLPR
Tube of 150
TL1431CPW
Reel of 2000
TL1431CPWR
Tube of 75
TL1431QD
Reel of 2500
TL1431QDR
Tube of 150
TL1431QPW
Reel of 2000
TL1431QPWR
CDIP – JG
Tube of 50
TL1431MJG
TL1431MJG
LCCC – FK
Tube of 55
TL1431MFK
TL1431MFK
TO-226 / TO-92 – LP
TSSOP – PW
SOIC – D
–40°C to 125°C
TSSOP – PW
–55°C to 125°C
(1)
(2)
TOP-SIDE MARKING
Reel of 3000
SOIC – D
0°C to 70°C
ORDERABLE PART NUMBER
OBSOLETE
1431C
TL1431C
T1431
TL1431QD
T1431QPW
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
SYMBOL
REF
ANODE
CATHODE
FUNCTIONAL BLOCK DIAGRAM
CATHODE
+
−
REF
Vref
ANODE
2
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SLVS062L – DECEMBER 1991 – REVISED OCTOBER 2007
EQUIVALENT SCHEMATIC
CATHODE
1
800 Ω
800 Ω
REF
8
20 pF
150 Ω
3.28 kΩ
4 kΩ
10 kΩ
2.4 kΩ
20 pF
7.2 kΩ
1 kΩ
800 Ω
ANODE
2, 3, 6, 7
A.
All component values are nominal.
B.
Pin numbers shown are for the D package.
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
VKA
Cathode voltage
IKA
Continuous cathode current range
II(ref)
Reference input current range
θJA
Package thermal impedance (3) (4)
θJC
Package thermal impedance (5) (6)
TJ
Operating virtual junction temperature
Lead temperature
Tstg
(1)
(2)
(3)
(4)
(5)
(6)
MIN
MAX
37
V
–100
150
mA
–0.05
10
mA
(2)
D package
97
LP package
140
PW package
149
FK package
5.61
JG package
14.5
1,6 mm (1/16 in) from case for 10 s
Storage temperature range
–65
UNIT
°C/W
°C/W
150
°C
260
°C
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to ANODE, unless otherwise noted.
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with JESD 51-7.
Maximum power dissipation is a function of TJ(max), θJC, and TC. The maximum allowable power dissipation at any allowable case
temperature is PD = (TJ(max) – TC)/θJC. Operating at the absolute maximum TJ of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with MIL-STD-883.
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SLVS062L – DECEMBER 1991 – REVISED OCTOBER 2007
Recommended Operating Conditions
MIN
MAX
UNIT
VKA
Cathode voltage
VI(ref)
36
V
IKA
Cathode current
1
100
mA
TL1431C
0
70
TL1431Q
–40
125
TL1431M
–55
125
TA
Operating free-air temperature
°C
Electrical Characteristics
at specified free-air temperature, IKA = 10 mA (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TEST
CIRCUIT
25°C
VI(ref)
Reference input voltage
VKA = VI(ref)
VI(dev)
Deviation of reference input
voltage over full temperature
range (2)
VKA = VI(ref)
∆VI(ref)
∆VKA
Ratio of change in reference
input voltage to the change in ΔVKA = 3 V to 36 V
cathode voltage
II(ref)
Reference input current
R1 = 10 kΩ, R2 = ∞
II(dev)
Deviation of reference input
current over full temperature
range (2)
R1 = 10 kΩ, R2 = ∞
Imin
Minimum cathode current for
regulation
VKA = VI(ref)
Ioff
Off-state cathode current
VKA = 36 V, VI(ref) = 0
|zKA|
Output impedance (3)
VKA = VI(ref), f ≤ 1 kHz,
IKA = 1 mA to 100 mA
(1)
(2)
TA (1)
Full range
Figure 1
TL1431C
MIN
TYP
MAX
2490
2500
2510
2480
2520
UNIT
mV
Full range
Figure 1
4
20
mV
Full range
Figure 2
–1.1
–2
mV/V
1.5
2.5
25°C
Full range
Figure 2
3
μA
Full range
Figure 2
0.2
1.2
μA
25°C
Figure 1
0.45
1
mA
0.18
0.5
25°C
Full range
25°C
Figure 3
2
Figure 1
0.2
0.4
μA
Ω
Full range is 0°C to 70°C for C-suffix devices.
The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the
rated temperature range. The average full-range temperature coefficient of the reference input voltage αVI(ref) is defined as:
αVI(ref)
(
ppm
=
°C
(
(
V(
I dev)
°
V ( ) at 25 C
I ref
(
× 106
Max VI(ref)
TA
VI(dev)
where:
∆TA is the rated operating temperature range of the device.
Min VI(ref)
˙TA
(3)
αVI(ref) is positive or negative, depending on whether minimum VI(ref) or maximum VI(ref), respectively, occurs at the lower temperature.
∆VKA
|zKA| =
∆IKA
The output impedance is defined as:
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by:
|zKA| 1 + R1
R2 .
which is approximately equal to
(
4
|z'| = ∆V
∆I ,
(
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SLVS062L – DECEMBER 1991 – REVISED OCTOBER 2007
Electrical Characteristics
at specified free-air temperature, IKA = 10 mA (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA (1)
TL1431Q
TEST
CIRCUIT
25°C
TYP
MAX
MIN
TYP
MAX
2490
2500
2510
2475
2500
2540
2530
2460
UNIT
VI(ref)
Reference input voltage
VKA = VI(ref)
VI(dev)
Deviation of reference
input voltage over full
temperature range (2)
VKA = VI(ref)
Full
range
Figure 1
17
55
17
55 (3)
∆VI(ref)
∆VKA
Ratio of change in
reference input voltage
to the change in
cathode voltage
ΔVKA = 3 V to 36 V
Full
range
Figure 2
–1.1
–2
–1.1
–2
1.5
2.5
1.5
2.5
II(ref)
Reference input current
R1 = 10 kΩ, R2 = ∞
II(dev)
Deviation of reference
input current over full
temperature range (2)
R1 = 10 kΩ, R2 = ∞
Full
range
Figure 2
0.5
2
0.5
3 (3)
μA
Imin
Minimum cathode
current for regulation
VKA = VI(ref)
25°C
Figure 1
0.45
1
0.45
1
mA
Off-state cathode
current
0.18
0.5
0.18
0.5
Ioff
VKA = 36 V, VI(ref) = 0
|zKA|
Output impedance (4)
VKA = VI(ref), f ≤ 1 kHz,
IKA = 1 mA to 100 mA
Full
range
Figure 1
TL1431M
MIN
2470
25°C
(1)
(2)
Full
range
Figure 2
25°C
Full
range
Figure 3
25°C
Figure 1
2550
4
5
2
0.2
0.4
2
0.2
0.4
mV
mV
mV/V
μA
μA
Ω
Full range is –40°C to 125°C for Q-suffix devices and –55°C to 125°C for M-suffix devices.
The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the
rated temperature range. The average full-range temperature coefficient of the reference input voltage αVI(ref) is defined as:
αVI(ref)
(
ppm
=
°C
(
(
V(
I dev)
°
V ( ) at 25 C
I ref
(
× 106
Max VI(ref)
TA
VI(dev)
where:
∆TA is the rated operating temperature range of the device.
Min VI(ref)
˙TA
(3)
(4)
αVI(ref) is positive or negative, depending on whether minimum VI(ref) or maximum VI(ref), respectively, occurs at the lower temperature.
On products compliant to MIL-PRF-38535, this parameter is not production tested.
∆VKA
|zKA| =
∆IKA
The output impedance is defined as:
|z'| = ∆V
∆I ,
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by:
R1
|zKA| 1 +
R2 .
which is approximately equal to
(
(
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SLVS062L – DECEMBER 1991 – REVISED OCTOBER 2007
PARAMETER MEASUREMENT INFORMATION
VKA
Input
Input
VKA
IKA
IKA
R1
VI(ref)
R2
II(ref)
VI(ref)
Figure 1. Test Circuit for V(KA) = Vref
ǒ
Ǔ
VKA + VI(ref) 1 ) R1 ) II(ref)
R2
R1
Figure 2. Test Circuit for V(KA) > Vref
Input
VKA
Ioff
Figure 3. Test Circuit for Ioff
TYPICAL CHARACTERISTICS
Data at high and low temperatures are applicable only within the recommended operating free-air temperature
ranges of the various devices.
Table of Graphs
GRAPH
Reference voltage vs Free-air temperature
FIGURE
4
Reference current vs Free-air temperature
5
Cathode current vs Cathode voltage
6, 7
Off-state cathode current vs Free-air temperature
8
Ratio of delta reference voltage to delta cathode voltage vs Free-air temperature
9
Equivalent input-noise voltage vs Frequency
10
Equivalent input-noise voltage over a 10-second period
11
Small-signal voltage amplification vs Frequency
12
Reference impedance vs Frequency
13
Pulse response
14
Stability boundary conditions
15
6
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REFERENCE VOLTAGE
vs
FREE-AIR TEMPERATURE
REFERENCE CURRENT
vs
FREE-AIR TEMPERATURE
2.5
2.52
IKA = 10 mA
R1 = 10 kΩ
R2 = ∞
2.51
2.5
2.49
2.48
− 50
2
I I(ref) − Reference Current − µ A
VI(ref) − Reference Voltage − V
VI(ref) = VKA
IKA = 10 mA
0
− 25
25
50
75
100
1.5
1
0.5
0
− 50
125
− 25
TA − Free-Air Temperature − °C
0
25
50
75
100
TA − Free-Air Temperature − °C
Figure 4.
125
Figure 5.
CATHODE CURRENT
vs
CATHODE VOLTAGE
CATHODE CURRENT
vs
CATHODE VOLTAGE
150
800
VKA = VI(ref)
TA = 25°C
VKA = VI(ref)
TA = 25°C
600
I KA − Cathode Current − µ A
I KA − Cathode Current − mA
100
50
0
− 50
200
0
− 100
− 150
−3
400
−2
−1
0
1
VKA − Cathode Voltage − V
2
3
− 200
−2
−1
0
1
2
3
4
VKA − Cathode Voltage − V
Figure 6.
Figure 7.
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RATIO OF DELTA REFERENCE VOLTAGE TO
DELTA CATHODE VOLTAGE
vs
FREE-AIR TEMPERATURE
OFF-STATE CATHODE CURRENT
vs
FREE-AIR TEMPERATURE
0.35
VKA = 36 V
VI(ref) = 0
−0.85
VKA = 3 V to 36 V
−0.95
0.3
∆V I(ref) /∆V KA − mV/V
I KA(off) − Off-State Cathode Current − µ A
0.4
0.25
0.2
0.15
0.1
0.05
0
−50
−1.05
−1.15
−1.25
−1.35
− 25
0
25
50
75
100
125
−1.45
−50
TA − Free-Air Temperature − °C
− 25
0
25
50
75
100
125
TA − Free-Air Temperature − °C
Figure 8.
Figure 9.
EQUIVALENT INPUT-NOISE VOLTAGE
vs
FREQUENCY
260
Hz
IO = 10 mA
TA = 25°C
Vn − Equivalent Input-Noise Voltage − nV/
240
220
200
180
160
140
120
100
10
100
1k
10 k
100 k
f − Frequency − Hz
Figure 10.
8
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EQUIVALENT INPUT-NOISE VOLTAGE
OVER A 10-SECOND PERIOD
6
Vn − Equivalent Input-Noise Voltage − µV
5
4
3
2
1
0
−1
−2
−3
−4
f = 0.1 to 10 Hz
IKA = 10 mA
TA = 25°C
−5
−6
0
2
4
6
8
10
t − Time − s
19.1 V
1 kΩ
910 Ω
2000 µF
VCC
VCC
500 µF
TL1431
(DUT)
+
TLE2027
AV = 10 V/mV
−
16 Ω
820 Ω
16 Ω
1 µF
16 Ω
+
−
1 µF
160 kΩ
TLE2027
2.2 µF
33 kΩ
AV = 2 V/V
0.1 µF
CRO 1 MΩ
33 kΩ
VEE
VEE
TEST CIRCUIT FOR 0.1-Hz TO 10-Hz EQUIVALENT INPUT-NOISE VOLTAGE
Figure 11.
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SMALL-SIGNAL VOLTAGE AMPLIFICATION
vs
FREQUENCY
AV − Small-Signal Voltage Amplification − dB
60
IKA = 10 mA
TA = 25°C
Output
I(K)
50
15 kΩ
230 Ω
9 µF
40
+
30
8.25 kΩ
−
20
GND
10
TEST CIRCUIT FOR VOLTAGE AMPLIFICATION
0
1k
10 k
100 k
1M
10 M
f − Frequency − Hz
Figure 12.
REFERENCE IMPEDANCE
vs
FREQUENCY
100
|zka
Ω
|z
KA| − Reference Impedance − O
IKA = 1 mA to 100 mA
TA = 25°C
1 kΩ
Output
I(K)
10
50 Ω
−
+
1
GND
TEST CIRCUIT FOR REFERENCE IMPEDANCE
0.1
1k
10 k
100 k
1M
10 M
f − Frequency − Hz
Figure 13.
10
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PULSE RESPONSE
6
TA = 25°C
220 Ω
VI
Input
Output
Input and Output Voltages − V
5
4
Pulse
Generator
f = 100 kHz
3
Output
50 Ω
2
GND
1
TEST CIRCUIT FOR PULSE RESPONSE
0
0
1
5
2
3
4
t − Time − µs
6
7
Figure 14.
150 Ω
STABILITY BOUNDARY CONDITIONS
100
I KA − Cathode Current − mA
90
80
A-VKA = VI(ref)
B-VKA = 5 V
C-VKA = 10 V
D-VKA = 15 V
IKA
IKA = 10 mA
TA = 25°C
VI
+
CL
VBATT
−
70
Stable
60
Stable
B
C
TEST CIRCUIT FOR CURVE A
50
40
A
R1 =
10 kΩ
30
D
IKA
150 Ω
20
CL
10
VI
+
0
0.001
0.01
0.1
1
10
VBATT
R2
−
CL − Load Capacitance − µF
TEST CIRCUIT FOR CURVES B, C, AND D
A.
The areas under the curves represent conditions that may cause the device to oscillate. For curves B, C, and D, R2 and V+ are
adjusted to establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL then are adjusted to determine the ranges of
stability.
Figure 15.
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APPLICATION INFORMATION
Table of Application Circuits
APPLICATION
FIGURE
Shunt regulator
16
Single-supply comparator with temperature-compensated threshold
17
Precision high-current series regulator
18
Output control of a three-terminal fixed regulator
19
Higher-current shunt regulator
20
Crowbar
21
Precision 5-V, 1.5-A, 0.5% regulator
22
5-V precision regulator
23
PWM converter with 0.5% reference
24
Voltage monitor
25
Delay timer
26
Precision current limiter
27
Precision constant-current sink
28
R
V(BATT)
V(BATT)
VO
R1
0.1%
VI(ref)
VO
Von ≈ 2 V
Voff ≈ V(BATT)
TL1431
R2
0.1%
Input
TL1431
VIT = 2.5 V
VO + ǒ1 ) R1ǓVI(ref)
R2
A.
12
GND
R should provide cathode current ≥1 mA to
the TL1431 at minimum V(BATT).
Figure 16. Shunt Regulator
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Figure 17. Single-Supply Comparator With
Temperature-Compensated Threshold
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V(BATT)
V(BATT)
R
In
µA7805
2N2222
Out
VO
30 Ω
2N2222
TL1431
0.01 µF
TL1431
R2
R1
0.1%
R2
0.1%
ǒ
Ǔ
ǒ
VO + 1 ) R1 VI(ref)
R2
R
Ǔ
V + 1 ) R1 V I(ref)
R2
Min V = VI(ref) + 5 V
Figure 19. Output Control of a Three-Terminal Fixed
Regulator
R should provide cathode current ≥1 mA to
the TL1431 at minimum V(BATT).
Figure 18. Precision High-Current Series Regulator
V(BATT)
R1
4.7 kΩ
VO
A.
Common
VO
V(BATT)
VO
R1
R1
TL1431
C
R2
R2
TL1431
ǒ
ǒ
Figure 20. Higher-Current Shunt Regulator
In
V(BATT)
A.
Refer to the stability boundary conditions in
Figure 15 to determine allowable values for
C.
Figure 21. Crowbar
V(BATT)
Out
VO = 5 V
VO = 5 V, 1.5 A, 0.5%
LM317
Ǔ
Vtrip + 1 ) R1 VI(ref)
R2
Ǔ
VO + 1 ) R1 VI(ref)
R2
Rb
8.2 kΩ
Adjust
TL1431
243 Ω
0.1%
27.4 kΩ
0.1%
TL1431
243 Ω
0.1%
27.4 kΩ
0.1%
Figure 22. Precision 5-V, 1.5-A, 0.5% Regulator
A.
Rb should provide cathode current ≥1 mA to
the TL1431.
Figure 23. 5-V Precision Regulator
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12 V
6.8 kΩ
VCC
10 kΩ
5 V +0.5%
−
10 kΩ
0.1%
TL1431
10 kΩ
0.1%
+
X
Not
Used
TL598
Feedback
Figure 24. PWM Converter With 0.5% Reference
680 Ω
R3
V(BATT)
12 V
R1B
R1A
TL1431
R4
2 kΩ
R
TL1431
R2A
TL1431
R2B
On
C
Off
ǒ
Ǔ
High Limit + ǒ1 ) R1AǓV I(ref)
R2A
Low Limit + 1 ) R1B V I(ref)
R2B
A.
LED on When
Low Limit < V(BATT) < High Limit
RCL 0.1%
C
I
12 V
I (12 V) * V
I(ref)
Figure 26. Delay Timer
Select R3 and R4 to provide the desired
LED intensity and cathode current ≥1 mA to
the TL1431.
Figure 25. Voltage Monitor
IO
V(BATT)
Delay + R
V(BATT)
IO
R1
TL1431
TL1431
RS
0.1%
V
IO +
I(ref)
) IKA
R CL
V
R1 +
(BATT)
ǒ Ǔ
I
O
h FE
V
)I
IO +
KA
Figure 27. Precision Current Limiter
14
Submit Documentation Feedback
I(ref)
RS
Figure 28. Precision Constant-Current Sink
Copyright © 1991–2007, Texas Instruments Incorporated
Product Folder Link(s): TL1431
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9962001Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9962001QPA
ACTIVE
CDIP
JG
8
1
TBD
5962-9962001VPA
ACTIVE
CDIP
JG
8
1
TL1431CD
ACTIVE
SOIC
D
8
75
TL1431CDE4
ACTIVE
SOIC
D
8
75
TL1431CDG4
ACTIVE
SOIC
D
8
75
TL1431CDR
ACTIVE
SOIC
D
TL1431CDRE4
ACTIVE
SOIC
TL1431CDRG4
ACTIVE
TL1431CKTPR
TL1431CLP
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
TBD
A42 SNPB
N / A for Pkg Type
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OBSOLETE
PFM
KTP
2
TBD
Call TI
Call TI
ACTIVE
TO-92
LP
3
1000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL1431CLPE3
ACTIVE
TO-92
LP
3
1000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL1431CLPM
OBSOLETE
TO-92
LP
3
TBD
Call TI
Call TI
TL1431CLPR
ACTIVE
TO-92
LP
3
2000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL1431CLPRE3
ACTIVE
TO-92
LP
3
2000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL1431CPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL1431CPWE4
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL1431CPWG4
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL1431CPWR
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL1431CPWRE4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL1431CPWRG4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL1431MFK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE N / A for Pkg Type
TL1431MFKB
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE N / A for Pkg Type
TL1431MJG
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
TL1431MJGB
ACTIVE
CDIP
JG
8
1
TBD
A42 SNPB
N / A for Pkg Type
TL1431QD
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR/
Level-1-235C-UNLIM
TL1431QDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL1431QDR
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR/
Level-1-235C-UNLIM
TL1431QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
CU NIPDAU
Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL1431QLP
OBSOLETE
TO-92
LP
3
Lead/Ball Finish
MSL Peak Temp (3)
no Sb/Br)
TBD
Call TI
Call TI
TBD
Call TI
Call TI
TBD
CU NIPDAU
Level-1-250C-UNLIM
CU NIPDAU
Level-1-260C-UNLIM
TL1431QLPR
OBSOLETE
TO-92
LP
3
TL1431QPWR
ACTIVE
TSSOP
PW
8
2000
TL1431QPWRG4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TL1431CDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL1431CPWR
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TL1431CDR
SOIC
D
8
2500
340.5
338.1
20.6
TL1431CPWR
TSSOP
PW
8
2000
346.0
346.0
29.0
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPSF001F – JANUARY 1996 – REVISED JANUARY 2002
KTP (R-PSFM-G2)
PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE
0.080 (2,03)
0.070 (1,78)
0.243 (6,17)
0.233 (5,91)
0.228 (5,79)
0.218 (5,54)
0.050 (1,27)
0.040 (1,02)
0.010 (0,25) NOM
0.130 (3,30) NOM
0.215 (5,46)
NOM
0.247 (6,27)
0.237 (6,02)
Thermal Tab
(See Note C)
0.287 (7,29)
0.277 (7,03)
0.381 (9,68)
0.371 (9,42)
0.100 (2,54)
0.090 (2,29)
0.032 (0,81) MAX
Seating Plane
0.090 (2,29)
0.180 (4,57)
0.004 (0,10)
0.005 (0,13)
0.001 (0,02)
0.031 (0,79)
0.025 (0,63)
0.010 (0,25) M
0.010 (0,25) NOM
Gage Plane
0.047 (1,19)
0.037 (0,94)
0.010 (0,25)
2°–ā6°
4073388/M 01/02
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
The center lead is in electrical contact with the thermal tab.
Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
Falls within JEDEC TO-252 variation AC.
PowerFLEX is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MSOT002A – OCTOBER 1994 – REVISED NOVEMBER 2001
LP (O-PBCY-W3)
PLASTIC CYLINDRICAL PACKAGE
0.205 (5,21)
0.175 (4,44)
0.165 (4,19)
0.125 (3,17)
DIA
0.210 (5,34)
0.170 (4,32)
Seating
Plane
0.157 (4,00) MAX
0.050 (1,27)
C
0.500 (12,70) MIN
0.104 (2,65)
FORMED LEAD OPTION
0.022 (0,56)
0.016 (0,41)
0.016 (0,41)
0.014 (0,35)
STRAIGHT LEAD OPTION
D
0.135 (3,43) MIN
0.105 (2,67)
0.095 (2,41)
0.055 (1,40)
0.045 (1,14)
1
2
3
0.105 (2,67)
0.080 (2,03)
0.105 (2,67)
0.080 (2,03)
4040001-2 /C 10/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Lead dimensions are not controlled within this area
D. FAlls within JEDEC TO -226 Variation AA (TO-226 replaces TO-92)
E. Shipping Method:
Straight lead option available in bulk pack only.
Formed lead option available in tape & reel or ammo pack.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MSOT002A – OCTOBER 1994 – REVISED NOVEMBER 2001
LP (O-PBCY-W3)
PLASTIC CYLINDRICAL PACKAGE
0.539 (13,70)
0.460 (11,70)
1.260 (32,00)
0.905 (23,00)
0.650 (16,50)
0.610 (15,50)
0.020 (0,50) MIN
0.098 (2,50)
0.384 (9,75)
0.335 (8,50)
0.748 (19,00)
0.217 (5,50)
0.433 (11,00)
0.335 (8,50)
0.748 (19,00)
0.689 (17,50)
0.114 (2,90)
0.094 (2,40)
0.114 (2,90)
0.094 (2,40)
0.169 (4,30)
0.146 (3,70)
DIA
0.266 (6,75)
0.234 (5,95)
0.512 (13,00)
0.488 (12,40)
TAPE & REEL
4040001-3 /C 10/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Tape and Reel information for the Format Lead Option package.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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