TI SN74AUC1G04DBVR

SN74AUC1G04
SINGLE INVERTER GATE
www.ti.com
SCES370Q – SEPTEMBER 2001 – REVISED APRIL 2007
FEATURES
•
•
•
•
•
Available in the Texas Instruments
NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max tpd of 2.2 ns at 1.8 V
NC
NC
•
•
•
•
Low Power Consumption, 10-µA Max ICC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
NC
DRY PACKAGE
(TOP VIEW)
NC
1
A
2
GNDPR3
VCC
EWNC
I
EV
6
5
4
Y
NC – No internal connection
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single inverter gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC
operation.
The SN74AUC1G04 performs the Boolean function Y = A.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the ouput,
preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report, Applications of
Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2007, Texas Instruments Incorporated
SN74AUC1G04
SINGLE INVERTER GATE
www.ti.com
SCES370Q – SEPTEMBER 2001 – REVISED APRIL 2007
ORDERING INFORMATION
–40°C to 85°C
(1)
(2)
(3)
ORDERABLE PART
NUMBER
PACKAGE (1) (2)
TA
TOP-SIDE MARKING (3)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
(Pb-free)
Reel of 3000
SN74AUC1G04YZPR
_ _ _UC_
SON – DRY
Reel of 5000
SN74AUC1G04DRYR
PREVIEW
SOT (SOT-23) – DBV
Reel of 3000
SN74AUC1G04DBVR
U04_
SOT (SC-70) – DCK
Reel of 3000
SN74AUC1G04DCKR
UC_
SOT (SOT-553) – DRL
Reel of 4000
SN74AUC1G04DRLR
UC_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the
TI website at www.ti.com.
DBV/DCK/DRL/DRY: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUT
A
OUTPUT
Y
H
L
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
A
2
4
Y
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
VCC
VI
VO
MIN
MAX
Supply voltage range
–0.5
3.6
V
range (2)
V
Input voltage
–0.5
3.6
Voltage range applied to any output in the high-impedance or power-off state (2)
–0.5
3.6
Output voltage range (2)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±20
mA
±100
mA
Continuous current through VCC or GND
θJA
Package thermal impedance (3)
DBV package
206
DCK package
252
DRL package
142
DRY package
234
YZP package
Tstg
(1)
(2)
(3)
2
UNIT
Storage temperature range
°C/W
132
–65
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
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SN74AUC1G04
SINGLE INVERTER GATE
www.ti.com
SCES370Q – SEPTEMBER 2001 – REVISED APRIL 2007
Recommended Operating Conditions
VCC
(1)
Supply voltage
VCC = 0.8 V
VIH
High-level input voltage
MIN
MAX
0.8
2.7
UNIT
V
VCC
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
0.65 × VCC
V
1.7
VCC = 0.8 V
0
0.35 × VCC
VIL
Low-level input voltage
VCC = 1.1 V to 1.95 V
VI
Input voltage
0
3.6
V
VO
Output voltage
0
VCC
V
VCC = 2.3 V to 2.7 V
IOH
High-level output current
IOL
Low-level output current
0.7
VCC = 0.8 V
–0.7
VCC = 1.1 V
–3
VCC = 1.4 V
–5
VCC = 1.65 V
–8
VCC = 2.3 V
–9
VCC = 0.8 V
0.7
VCC = 1.1 V
3
VCC = 1.4 V
5
VCC = 1.65 V
8
VCC = 2.3 V
∆t/∆v
Input transition rise or fall rate
TA
Operating free-air temperature
(1)
V
mA
mA
9
–40
20
ns/V
85
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
VOL
TEST CONDITIONS
VCC
MIN TYP (1) MAX
IOH = –100 µA
0.8 V to 2.7 V
IOH = –0.7 mA
0.8 V
IOH = –3 mA
1.1 V
0.8
IOH = –5 mA
1.4 V
1
IOH = –8 mA
1.65 V
1.2
IOH = –9 mA
2.3 V
1.8
IOL = 100 µA
0.8 V to 2.7 V
IOL = 0.7 mA
0.8 V
IOL = 3 mA
1.1 V
0.3
IOL = 5 mA
1.4 V
0.4
IOL = 8 mA
1.65 V
0.45
2.3 V
0.6
IOL = 9 mA
UNIT
VCC – 0.1
0.55
V
0.2
0.25
V
VI = VCC or GND
0 to 2.7 V
±5
µA
Ioff
VI = VO or 2.7 V
0
±10
µA
ICC
VI = VCC or GND,
10
µA
Ci
VI = VCC or GND
II
(1)
A input
IO = 0
0.8 V to 2.7 V
2.5 V
3
pF
All typical values are at TA = 25°C.
Submit Documentation Feedback
3
SN74AUC1G04
SINGLE INVERTER GATE
www.ti.com
SCES370Q – SEPTEMBER 2001 – REVISED APRIL 2007
Switching Characteristics
over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 1)
PARAMETER
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
FROM
(INPUT)
TO
(OUTPUT)
VCC = 0.8 V
TYP
MIN
MAX
MIN
MAX
MIN
TYP
MAX
MIN
MAX
A
Y
4.4
0.8
3
0.5
2
0.5
1
2.1
0.5
1.6
tpd
UNIT
ns
Switching Characteristics
over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
Y
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
MIN
TYP
MAX
MIN
MAX
0.6
1.2
2.2
0.5
1.9
UNIT
ns
Operating Characteristics
TA = 25°C
PARAMETER
Cpd
4
Power dissipation
capacitance
TEST
CONDITIONS
VCC = 0.8 V
VCC = 1.2 V
VCC = 1.5 V
VCC = 1.8 V
VCC = 2.5 V
TYP
TYP
TYP
TYP
TYP
f = 10 MHz
14
14
14
14
19
Submit Documentation Feedback
UNIT
pF
SN74AUC1G04
SINGLE INVERTER GATE
www.ti.com
SCES370Q – SEPTEMBER 2001 – REVISED APRIL 2007
PARAMETER MEASUREMENT INFORMATION
2 × VCC
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCC
GND
RL
LOAD CIRCUIT
VCC
CL
RL
V∆
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
15 pF
15 pF
15 pF
15 pF
15 pF
30 pF
30 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
2 kΩ
1 kΩ
500 Ω
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.15 V
0.15 V
VCC
Timing Input
VCC/2
0V
tw
tsu
th
VCC
VCC/2
Input
VCC/2
VCC
VCC/2
VCC/2
Data Input
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VCC
VCC/2
Input
VCC/2
0V
tPHL
tPLH
VOH
VCC/2
Output
VCC/2
VOL
tPHL
VCC/2
VCC/2
VOL
tPZL
tPLZ
VCC
VCC/2
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VCC/2
0V
tPZH
VOH
Output
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
tPLH
VCC/2
VCC
Output
Control
VOL + V∆
VOL
tPHZ
VCC/2
VOH – V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
Submit Documentation Feedback
5
PACKAGE OPTION ADDENDUM
www.ti.com
21-Jun-2010
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
SN74AUC1G04DBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
SN74AUC1G04DBVRE4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
SN74AUC1G04DBVRG4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
SN74AUC1G04DCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
SN74AUC1G04DCKRE4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
SN74AUC1G04DCKRG4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
SN74AUC1G04DRLR
ACTIVE
SOT
DRL
5
4000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
SN74AUC1G04DRLRG4
ACTIVE
SOT
DRL
5
4000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
SN74AUC1G04DRYR
PREVIEW
SON
DRY
6
5000
TBD
Call TI
SN74AUC1G04YZPR
ACTIVE
DSBGA
YZP
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Call TI
Samples Not Available
Level-1-260C-UNLIM
Request Free Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
(3)
21-Jun-2010
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
SN74AUC1G04DBVR
SOT-23
DBV
5
3000
180.0
9.2
SN74AUC1G04DCKR
SC70
DCK
5
3000
180.0
SN74AUC1G04DRLR
SOT
DRL
5
4000
180.0
SN74AUC1G04YZPR
DSBGA
YZP
5
3000
180.0
3.23
3.17
1.37
4.0
8.0
Q3
9.2
2.24
2.34
1.22
4.0
8.0
Q3
9.2
1.78
1.78
0.69
4.0
8.0
Q3
8.4
1.02
1.52
0.63
4.0
8.0
Q1
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2009
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74AUC1G04DBVR
SN74AUC1G04DCKR
SOT-23
DBV
5
3000
202.0
201.0
28.0
SC70
DCK
5
3000
202.0
201.0
28.0
SN74AUC1G04DRLR
SOT
DRL
5
4000
202.0
201.0
28.0
SN74AUC1G04YZPR
DSBGA
YZP
5
3000
220.0
220.0
34.0
Pack Materials-Page 2
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