MC10EP89 3.3V / 5VECL Coaxial Cable Driver Description The MC10EP89 is a differential fanout gate specifically designed to drive coaxial cables. The device is especially useful in digital video broadcasting applications; for this application, since the system is polarity free, each output can be used as an independent driver. The driver produces swings 70% larger than a standard ECL output. When driving a coaxial cable, proper termination is required at both ends of the line to minimize signal loss. The 1.6 V (5 V) and 1.4 V (3.3 V) swing allow for termination at both ends of the cable, while maintaining a 800 mV (5 V) and 700 mV (3.3 V) swing at the receiving end of the cable. Because of the larger output swings, the device cannot be terminated into the standard VCC−2.0 V. All of the DC parameters are tested with a 50 W to VCC−3.0 V load. The driver accepts a standard differential ECL input and can run off of the digital video broadcast standard −5.0 V supply. • • • • 8 8 1 SOIC−8 D SUFFIX CASE 751 1 8 1 310 ps Typical Propagation Delay Maximum Frequency > 2 GHz Typical 1.6 V (5 V) and 1.4 V (3.3 V) VOUTpp Swing PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V Open Input Default State Safety Clamp on Inputs Q Output Will Default LOW with Inputs Open or at VEE Pb−Free Packages are Available HEP89 ALYWG G TSSOP−8 DT SUFFIX CASE 948R 1 HP89 ALYWG G 5V DG G • MARKING DIAGRAMS* 8 Features • • • • http://onsemi.com DFN8 MN SUFFIX CASE 506AA 1 4 A = Assembly Location L = Wafer Lot Y = Year W = Work Week D = Date Code G = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2006 January, 2006 − Rev. 6 1 Publication Order Number: MC10EP89/D MC10EP89 Q0 Q0 1 8 2 7 Table 1. PIN DESCRIPTION VCC D PIN FUNCTION D*, D* ECL Data Inputs Q0, Q1, Q0, Q1 ECL Data Outputs VCC Positive Supply VEE Negative Supply * Pins will default LOW when left open. Q1 3 6 D Q1 4 5 VEE Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 kW Internal Input Pullup Resistor ESD Protection N/A Human Body Model Machine Model Charged Device Model Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC−8 TSSOP−8 DFN8 Flammability Rating Oxygen Index: 28 to 34 Transistor Count > 4 kV > 200 V > 2 kV Pb Pkg Pb−Free Pkg Level 1 Level 1 Level 1 Level 1 Level 3 Level 1 UL−94 V−0 @ 0.125 in 152 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. http://onsemi.com 2 MC10EP89 Table 3. MAXIMUM RATINGS Rating Unit VCC Symbol PECL Mode Power Supply Parameter VEE = 0 V Condition 1 6 V VEE NECL Mode Power Supply VCC = 0 V −6 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V V Iout Output Current Continuous Surge 50 100 mA mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm 8 SOIC 8 SOIC 190 130 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board 8 SOIC 41 to 44 °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm 8 TSSOP 8 TSSOP 185 140 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board 8 TSSOP 41 to 44 °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm DFN8 DFN8 129 84 °C/W °C/W Tsol Wave Solder <2 to 3 sec @ 248°C <2 to 3 sec @ 260°C 265 265 °C Pb Pb−Free Condition 2 VI VCC VI VEE Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. http://onsemi.com 3 MC10EP89 Table 4. DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 24 30 36 26 34 40 30 36 42 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 3) 2130 2255 2405 2180 2336 2455 2200 2400 2475 mV VOL Output LOW Voltage (Note 3) 500 784 1100 480 786 1100 440 882 1060 mV VIH Input HIGH Voltage (Single−Ended) 2070 2410 2170 2490 2240 2580 mV VIL Input LOW Voltage (Single−Ended) 1350 1800 1350 1820 1350 1855 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 4) 2.0 3.3 2.0 3.3 2.0 3.3 V IIH Input HIGH Current 150 mA IIL Input LOW Current 150 0.5 150 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −0.3 V. 3. All loading with 50 W to VCC − 3.0 V. 4. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 5. DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 27 34 41 30 37 44 33 40 47 mA Output HIGH Voltage (Note 6) 3830 3955 4105 3880 4037 4155 3900 4102 4175 mV VOL Output LOW Voltage (Note 6) 1900 2205 2500 1850 2265 2450 1850 2177 2450 mV VIH Input HIGH Voltage (Single−Ended) 3770 4110 3870 4190 3940 4280 mV VIL Input LOW Voltage (Single−Ended) 3050 3500 3050 3520 3050 3555 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 7) 2.0 5.0 2.0 5.0 2.0 5.0 V IIH Input HIGH Current 150 mA IIL Input LOW Current IEE Power Supply Current VOH 150 0.5 150 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary +0.5 V to −0.5 V. 6. All loading with 50 W to VCC − 3.0 V. 7. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. http://onsemi.com 4 MC10EP89 Table 6. DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −3.3 V (Note 8) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 24 30 36 26 34 40 30 36 42 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 9) −1170 −1145 −895 −1120 −964 −845 −1100 −900 −825 mV VOL Output LOW Voltage (Note 9) −2800 −2516 −2200 −2820 −2514 −2220 −2860 −2478 −2240 mV VIH Input HIGH Voltage (Single−Ended) −1230 −890 −1130 −810 −1060 −720 mV VIL Input LOW Voltage (Single−Ended) −1950 −1500 −1950 −1480 −1950 −1445 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 10) 0.0 V IIH Input HIGH Current 150 mA IIL Input LOW Current −1.3 0.0 −1.3 0.0 150 −1.3 150 0.5 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −0.3 V. 9. All loading with 50 W to VCC − 3.0 V. 10. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 7. DC CHARACTERISTICS, NECL VCC = 0V, VEE = −5.2 (Note 11) −40°C Symbol Characteristic Min 25°C Typ Max Min Typ 85°C Max Min Typ Max Unit IEE Power Supply Current 27 34 41 30 37 44 33 40 47 mA VOH Output HIGH Voltage (Note 12) −1170 −1045 −895 −1120 −964 −845 −1100 −900 −825 mV VOL Output LOW Voltage (Note 12) −3100 −2795 −2500 −3150 −2835 −2550 −3150 −2824 −2550 mV VIH Input HIGH Voltage (Single−Ended) −1230 −890 −1130 −810 −1060 −720 mV VIL Input LOW Voltage (Single−Ended) −1950 −1500 −1950 −1480 −1950 −1445 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 13) 0.0 V IIH Input HIGH Current 150 mA IIL Input LOW Current −3.2 0.0 −3.2 150 0.5 0.0 −3.2 150 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.7 V to −0.3 V. 12. All loading with 50 W to VCC − 3.0 V. 13. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. http://onsemi.com 5 MC10EP89 Table 8. AC CHARACTERISTICS VCC = 0V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 14) −40°C Symbol Characteristic fmax Maximum Toggle (See Figure 2 Fmax/JITTER) tPLH, tPHL Propagation Delay to Output Differential tSKEW Min Typ 25°C Max Min >2 220 85°C Max Min Typ >2 280 340 Within Device Skew Q, Q Device to Device Skew (Note 15) 5.0 tJITTER Cycle−to−Cycle Jitter (See Figure 2 Fmax/JITTER) VPP Input Voltage Swing (Differential Configuration) tr tf Output Rise/Fall Times (20% − 80%) Q, Q Typ 250 Max >2 310 370 20 120 5.0 .5 <1 150 800 1200 175 250 325 270 Unit GHz 330 390 ps 20 120 5.0 20 120 ps .5 <1 .5 <1 ps 150 800 1200 150 800 1200 mV 200 275 350 225 295 375 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 14. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC−3.0 V. 15. Skew is measured between outputs under identical transitions. 1800 9 8 5V 1400 7 1200 6 3.3 V 1000 5 ÉÉ ÉÉ 800 4 600 3 400 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 2 (JITTER) 200 0 0 1000 2000 3000 FREQUENCY (MHz) Figure 2. Fmax/Jitter http://onsemi.com 6 JITTER OUT ps (RMS) VOUTpp (mV) 1600 1 4000 5000 MC10EP89 DC BLOCKING CAPACITORS 75 W 75 W COAX 75W 0.1 mF EP89 75 W 150 W 150 W 75 WWCOAX 0.1 mF 75 W VEE Figure 3. Cable Driver Termination Configuration Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 4. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) http://onsemi.com 7 MC10EP89 ORDERING INFORMATION Package Shipping † SOIC−8 98 Units / Rail MC10EP89DG SOIC−8 (Pb−Free) 98 Units / Rail MC10EP89DR2 SOIC−8 2500 / Tape & Reel MC10EP89DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel MC10EP89DT TSSOP−8 100 Units / Rail MC10EP89DTG TSSOP−8 (Pb−Free) 100 Units / Rail MC10EP89DTR2 TSSOP−8 2500 / Tape & Reel MC10EP89DTR2G TSSOP−8 (Pb−Free) 2500 / Tape & Reel MC10EP89MNR4 DFN8 1000 / Tape & Reel DFN8 (Pb−Free) 1000 / Tape & Reel Device MC10EP89D MC10EP89MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1642/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 8 MC10EP89 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AG −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 1 0.25 (0.010) M Y M 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− H 0.10 (0.004) D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC10EP89 PACKAGE DIMENSIONS TSSOP−8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R−02 ISSUE A 8x 0.15 (0.006) T U 0.10 (0.004) S 2X L/2 L 8 5 1 PIN 1 IDENT 0.15 (0.006) T U K REF S M T U S V 0.25 (0.010) B −U− 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. S M A −V− F DETAIL E C 0.10 (0.004) −T− SEATING PLANE D −W− G DETAIL E http://onsemi.com 10 DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_ MC10EP89 PACKAGE DIMENSIONS DFN8 CASE 506AA−01 ISSUE C D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B PIN ONE REFERENCE 2X 0.10 C 2X ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ 0.10 C TOP VIEW 0.08 C SEATING PLANE MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 −−− 0.25 0.35 A 0.10 C 8X DIM A A1 A3 b D D2 E E2 e K L E (A3) SIDE VIEW A1 C D2 e e/2 4 1 8X L E2 K 8 5 8X b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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