NCV8518A Low Dropout Linear Regulator with Watchdog, Wake Up, RESET, and ENABLE The NCV8518A device is a precision micropower voltage regulator. It has a fixed output voltage of 5.0 V and regulates within ±2%. It is suitable for use in all automotive environments and contains all the required functions to control a microprocessor. This device has low dropout voltage and low quiescent current. It includes a watchdog timer, adjustable reset, wake up and enable function. Also encompassed in this device are safety features such as thermal shutdown and short circuit protection. It is capable of handling up to 45 V transients. http://onsemi.com MARKING DIAGRAMS 8 SOIC-8 EXPOSED PAD CASE 751AC 8 1 8518A AYWW G 1 Features •Output Voltage of 5.0 V •±2% Output Voltage Tolerance •Output Current up to 250 mA •Micropower Compatible Control Functions: -ENABLE -Watchdog -RESET -Wake Up •NCV Prefix for Automotive and Other Applications Requiring Site and Change Control •Low Dropout Voltage •Low Quiescent Current of 100 mA •Protection Features: -Thermal Shutdown -Short Circuit •Low Sleep Mode Current less than 1.0 mA •AEC Qualified •PPAP Capable •These are Pb-Free Devices 16 NCV8518A AWLYYWWG 1 1 A WL YY, Y WW G, or G Device NCV8518APDG = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package Package Shipping† SOIC-8* 98 Units / Rail NCV8518APDR2G SOIC-8* NCV8518APWG SOIC-16* 2500 / Tape & Reel 47 Units / Rail NCV8518APWR2G SOIC-16* 1000 / Tape & Reel •Tire Pressure Monitor •Battery Powered Consumer Electronics March, 2008 - Rev. 1 SOIC-16 LEAD WIDE BODY EXPOSED PAD CASE 751R ORDERING INFORMATION Applications © Semiconductor Components Industries, LLC, 2008 16 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *These packages are inherently Pb-Free. 1 Publication Order Number: NCV8518A/D NCV8518A PIN CONNECTIONS Wake Up 1 SOIC-8 EP 8 GND Delay SOIC-16 EP 1 RESET NC NC GND NC Delay NC NC VOUT WDI ENABLE VIN VOUT 16 Wake Up RESET NC WDI NC ENABLE NC VIN PIN FUNCTION DESCRIPTION Pin SOIC-8 EP SOIC-16 EP Symbol Description 4 8 VOUT 5 9 VIN Input supply voltage. 7 13 WDI CMOS compatible Watchdog input. The watchdog function monitors the falling edge of the incoming signal. 2 3 GND Ground connection. 6 11 ENABLE 8 15 RESET 3 5 Delay - 1, 2, 4, 6, 7, 10, 12, 14 NC 1 16 Wake Up Regulated output voltage. ENABLE control for the IC. Positive logic. CMOS compatible output RESET goes low whenever VOUT drops by more than 7.0% from nominal, or during the absence of a correct watchdog signal. Buffered reference voltage used to create timing current for RESET and Watchdog threshold frequency from RDelay. No Connection. Continuously generated signal that interrupts the microprocessor from sleep mode. http://onsemi.com 2 NCV8518A VIN VOUT Ilimit OSCH ENABLE TSD Enable FB Rail Reference VBG OSCL + - + UVLO WDI Watchdog + Wakeup Logic Buffer Iref Delay + - Reset Driver RESET OSCH OSCL Timing Circuit Wakeup Driver Figure 1. Block Diagram http://onsemi.com 3 Wake Up NCV8518A MAXIMUM RATINGS Rating Symbol Value Unit VIN, ENABLE -0.3 to 45 V Output Voltage VOUT -0.3 to +7.0 V RESET Voltage VRESET 0 V to VOUT V RESET Current (RESET may be incidentally shorted either to VOUT or to GND without damage) IRESET Internally Limited mA ESD Susceptibility (Human Body Model) - 2.0 kV Logic Inputs/Outputs (Reset, WDI, Wake Up, Delay) - -0.3 to +7.0 V Operating Junction Temperature TJ -40 to150 °C Storage Temperature Range TS -55 to +150 °C Moisture Sensitivity Level SOIC-16 EP (Case 751R) SOIC-8 EP (Case 751AC) MSL Input Voltage 2 2 Lead Temperature Soldering: Reflow Leaded Part 60-150 sec above 183°C, 30 sec max at peak Lead-Free Part 60-150 sec above 217°C, 40 sec max at peak - 240 peak 265 peak °C °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. THERMAL CHARACTERISTICS Parameter Board/Mounting Conditions Typical Value Unit SO-8 Exposed Pad Package minimum-pad board (Note 1) 1 sq. inch spreader board (Note 2) Junction to case top (Y-JT, qJT) 19 8 °C/W Junction to pin1 (Y-JL1, qJL1) 68 63 °C/W 9 10 °C/W 235 57 °C/W minimum-pad board (Note 3) 1 sq. inch spreader board (Note 2) Junction to case top (Y-JT, qJT) 30 16 °C/W Junction to pin1 (Y-JL1, qJL1) 70 65 °C/W Junction to board (Y-JB, qJB) (Note 4) 15 17 °C/W Junction to ambient (RqJA, qJA) 150 55 °C/W Junction to board (Y-JB, qJB )3 Junction to ambient (RqJA, qJA) SO-16 Exposed Pad Package Specific notes on thermal characterization conditions: All boards are 0.062” thick FR4, 3” square, with varying amounts of copper heat spreader, in still air (free convection) conditions. Numerical values are derived from an axisymmetric finite-element model where active die area, total die area, flag area, pad area, and board area are equated to the actual corresponding areas. 1. 1 oz copper, 6 x 9 mm, 0.062” thick FR-4. 2. 1 oz copper, 645 mm2 (1in2) spreader area (includes exposed pad). 3. 1 oz copper, 17.2 mm2 spreader area (minimum exposed pad, not including traces which are assumed). 4. “board” is defined as center of exposed pad soldered to board; this is the recommended number to be used for thermal calculations, as it best represents the primary heat flow path and is least sensitive to board and ambient properties. http://onsemi.com 4 NCV8518A ELECTRICAL CHARACTERISTICS (-40°C ≤ TJ ≤ 150°C; 6.0 V ≤ VIN ≤ 28 V, 100 mA ≤ IOUT ≤ 150 mA, C2 = 1.0 mF, RDelay = 60 k; unless otherwise specified.) Symbol Min Typ Max Unit Output Voltage VOUT 4.9 -2% 5.00 5.10 +2% V Dropout Voltage (VIN - VOUT, IOUT = 150 mA) (Note 5) VDO - 425 750 mV Load Regulation (VIN = 13.5 V, 100 mA ≤ IOUT ≤ 150 mA) Regload - 5.0 30 mV Line Regulation (6.0 V ≤ VIN ≤ 28 V, IOUT = 5.0 mA) Regline - 5.0 20 mV Ilim 255 400 - mA TJmax 150 180 210 °C - 100 - 150 1.0 - 4.50 4.65 4.75 V Output Low (RLOAD = 10 k to VOUT, VOUT = 1.0 V) - - 0.2 0.4 V Output High (RLOAD = 10 k to GND) - VOUT - 0.4 VOUT - 0.2 - V Power On Reset Delay Time (VIN = 13.5 V, RDelay = 60 k, IOUT = 5.0 mA) (VIN = 13.5 V, RDelay = 120 k, IOUT = 5.0 mA) VIN = 13.5 V, RDelay = 500 k, IOUT = 5.0 mA) tD 2.0 - 3.0 6.0 25 4.0 - WDIhigh 30 50 70 %VOUT WDIhys 25 100 - mV Input Current (WDI = 6.0 V) - - 0.1 2.0 mA Wake Up Rising Edge to WDI Falling Edge Delay - 5.0 - - ms 2.0 - 0.8 - - 3.0 10 Characteristic Output Current Limit Thermal Shutdown (Guaranteed by Design) Quiescent Current (VIN = 13.5 V, IOUT = 100 mA, 150 mA, ENABLE = 2.0 V) (ENABLE = 0 V, TA = +125°C) mA IQ RESET Threshold Voltage ms Watchdog Input Threshold Hysteresis Wake Up WDI ENABLE (Note 6) Vth(EN) Input Threshold Logic Low Logic High Input Current (ENABLE = 2.0 V) - 5. Measured when the output voltage has dropped 2% from the nominal value. 6. If ENABLE is connected to VIN, a 20 kW resistor must be placed in series. http://onsemi.com 5 V mA NCV8518A ELECTRICAL CHARACTERISTICS (continued) (-40°C ≤ TJ ≤ 150°C; 6.0 V ≤ VIN ≤ 28 V, 100 mA ≤ IOUT ≤ 150 mA, C2 = 1.0 mF, RDelay = 60 k; unless otherwise specified.) Symbol Characteristic Min Typ Max 18 - 25 50 208 32 - 45 50 55 9.0 - 12.5 25 104 16 - Unit Wake Up Output (VIN = 14 V, IOUT = 5.0 mA) Wake Up Period (RDELAY = 60 k) (RDELAY = 120 k) (RDELAY = 500 k) - Wake Up Duty Cycle Nominal - RESET HIGH to Wake Up Rising Delay Time (RDELAY = 60 k) 50% RESET Rising Edge to 50% Wake Up Edge (RDELAY = 120 k) (RDELAY = 500 k) - Wake Up Response to Watchdog Input 50% WDI Falling Edge to 50% Wake Up Falling Edge - - 0.1 5.0 ms Wake Up Response to RESET 50% RESET Falling Edge to 50% Wake Up Falling Edge (VOUT = 5.0 V→ 4.5 V) - - 0.1 5.0 ms Output Low (RLOAD = 10 k) - - 0.2 0.4 V Output High (RLOAD = 10 k) - VOUT - 0.5 VOUT - 0.25 - V - - 0.48 - V ms % ms Delay Output Voltage (RDELAY = 60 k, 120 k, 500 k) DEFINITION OF TERMS Dropout Voltage: The input-to-output voltage differential at which the circuit ceases to regulate against further reduction in input voltage. Measured when the output voltage has dropped 100 mV from the nominal value obtained at 14 V input, dropout voltage is dependent upon load current and junction temperature. Input Voltage: The DC voltage applied to the input terminals with respect to ground. Line Regulation: The change in output voltage for a change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected. Load Regulation: The change in output voltage for a change in load current at constant chip temperature. Quiescent Current: The part of the positive input current that does not contribute to the positive load current. The regulator ground lead current with no load. Current Limit: Peak current that can be delivered to the output. http://onsemi.com 6 NCV8518A TIMING DIAGRAMS VIN, ENABLE RESET Wake Up Duty Cycle = 50% Wake Up RESET High to Wake Up Delay Time Wake Up Duty Cycle will be 50% when the WDI pulse occurs at the low state of the Wake Up Signal. WDI VOUT POR Power Up Min WDI falling edge delay after Wake Up rising edge Microprocessor Sleep Mode Normal Operation with Varying Watchdog Signal Figure 2. Power Up, Sleep Mode and Normal Operation VIN, ENABLE RESET Delay Time RESET Wake Up RESET High to Wake Up Delay Time WDI VOUT POR Wake Up Period Figure 3. Error Condition: Watchdog Remains Low and a RESET is Issued RESET Wake Up Wake Up Period Wake Up Response to Reset WDI VIN, ENABLE RESET Threshold VOUT POR VOUT Decreasing Power Down POR Wake Up Response to WDI Figure 4. Power Down, Restart Sequence, and Wake Up Response to WDI http://onsemi.com 7 NCV8518A TYPICAL PERFORMANCE CHARACTERISTICS 5.01 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 5.1 5 mA Load 5.0 4.9 -50 0 50 100 TJ, TEMPERATURE (°C) 25°C 5.00 4.99 150 5 Figure 5. Output Voltage vs. Temperature 10 15 20 INPUT VOLTAGE (V) 25 30 Figure 6. Output Voltage vs. Input Voltage 3.3 6.4 3.2 POR DELAY (ms) POR DELAY (ms) 6.2 3.1 60 kW Rdelay 3.0 2.9 120 kW Rdelay 6.0 5.8 2.8 2.7 -50 0 50 100 TJ, TEMPERATURE (°C) 5.6 -50 150 Figure 7. POR Delay vs. Temperature, 60 kW Rdelay 27 WAKEUP PERIOD (ms) ESR (W) 150 UNSTABLE REGION 0.1 - 10 mF 100 100 mF 10 50 100 TJ, TEMPERATURE (°C) Figure 8. POR Delay vs. Temperature, 120 kW Rdelay 10000 1000 0 STABLE REGION, ALL CAP VALUES 1 26 60 kW Rdelay 25 24 0.1 mF UNSTABLE 0.1 0 25 50 75 OUTPUT CURRENT (mA) 100 23 -50 Figure 9. Stability Region of Capacitive ESR vs. Output Current 0 50 100 TJ, TEMPERATURE (°C) 150 Figure 10. Wakeup Period vs. Temperature http://onsemi.com 8 NCV8518A TYPICAL PERFORMANCE CHARACTERISTICS 30 25 200 POR DELAY (ms) WAKEUP PERIOD (ms) 250 150 100 20 15 10 50 5 0 0 100 200 300 400 0 500 0 100 200 300 400 RDelay (kW) RDelay (kW) Figure 11. Wakeup Period vs. RDelay Figure 12. POR Delay vs. RDelay 6 60 5 50 500 VOUT TRANSIENT (mV) OUTPUT VOLTAGE (V) 4.7 mF, 0.32 ESR 4 3 2 1 40 22 mF, 0.20 ESR 30 20 100 mF, 0.12 ESR 10 0 0 0 1 4 2 3 INPUT VOLTAGE (V) 5 6 0 Figure 13. Output Voltage vs. Input Voltage, 5 mA Load 50 100 150 200 SWITCHING CURRENT (mA) 250 Figure 14. Load Transient Response 104 700 600 500 QUIESCENT CURRENT (mA) DROPOUT VOLTAGE (mV) 125°C 25°C 400 300 -40°C 200 100 0 0 50 100 LOAD CURRENT (mA) 25°C 100 98 96 150 Figure 15. Dropout Voltage vs. Output Current -40°C 102 125°C 0 50 100 LOAD CURRENT (mA) 150 Figure 16. Quiescent Current vs. Output Current http://onsemi.com 9 NCV8518A OPERATING DESCRIPTION General RESET The NCV8518A is a precision micropower voltage regulator featuring low quiescent current (100 mA typical at 250 mA load) and low dropout voltage (450 mV typical at 150 mA). Integrated microprocessor control functions include Watchdog, Wakeup and RESET. An Enable input is provided for logic level control of the regulator state. The combination of low quiescent current and comprehensive microprocessor interface functions make the NCV8518A ideal for use in both battery operated and automotive applications. The NCV8518A is internally protected against short circuit and thermal runaway conditions. No external components are required to engage these protective mechanisms. The device continues to operate through 45 volt input transients, an important consideration in automotive environments. As output voltage falls, the RESET output will maintain its current state down to VOUT = 1 V. A Reset signal (active low) is asserted for any of four conditions: 1. During power up, RESET is held low until the output voltage is in regulation. 2. During operation, if the output voltage falls below the Reset threshold, RESET switches low, and will remain low until both the output voltage has recovered and the Reset delay timer cycle has completed following that recovery. 3. RESET will switch low if the regulator does not receive a Watchdog input signal within a Wakeup period. 4. Regardless of output voltage, RESET will switch low if the regulator input voltage VIN, falls below a level required to sustain the internal control circuits. The specific voltage is temperature dependent, and is approximately 4.75 V at 20°C. The Wakeup output is pulled low during a RESET regardless of the cause of the RESET. After the RESET returns high, the Wakeup cycle begins again (see Figure 4). The RESET Delay Time, Wakeup signal frequency and RESET high to Wakeup delay time are all set by one external resistor, RDelay, according to the following equations: Wakeup and Watchdog To reduce battery drain, a microprocessor or microcontroller can transition to a low current consumption (“sleep”) mode when code execution is suspended or complete. The NCV8518A Wakeup signal is generated and output periodically to interrupt sleep mode. The nominal Wakeup output is a 5 volt square wave (generated from VOUT) with a duty cycle of 50%, at a frequency determined by external timing resistor RDELAY. In response to the rising edge of the Wakeup signal, the microprocessor will subsequently output a Watchdog pulse and check its inputs to decide if it should resume normal operation or remain in sleep mode. The NCV8518A responds to the falling edge of the Watchdog signal, which it expects at least once during each Wakeup period. When the correct Watchdog signal is received, the Wakeup output is forced low. Other Watchdog pulses received within the same cycle are ignored. The Watchdog circuitry continuously monitors the input Watchdog signal (WDI) from the microprocessor. The absence of a falling edge on the Watchdog input during one Wakeup cycle will cause a Reset pulse to be output at the end of the Wakeup cycle (see Figure 4). Wakeup Period (seconds) = (4.17 RESET Delay Time (seconds) = (5.21 10-7) * RDELAY (W) 10-8) * RDELAY (W) RESET High to Wakeup Delay Time (seconds) = (2.08 10-7) * RDELAY (W) The voltage present at the Delay pin is a buffered bandgap voltage (~1.25 V) and can be used as a reference for an external tracking regulator. Enable This is a standard TTL and CMOS logic compatible input that can be used to turn the regulator on or off. Logic high enables the regulator; logic low disables it (also called shutdown). In the disabled/shutdown state, the pass transistor is off and total quiescent current is less than 1 mA. http://onsemi.com 10 NCV8518A C1* 0.1 mF VOUT VIN C2 1.0 mF WDI I/O OK NCV8518A Delay Fault RESET RESET WAKE UP RDelay 120 k GND I/O ENABLE OFF *C1 required if regulator is located far from power supply filter. Figure 17. Application Circuit http://onsemi.com 11 VDD ON Microprocessor VBAT NCV8518A PACKAGE DIMENSIONS SOIC-8 EP D SUFFIX CASE 751AC-01 ISSUE B 2X NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS IN MILLIMETERS (ANGLES IN DEGREES). 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 MM TOTAL IN EXCESS OF THE “b” DIMENSION AT MAXIMUM MATERIAL CONDITION. 4. DATUMS A AND B TO BE DETERMINED AT DATUM PLANE H. 0.10 C A-B D 8 E1 2X 0.10 C D 1 F EXPOSED PAD 5 ÉÉÉ ÉÉÉ PIN ONE LOCATION DETAIL A D A 5 8 G E h 2X 4 4 0.20 C e 8X b 0.25 C A-B D B 1 BOTTOM VIEW A END VIEW TOP VIEW A 0.10 C A2 b1 GAUGE PLANE 0.10 C L SEATING PLANE C SIDE VIEW ÉÉ ÉÉ ÇÇ ÉÉ ÇÇ ÉÉ c H 8X A A1 0.25 (L1) DETAIL A q c1 (b) SECTION A-A SOLDERING FOOTPRINT* 2.72 0.107 1.52 0.060 7.0 0.275 Exposed Pad 4.0 0.155 2.03 0.08 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 12 DIM A A1 A2 b b1 c c1 D E E1 e L L1 F G h q MILLIMETERS MIN MAX 1.35 1.75 0.00 0.10 1.35 1.65 0.31 0.51 0.28 0.48 0.17 0.25 0.17 0.23 4.90 BSC 6.00 BSC 3.90 BSC 1.27 BSC 0.40 1.27 1.04 REF 2.24 3.20 1.55 2.51 0.25 0.50 0_ 8_ NCV8518A PACKAGE DIMENSIONS SOIC-16 LEAD WIDE BODY, EXPOSED PAD PDW SUFFIX CASE 751R-02 -UISSUE B A M 16 P 0.25 (0.010) M W M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751R-01 OBSOLETE, NEW STANDARD 751R-02. 9 B 1 R x 45_ 8 -WG PIN 1 I.D. 14 PL DETAIL E TOP SIDE DIM A B C D F G H J K L M P R C F -T0.10 (0.004) T K D 16 PL 0.25 (0.010) T U M SEATING PLANE W S S J DETAIL E H EXPOSED PAD 1 8 INCHES MIN MAX 0.400 0.411 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.130 0.138 0.010 0.012 0.004 0.009 0.180 0.188 0_ 7_ 0.395 0.415 0.010 0.029 SOLDERING FOOTPRINT* L 16 MILLIMETERS MIN MAX 10.15 10.45 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 3.31 3.51 0.25 0.32 0.10 0.25 4.58 4.78 0_ 7_ 10.05 10.55 0.25 0.75 .350 9 Exposed Pad .175 .050 BACK SIDE CL .200 .18 8 CL .376 .07 4 .145 .024 SCALE 2:1 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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