NUS1204MN Overvoltage Protection IC with Integrated MOSFET This device represents a new level of safety and integration by combining the NCP304 overvoltage protection circuit (OVP) with a −12 V P−Channel power MOSFET. It is specifically designed to protect sensitive electronic circuitry from overvoltage transients and power supply faults. During such hazardous events, the IC quickly disconnects the input supply from the load, thus protecting the load before any damage can occur. The OVP IC is optimized for applications using an external AC−DC adapter or a car accessory charger to power a portable product or recharge its internal batteries. It has a nominal overvoltage threshold of 4.725 V which makes it ideal for single cell Li−Ion as well as 3/4 cell NiCD/NiMH applications. http://onsemi.com MARKING DIAGRAM WDFN6 CASE 506AN 1 1 2 U2 M G 3 6 5 4 U2 = Specific Device Code M = Date Code G = Pb−Free Package Features • • • • • • • • OvervoltageTurn−Off Time of Less Than 20 ms Accurate Voltage Threshold of 4.725 V, Nominal High Accuracy Undervoltage Threshold of 2.0% −12 V Integrated P−Channel Power MOSFET Low RDS(on) = 75 mW @ −4.725 V Low Profile 2.0 x 2.0 mm WDFN Package Suitable for Portable Applications Maximum Solder Reflow Temperature @ 260°C This device is manufactured with a Pb−Free external lead finish only. PIN CONNECTIONS GATE 1 OUT 2 GND 3 8 7 6 DRAIN 5 SOURCE 4 IN (Top View) Benefits • Provide Battery Protection • Integrated Solution Offers Cost and Space Savings • Integrated Solution Improves System Reliability ORDERING INFORMATION Device Package Shipping † Applications NUS1204MNT1G 3000 Tape & Reel • Portable Computers and PDAs • Cell Phones and Handheld Products • Digital Cameras WDFN6 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 1 Publication Order Number: NUS1204MN/D NUS1204MN SOURCE AC/DC Adapter of Accessory Charger DRAIN Schottky Diode P−CH IN GATE + C1 + − LOAD OUT Vref GND Figure 1. Simplified Schematic PIN FUNCTION DESCRIPTIONS Pin # Symbol Pin Description 1 GATE Gate pin of the P−Channel Power MOSFET 2 OUT This signal drives the gate of a P−channel Power MOSFET. It is controlled by the voltage level on the IN pin. When an overvoltage event is detected, the OUT pin is driven to within 1.0 V of VIN in less than 20 msec provided that gate and stray capacitance is less than 12 nF. 3, 7 GND Circuit Ground 4 IN 5 SOURCE 6, 8 DRAIN This pin senses an external voltage point. If the voltage on this input rises above the overvoltage threshold (VTH), the OUT pin will be driven to within 1.0 V of VIN, thus disconnecting the P−Channel Power MOSFET. The nominal threshold level is 4.725 V and this threshold level can be increased with the addition of an external resistor between the IN pin and the adapter. Source pin of the P−Channel Power MOSFET Drain pin of the P−Channel Power MOSFET OVERVOLTAGE PROTECTION CIRCUIT TRUTH TABLE IN OUT <Vth GND >Vth VIN http://onsemi.com 2 NUS1204MN MAXIMUM RATINGS (TA = 25°C unless otherwise stated) Rating Pin Symbol Min Max Unit OUT Voltage to GND 2 VO −0.3 12 V Input Pin Voltage to GND 4 Vinput −0.3 12 V Maximum Power Dissipation (Note 1) − PD − 0.96 W − RθJA − 130 130 °C/W Junction Temperature − TJ − 150 °C Operating Ambient Temperature − TA −40 85 °C Storage Temperature Range − Tstg −65 150 °C 2,3,4 − 2.5 − kV −12 V 8 V −0.6 A Thermal Resistance Junction−to−Air (Note 1) OVP IC P−Channel FET ESD Performance (HBM) (Note 2) Drain−to−Source Voltage VDSS Gate−to−Source Voltage VGS Continuous Drain Current, Steady State, TA = 25°C (Note 1) −8 ID Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface−mounted on FR4 board using 1 inch sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Human body model (HBM): MIL STD 883C Method 3015−7, (R = 1500 W, C = 100 pF, F = 3 pulses delay 1 s). ELECTRICAL CHARACTERISTICS (TA= 25°C, Vcc = 6.0 V, unless otherwise specified) Characteristic Input Threshold (Pin 4, Vin Increasing) Input Threshold Hysteresis (Pin 4, Vin Decreasing) Supply Current (Pin 4) (Vin = 4.34 V) (Vin = 6.5 V) Symbol Min Typ Max Unit VTH 4.630 4.725 4.820 V VHYS 0.135 0.225 0.315 V − − − − 3.0 3.9 − − 0.55 0.65 0.70 0.80 mA Iin Minimum Operating Voltage (Pin 4) (Note 3) (TA = 25°C) (TA = −40°C to 85°C) Vin(min) V Output Voltage High (Vin = 8.0 V; ISource = 1.0 mA) Output Voltage High (Vin = 8.0 V; ISource = 0.25 mA) Output Voltage High (Vin = 8.0 V; ISource = 0 mA) Voh Vin−1.0 Vin−0.25 Vin−0.1 − − V Output Voltage Low (Input < 4.5 V; ISink = 0 mA; CNTRL = 0 V) Vol − − 0.1 V ms Propagation Delay Input to Output Complementary Output NCP304 Series Output Transition, High to Low Output Transition, Low to High tpHL tpLH 3. Guaranteed by design. http://onsemi.com 3 − − 10 21 − 60 NUS1204MN P−CHANNEL MOSFET (TA= 25°C, unless otherwise specified) Parameter Symbol Drain to Source On Resistance VGS = −4.5 V, ID = 600 mA VGS = −4.5 V, ID = 1.0 A Min Typ Max 75 75 100 100 RDS(on) Zero Gate Voltage Drain Current VGS = −4.5 V, VGS = 0 V, VDS = −10 V Units mW mA IDSS −1.0 Turn On Delay (Note 4) VGS = −4.5 V ton Turn Off Delay (Note 4) VGS = −4.5 V toff Input Capacitance VGS = 0 V, f = 1.0 MHz, VDS = −10 V Cin ns 5.5 ns 20 pF 531 Gate to Source Leakage Current VGS = 8.0 V, VDS = 0 V IGSS nA ±10 Drain to Source Breakdown Voltage VGS = 0 V, ID = −250 mA V(BR)DSS V −12 Gate Threshold Voltage VGS = VDS, ID = −250 mA V(GS)th V −0.4 4. Switching characteristics are independent of operating junction temperature. http://onsemi.com 4 −0.7 −1.0 NUS1204MN PACKAGE DIMENSIONS WDFN6, 2x2 CASE 506AN−01 ISSUE B D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. B PIN ONE REFERENCE 0.10 C 2X ÍÍÍ ÍÍÍ E DIM A A1 A3 b D D2 E E2 e K L J 0.10 C 2X A3 0.10 C A 6X 0.08 C SOLDERMASK DEFINED MOUNTING FOOTPRINT A1 C SEATING PLANE D2 D2 MILLIMETERS MIN MAX 0.70 0.80 0.00 0.05 0.20 REF 0.25 0.35 2.00 BSC 0.57 0.77 2.00 BSC 0.90 1.10 0.65 BSC 0.25 REF 0.20 0.30 0.15 REF 2.30 6X 6X 0.35 0.43 6X e L 1 4X 3 1 0.65 PITCH 2X E2 6X K 6 6X 4 b J BOTTOM VIEW 0.25 6X 0.10 C A 0.05 C B 2X 0.72 NOTE 3 1.05 DIMENSIONS: MILLIMETERS ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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