SANYO LA5663V

Ordering number : ENA0003A
Monolithic Linear IC
LA5663V
Phase Control Voltage Inverter
Control IC
Overview
The LA5663V is Phase Control Voltage Inverter Control IC.
Functions
• Phase control technique allows the voltage transformer to be driven at a frequency that provides excellent efficiency.
• The phase can be adjusted with an external resistor.
• Allows burst adjustment.
• Full complement of built-in protection circuits, including over-voltage protection and tube current detection and
protection.
• High-precision reference voltage system. VREM precision: ±1%
• The on/off state of the VREM circuit can be controlled independent.
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Power supply voltage
Maximum power drain allowed
Symbol
Conditions
Ratings
VCC
Pd max
Independent IC.
Unit
24
V
440
mW
Operating temperature range
Topr
-30 to 85
°C
Storage temperature range
Tstg
-55 to 150
°C
Operating Conditions at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
Input voltage
VCC
4.5 to 23
V
Oscillation frequency
fosc
40 to 500
kHz
Burst drive frequency
fPWM
50 to 1000
Hz
CL1
0 to 1000
pF
CL2
0 to 1000
pF
Output drive load capacity
Any and all SANYO Semiconductor products described or contained herein do not have specifications
that can handle applications that require extremely high levels of reliability, such as life-support systems,
aircraft's control systems, or other applications whose failure can be reasonably expected to result in
serious physical and/or material damage. Consult with your SANYO Semiconductor representative
nearest you before usingany SANYO Semiconductor products described or contained herein in such
applications.
SANYO Semiconductor assumes no responsibility for equipment failures that result from using products
at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor
products described or contained herein.
83006 / 53006 MS OT / O2505 MS OT B8-7864,B8-7468 No. A0003-1/15
LA5663V
Electrical Characteristics at Ta = 25°C, VCC = 15.0V
Parameter
Symbol
Ratings
Conditions
min
Current drain during standby
Current drain during operation
Regulator voltage
Regulator current
Vref
Reference voltage temperature coefficient
Reference voltage current
p-channel
"H" level
"L" level
Clamp level
11
14
3.395
3.5
3.605
0.23
-0.3
1.972
Iref = 0.1mA, Ta = 0 to 60°C
Iref
mA
8
Ireg = 0.5mA, Ta = 0 to 60°C
VCC = 4.5 to 23V, Iref = 0 to 0.1mA
µA
%
2
2
2.028
0.23
0
V
mA
V
%
0.2
mA
Voph1
Relative to VCC, load current of 0mA.
-0.4
V
Voph2
Relative to VCC, load current of 10mA.
-1.2
V
Vopl1
Relative to GND, load current of 0mA.
1.3
Vopl2
Relative to GND, load current of 10mA.
1.4
V
Vopc
Relative to VCC
-8
V
-12
-10
V
trp
CL = 500pF
150
ns
tf
tfp
CL = 500pF
200
ns
"H" level
"L" level
Clamp level
tr
tf
Burst drive duty
Vref (T)
5
tr
n-channel
output voltage
Vreg (T)
VCC = 4.5 to 23V, Ireg = 0 to 0.5mA
Ireg
Reference voltage
output voltage
Iop
VCC = 23V, DTC = 1.229V,
CL = 500pF
Unit
max
Ioff
Vreg
Regulator temperature coefficient
typ
Vonh1
Relative to VCC, load current of 0mA.
-1.5
V
Vonh2
Relative to VCC, load current of 10mA.
Vonl1
Relative to GND, load current of 0mA.
0.4
V
Vonl2
Relative to GND, load current of 10mA.
1.2
V
Vopc
Relative to VCC
trn
CL = 500pF
tfn
CL = 500pF
-2
8
V
10
12
V
650
ns
50
ns
BRIGHT_VR = 2.2V
Duty1
VCC = 4.5 to 23V
100
%
BRIGHT_VR = 1.847V
Duty2
VCC = 4.5 to 23V
86
90
94
%
BRIGHT_VR = 1.229V
Duty3
VCC = 4.5 to 23V
47
50
53
%
BRIGHT_VR = 0.618V
Duty4
VCC = 4.5 to 23V
7
10
13
%
VCC = 4.5 to 23V
0
%
BRIGHT_VR = 0.4V
Duty5
Burst drive duty
BRIGHT_VR = 2.2V
Duty1 (T)
Ta = 0 to 60°C
0
%
temperature
BRIGHT_VR = 1.847V
Duty2 (T)
Ta = 0 to 60°C
2
%
BRIGHT_VR = 1.229V
Duty3 (T)
Ta = 0 to 60°C
2
%
BRIGHT_VR = 0.618V
Duty4 (T)
Ta = 0 to 60°C
2
%
BRIGHT_VR = 0.4V
Duty5 (T)
Ta = 0 to 60°C
0
fosc1
capacity = ±1%
247
258
269
195
202
209
coefficient
Oscillation
fmax
%
kHz
frequency
fmin
fosc2
capacity = ±1%
Oscillation
fmax (T)
fosc1 (T)
Ta = 0 to 60°C
1.3
%
frequency
fmin (T)
fosc2 (T)
Ta = 0 to 60°C
1.3
%
kHz
temperature
coefficient
Burst drive frequency
fosc1
capacity = ±1%
Burst drive frequency temperature coefficient
fosc1
Ta = 0 to 60°C
Remote voltage
During operation
Vremon
Stopped
Vremoff
OP1 output
191
202
213
0.64
%
2
V
0.7
-VCON1
VCC = 22V
0.27
0.32
0.37
-VCON2
VCC = 7V
1.557
1.6
1.643
-VCON_SINK
-VCOM sink current
-VCON_SOUR
-VCOM source current
Hz
100
V
V
V
µA
10
µA
DTC-100% ON threshold voltage
V100
2.16
2.2
2.24
V
DTC-100% OFF threshold voltage
V0
0.392
0.4
0.408
V
0.7
1
1.5
s
0.23
0.26
0.29
V
SCP
Operation start time
Threshold voltage
tscp
SCP (DET_CR)
SCP capacity = 0.33µF
Continued on next page.
No.A0003-2/15
LA5663V
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Input pin
Input current of V_PHASE pin
Input current of BRIGHT_VR pin
Current of DTC
IVPHASE
-0.2
0.2
µA
IBRIGHT_VR
-0.2
0.2
µA
IVPHASE
-0.2
0.2
µA
Package Dimensions
unit: mm
3175C
7.8
0.5
5.6
13
7.6
24
12
1
0.15
0.65
0.1
(1.3)
0.22
1.5max
(0.33)
SANYO : SSOP24(275mil)
Pin Assignment
No.A0003-3/15
LA5663V
Block Diagram and Application Circuit Example
No.A0003-4/15
LA5663V
Pin Functions
Pin No.
1
Pin name
VREM
Function
Equivalent circuit
ON/OFF terminal of the IC.
2
SGND
Signal Ground terminal.
3
IFB
CCFL electric current waveform input
terminal.
4
DET_CR
Rectification (pulse way) waveform
of CCFL output terminal.
5
VLOOP_C
Error amplifier output terminal.
6
RECT_C
Phase difference output terminal
7
V_PHASE
Phase difference setup terminal
Continued on next page.
No.A0003-5/15
LA5663V
Continued from preceding page.
Pin No.
Pin name
8
FLOOP_C
9
C_PWM
Function
Equivalent circuit
VCO input terminal.
Capacitor terminal for the burst drive
frequency setup.
10
R_PWM
Resistance terminal for the burst
drive frequency setup.
11
BRIGHT_VR
12
OVP
Burst width set up terminal.
Detection input terminal of over
voltage protection circuit.
Continued on next page.
No.A0003-6/15
LA5663V
Continued from preceding page.
Pin No.
Pin name
Function
13
N_GATE1
NchMOS drive terminal.
14
N_GATE2
NchMOS drive terminal.
15
PGND
Power ground terminal.
16
P_GATE
PchMOS drive terminal.
17
VCC
Power supply terminal.
18
-VCON
Equivalent circuit
Output voltage is inversely
proportional to VCC.
19
SCP
Time constant of short protection
circuit setup terminal.
Continued on next page.
No.A0003-7/15
LA5663V
Continued from preceding page.
Pin No.
Pin name
20
DTC
21
C_OSC
Function
Equivalent circuit
Dead time setup terminal.
Capacitor terminal for the VCO
frequency setup.
22
R_OSC
Resistance terminal for the VCO
frequency setup.
23
VREF
Standard voltage output terminal.
24
VREG
Regulator voltage output terminal.
No.A0003-8/15
LA5663V
Functional Descriptions
(1) IFB and DET_CR pins
The IFB pin connects the CCFL current waveform detected by R10 to the Q4 base with bias VBE. The DET_CR pin
output level depends on both the Q4 base voltage less the VF component and the time constant determined by C4 and
R2. These connections rectify the AC CCFL current waveform (VAC) for input to the negative side of the ERROR
amplifier.
(2) VLOOP_C and PGATE pins
The PWM waveform output from the P_GATE pin is the result of the PWM1 amplifier comparing the VLOOP_C
voltage and the VOC triangular wave so that the rectified CCFL current waveform from the DET_CR pin has the same
potential (0.5V) as the positive side of the ERROR amplifier. This PWM control ensures that the CCFL current remains
constant.
No.A0003-9/15
LA5663V
(3) RECT_C pin
COMP1 rectifies the CCFL current waveform, plus bias VBE, from the IFB pin. ANDing this waveform voltage with
that from point A (this latter has the same phase as NGATE2) averages the two, producing phase difference voltage
output from the RECT_C pin.
(4) V_PHASE and FLOOP_C pins
COMP2 controls the VCO frequency so that the RECT_C and V_PHASE pins have the same voltage. The RECT_C
pin voltage represents a phase difference voltage, so changing the V_PHASE pin voltage adjusts the phase difference.
* The above graph is based on measurements for the IC in isolation. Actual phase difference adjustment requires
connection to the piezoelectric transformer.
No.A0003-10/15
LA5663V
(5) C_OSC and R_OSC pins
These inputs determine the VCO oscillation frequency. Use R_OSC to change the basic frequency.
(6) C_PWM, R_PWM, and BRIGHT_VR pins
These inputs determine the burst drive frequency. Use the BRIGHT_VR pin voltage to change the burst width and
R_PWM to change the burst drive frequency.
* The above graph is based on measurements for the independent IC.
No.A0003-11/15
LA5663V
(7) –VCON and DTC pins
The –VCON pin output voltage is inversely proportional to VCC. Using this output to create the DTC pin input voltage
specifies a maximum duty dependent on VCC. On the other hand, connecting this output to the V_PHASE pin input via
the resistances R14 and R15 specifies a phase setting dependent on VCC. (Eliminate resistances R14 and R15 if such a
VCC-dependent phase setting is not necessary.)
* The Specifications stipulate OP1 output electrical characteristics for the –VCON pin.
-VCON = VREF × (1 +
R2A
R2A
) - (VCC - Vsat) × (
)
R1A
R1A
No.A0003-12/15
LA5663V
(8) N_GATE1 and N_GATE2 pins
These pins drive the n-channel MOSFET. The frequency is 1/4 the VCO frequency.
(9) VREM pin
This input turns the IC on and off. Turning the IC off reduces the current drain to 5µA or less.
No.A0003-13/15
LA5663V
(10) OVP
This is the over-voltage detection terminal.
An OVP terminal gains a voltage that is divided by resistances. It works with threshold voltage 2V.
It becomes the condition of the table at the time of the movement.
Terminal
Condition
P_GATE
Hi
VLOOP_C
Low
FLOOP_C
Low
N_GATE1, 2
Drive
And once over-voltage protection works, it doesn't revert soon even if OVP is lower than 2V again.
It reverts after fixed time (the period of C_PWM) passes.
(11) SCP
CCFL electric current decrease by the CCFL opening and so on. And a charge begins in the condenser connected to
SCP when the voltage of DET_CR was less than 0.26V.
Latch is set when the voltage of the condenser is more than 2V. The voltage of each terminal at this time becomes a
table.
The charge of the condenser is stopped in the burst Duty again at the time of off period.
Terminal
Condition
P_GATE
Hi
VLOOP_C
Low
FLOOP_C
Low
N_GATE1, 2
Low
tscp = 3.03×106×C14×(100/burst duty) [S]
Example: tscp = 1 [S]
(At C14 = 0.33µF, burst duty = 100%)
No.A0003-14/15
LA5663V
(12) The polarity of the piezoelectric transformer
You must put logic with the transformer together, because a phase is controlled by comparing the common mode wave
shape of N_GATE2 with the common mode wave shape of CCFL electric current.
Connect a piezoelectric transformer so that each wave shape may become relations like a figure.
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performance, characteristics, and functions of the described products in the independent state, and are
not guarantees of the performance, characteristics, and functions of the described products as mounted
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independent device, the customer should always evaluate and test devices mounted in the customer's
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This catalog provides information as of May, 2006. Specifications and information herein are subject
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PS No.A0003-15/15