Ordering number : ENA0585 Bi-CMOS LSI LV5103LP Cell Phone Power Supply IC Overview The LV5103LP is a cell phone power supply IC. Functions • Single step-down DC-DC converter channel • Eight series regulator channels • Built-in thermal shutdown circuit Features • Low power dissipation • Built-in shorting protection circuit Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Allowable power dissipation Symbol Conditions Ratings VCC max Pd max Unit 6 Mounted on a circuit board.* 1100 V mW Operating temperature Topr -30 to +75 °C Storage temperature Tstg -40 to +125 °C * Specified circuit board : 40×50×0.8mm3 : 4-layer (2S2P) glass epoxy printed circuit board Operating Conditions at Ta = 25°C Parameter Supply voltage Symbol VCC Conditions Ratings Unit 3.2 to 4.5 V Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. 12407 MS PC 20061003-S00002 No.A0585-1/11 LV5103LP Electrical Characteristics Ta = 25°C, VBAT = 3.7V, VBATL = 2.4V, unless otherwise specified. Parameter Symbol Ratings Conditions min typ Unit max [Analog block] Current drain Current drain 1 ICC1 With LD01 and VBATDET operating Current drain 2 ICC2 With LD01, LD02. LD05, LD06, LD07, and 8 16 µA 50 75 µA 6 10 mA 2.4 2.55 LD08 operating. PS mode Current drain 3 ICC3 With all LD0n channels operating, DC-DC operation [Switching Regulator Block] DC/DC1 Output voltage 1 Output current Efficiency 1 Efficiency 2 Oscillator frequency VOSW1 IO = 500mA ISW1 2.25 800 EF1 IO = 150mA EF2 IO = 500mA Fosc1 V mA 86 % 79 % 1 1.2 1.4 MHz 1.47 1.5 1.53 V LDO1 Output voltage VOR1 IO = 10mA Output current IM1 Load regulation VL1 IO = 1 to 30mA 30 10 75 mA mV Line regulation VR1 VBAT = 3.1 to 4.5V, IO = 20mA 10 60 mV Output voltage temperature ∆VT1 Ta = -30 to 75°C, IO = 10mA Ripple rejection ratio VRL1 IO = 10mA, VRR = -20dBV, fRR = 120Hz 65 dB Output noise voltage VON1 IO = 10mA, 10Hz < f < 100kHz 60 µVrms VOR2 IO = 30mA ±100 ppm/°C coefficient LDO2 Output voltage 2.79 2.85 2.91 200 V Output current IM2 Load regulation VL2 IO = 1 to 200mA 20 75 mA mV Line regulation VR2 VBAT = 3.1 to 4.5V, IO = 130mA 10 60 mV Output voltage temperature ∆VT2 Ta = -30 to 75°C, IO = 30mA ±100 ppm/°C coefficient Ripple rejection ratio VRL2 IO = 30mA, VRR = -20dBV, fRR = 120Hz 65 dB Output noise voltage VON2 IO = 30mA, 10Hz < f < 100kHz 50 µVrms LDO2 PS MODE Output voltage VOR2P Output current IM2P IO = 30mA 2.76 2.85 2.94 200 V mA Load regulation VL2P IO = 1 to 200mA 20 75 mV Line regulation VR2P VBAT = 3.1 to 4.5V, IO = 130mA 10 60 mV Output voltage temperature ∆VT2P Ta = -30 to 75°C, IO = 30mA Ripple rejection ratio VRL2P IO = 30mA, VRR = -20dBV, fRR = 120Hz 60 dB Output noise voltage VON2P IO = 30mA, 10Hz < f < 100kHz 60 µVrms ±100 ppm/°C coefficient LDO3 Output voltage VOR3 Output current IM3 IO = 30mA 2.79 2.85 2.91 150 V mA Load regulation VL3 IO = 1 to 150mA 20 75 mV Line regulation VR3 VBAT = 3.1 to 4.5V, IO = 100mA 10 60 mV Output voltage temperature ∆VT3 Ta = -30 to 75°C, IO = 30mA ±100 ppm/°C coefficient Ripple rejection ratio VRL3 IO = 30mA, VRR = -20dBV, fRR = 120Hz 65 dB Output noise voltage VON3 IO = 30mA, 10Hz < f < 100kHz 50 µVrms 1.5 2.5 Ω 0 3 µA LDO3B SW Switch on-resistance RSW3 IO = 50mA, SWCTL : HIGH Switch leakage current ISW3 SWCTL : LOW Continued on next page. No.A0585-2/11 LV5103LP Continued from preceding page. Parameter Symbol Ratings Conditions min typ Unit max LDO4 Output voltage 1 VOR41 IO = 30mA Output voltage 2 VOR42 IO = 200mA Output current 1 IM41 Output current 2 IM42 VBAT = 3.4V, VOUT ≥ 3V Load regulation 1 VL4 IO = 1 to 300mA Load regulation 2 VL4L Line regulation 1 VR4 Output voltage temperature ∆VT4 Ta = -30 to 75°C, IO = 30mA 3.03 3.1 3.17 V 3 3.1 3.2 V 450 mA 300 mA 30 100 VBAT = 3.4V, IO = 1 to 250mA 50 100 mV VBAT = 3.4 to 4.5V, IO = 200mA 10 60 mV ±100 mV ppm/°C coefficient Ripple rejection ratio VRL4 IO = 30mA, VRR = -20dBV, fRR = 120Hz 65 dB Output noise voltage VON4 IO = 30mA, 10Hz < f < 100kHz 50 µVrms Output voltage VOR5 IO = 30mA Output current 1 IM51 Output current 2 IM52 VBAT = 3.4V, VOUT ≥ 3V Load regulation 1 VL5 IO = 1 to 150mA 75 150 mV Load regulation 2 VL5L VBAT = 3.4V, IO = 1 to 50mA 75 150 mV Line regulation 1 VR5 VBAT = 3.4 to 4.5V, IO = 100mA 10 60 mV Output voltage temperature ∆VT5 Ta = -30 to 75°C, IO = 30mA Ripple rejection ratio VRL5 IO = 30mA, VRR = -20dBV, fRR = 120Hz 65 dB Output noise voltage VON5 IO = 30mA, 10Hz < f < 100kHz 50 µVrms LDO5 3.23 3.3 3.37 V 150 mA 150 mA ±100 ppm/°C coefficient LDO5 PS MODE Output voltage VOR5P Output current IM5P IO = 30mA 3.2 3.3 3.4 150 V mA Load regulation 1 VL5P1 IO = 1 to 150mA 75 150 mV Load regulation 2 VL5P2 VBAT = 3.4V, IO = 1 to 50mA 75 150 mV Line regulation 1 VR5P VBAT = 3.4 to 4.5V, IO = 100mA 10 60 mV Output voltage temperature ∆VT5P Ta = -30 to 75°C, IO = 30mA Ripple rejection ratio VRL5P IO = 30mA, VRR = -20dBV, fRR = 120Hz 60 dB Output noise voltage VON5P IO = 30mA, 10Hz < f < 100kHz 60 µVrms ±100 ppm/°C coefficient LDO6 Output voltage VOR6 IO = 30mA 1.47 1.5 1.53 200 V Output current IM6 Load regulation VL6 IO = 1 to 200mA 20 75 mA mV Line regulation 1 VR6 VBAT = 3.1 to 4.5V, IO = 130mA 10 60 mV Output voltage temperature ∆VT6 Ta = -30 to 75°C, IO = 30mA ±100 ppm/°C coefficient Ripple rejection ratio VRL6 IO = 30mA, VRR = -20dBV, fRR = 120Hz 65 dB Output noise voltage VON6 IO = 30mA, 10Hz < f < 100kHz 50 µVrms LDO6 PS MODE Output voltage VOR6P Output current IM6P IO = 30mA 1.45 1.5 1.55 10 V mA Load regulation VL6P IO = 1 to 10mA 10 75 mV Line regulation 1 VR6P VBAT = 3.1 to 4.5V, IO = 10mA 10 60 mV Output voltage temperature ∆VT6P Ta = -30 to 75°C, IO = 30mA Ripple rejection ratio VRL6P IO = 30mA, VRR = -20dBV, fRR = 120Hz 60 dB Output noise voltage VON6P IO = 30mA, 10Hz < f < 100kHz 60 µVrms ±100 ppm/°C coefficient Continued on next page. No.A0585-3/11 LV5103LP Continued from preceding page. Parameter Symbol Ratings Conditions min typ Unit max LDO7 Output voltage VOR7 Output current IM7 IO = 30mA 1.76 1.8 1.84 150 V mA Load regulation VL7 IO = 1 to 150mA 75 150 mV Line regulation 1 VR7 VBAT = 3.1 to 4.5V, IO = 100mA 10 60 mV Output voltage temperature ∆VT7 Ta = -30 to 75°C, IO = 30mA ±100 ppm/°C coefficient Ripple rejection ratio VRL7 IO = 30mA, VRR = -20dBV, fRR = 120Hz 65 dB Output noise voltage VON7 IO = 30mA, 10Hz < f < 100kHz 50 µVrms LDO7 PS MODE Output voltage VOR7P Output current IM7P Load regulation VL7P IO = 30mA 1.74 1.8 1.86 10 IO = 1 to 10mA V mA 75 150 10 60 mV Line regulation 1 VR7P VBAT = 3.1 to 4.5V, IO = 10mA Output voltage temperature ∆VT7P Ta = -30 to 75°C, IO = 30mA Ripple rejection ratio VRL7P IO = 30mA, VRR = -20dBV, fRR = 120Hz 60 dB Output noise voltage VON7P IO = 30mA, 10Hz < f < 100kHz 60 µVrms Output voltage 1 VOR81 IO = 30mA 1.17 1.2 1.23 V Output voltage 2 VOR82 IO = 200mA 1.13 1.2 1.27 V Output current 1 IM81 Output current 2 IM82 VBAT = 3.4V, VOUT ≥ 1.1V Load regulation VL8 IO = 1 to 500mA 30 70 mV Line regulation 1 VR8 VBAT = 3.1 to 4.5V, IO = 330mA 10 60 mV Output voltage temperature ∆VT8 Ta = -30 to 75°C, IO = 30mA ±100 mV ppm/°C coefficient LDO8 500 mA 500 mA ±100 ppm/°C coefficient Ripple rejection ratio VRL8 IO = 30mA, VRR = -20dBV, fRR = 120Hz 65 dB Output noise voltage VON8 IO = 30mA, 10Hz < f < 100kHz 50 µVrms LDO8 PS MODE Output voltage VOR8P Output current IM8P IO = 30mA 1.16 1.2 1.24 10 V mA Load regulation VL8P IO = 1 to 10mA 30 100 mV Line regulation 1 VR8P VBAT = 3.1 to 4.5V, IO = 10mA 10 60 mV Output voltage temperature ∆VT8P Ta = -30 to 75°C, IO = 30mA Ripple rejection ratio VRL8P IO = 30mA, VRR = -20dBV, fRR = 120Hz 60 dB Output noise voltage VON8P IO = 30mA, 10Hz < f < 100kHz 60 µVrms ±100 ppm/°C coefficient DET24 Low-level detection voltage VDL1 2.35 2.4 2.45 V High-level detection voltage VDH1 2.62 2.7 2.78 V Low-level detection voltage VDL2 2.3 2.4 2.5 V High-level detection voltage VDH2 3.1 3.2 3.3 V 300 400 Ω 0 1 µA 1.5 VBAT V 0 0.3 V VBATDET BVLT Switch BVLT switch on-resistance RSWBV IO = 3mA, BVLTON : HIGH BVLT switch leakage current ISWBV BVLTON : LOW Control Pins High level 1 VH1 RFPDN, ADPTDETIN, PWRHOLD, POWERSAVE, SWCTL, BVLTON, STCLR Low level 1 VL1 RFPDN, ADPTDETIN, PWRHOLD, POWERSAVE, SWCTL, BVLTON, STCLR High level 2 VH2 PWRKEY VBAT×0.8 VBAT V Low level 2 VL2 PWRKEY 0 VBAT×0.2 V No.A0585-4/11 LV5103LP Package Dimensions Top View Bottom View 0.35 5.0 30 21 20 (0.7) 0.4 5.0 0.35 31 40 11 10 1 0.85MAX 0.2 (0.7) Allowable power dissipation, Pd max – mW unit : mm (typ) 3302A 1500 1100 Pd max – Ta Specified board : 40×50×0.8mm3, 4-layer (2S2P) printed circuit board glass epoxy Mounted on the circuit board 1000 550 500 0 – 30 0 30 60 90 0.05 0 NOM Ambient temperature, Ta – °C SANYO : VQLP40(5.0X5.0) Control Pin Functions Power Supply Control RFPDN ADPTDET PWRKEY PWRHOLD Low Low Low Low Low High Low Low Low High High High Low LDO3, 4 Off On Off On Off On On Off High On On Off Low On Off Off On On On On On On On On On (ON/OFF1) (ON/OFF2) High High LDO2, 5, 6, 7, 8 On High High LDO1 High PS Mode PWRSAVE Mode Low PS mode High Normal mode LDO3 Output Switch SWCTL Mode Low Switch off High Switch on BVLT Output BVLTON Mode Low Switch off High Switch on No.A0585-5/11 LV5103LP LDO2O VBAT1 LDO3O LDO3S LDO3B SWCTL LDO1O LDO4S LDO4O VBAT2 Pin Assignment 30 29 28 27 26 25 24 23 22 21 LDO2S 31 20 LDO5O DELAY 32 19 RFPDN RESETO 33 18 PWRKEY BVLT 34 17 PKEYDET GNDSWREG 35 16 PWRHOLD BVLTON 36 15 BGR PWRSAVE 37 14 RREF PGND 38 13 GNDM ADPTDETIN 39 12 FBIN SWOUT 40 11 VBATL7 1 2 3 4 5 6 7 8 9 10 STCLR VBAT3 VBATL8 LDO8O LDO8S STATUS LDO6S LDO6O VBATL6 LDO7O LV5103LP No.A0585-6/11 LV5103LP VBAT1 VBAT1 VBAT1 LDO2 RFPDN PWRSAVE PWRHOLD PWRKEY PKEYDET STATUS ADPTDETIN Block Diagram VBAT1 RESETO VBAT1 PS D Q C VBATDET ↑3.2V ↓2.4V Q R VBAT1 VBAT1 LDO1 1.5V 30mA STCLR ON/OFF_2 VBATL8 LDO8S LDO8O 2.2µF ON/OFF_1 2.2µF PS ON/OFF_1 DELAY DET 2.4V RESETO 40kΩ 10µF 4.7µH VBAT3 SWOUT1 PGND LDO3 2.85V/ 150mA ON/OFF_2 ON/OFF_1 LDO2S LDO3O LDO3S SWCTL ON/OFF_1 85kΩ LDO2O 2.2µF 1µA 10µF FBIN LDO2 2.85V/ 200mA VBAT1 0.01µF 2.2µF LDO1O ON/OFF_1 PS LDO8 1.2V/ 500mA VBAT1 DC/DC1 2.4V/ 800mA LDO3B PS ON/OFF_2 LDO4 3.1V/ 450mA VBAT2 2.2µF LDO4O LDO4S GNDSWREG 2.2µF VBATL6 LDO6O VBAT3 PS ON/OFF_1 LDO6 1.5V/ 200mA PS ON/OFF_1 LDO5 3.3V/ 150mA 2.2µF LDO5O VBAT1 LDO6S BVLTON BVLT VBATL7 2.2µF LDO7O LDO7 1.8V/ 150mA ON/OFF_1 PS GNDM 0.1µF RREF 0.1µF BGR The three power supply pins VBAT1, VBAT2, and VBAT3 must be shorted together externally. The three ground pins GNDM, PGND, and GNDSWREG must be shorted together externally and must always be at a potential that is the lowest potential in the system. No.A0585-7/11 LV5103LP Equivalent Circuit Block Diagram Pin No. Pin 1 STCLR 16 PWRHOLD 19 RFPDN 37 PWRSAVE 39 ADPTDETIN Functions Equivalent Circuit Input pins VBAT1 1MΩ Corresponding pin 18kΩ GNDM 29 VBAT1 21 VBAT2 2 VBAT3 Power supply pins VBAT* GNDM 3 VBATL8 VBATL pins 9 VBATL6 The M1 transistor is only present in the 11 VBATL7 VBATL8 circuit. VBAT3 VBAT1 M1 VBATL* GNDM 4 LDO8O LDO output pins 5 LDO8S The LDO*O pins for LDO1, LDO5, and 7 LDO6S LDO7 are shorted internally in the IC to the corresponding LDO*S pin. 8 LDO6O 10 LDO7O 20 LDO5O 22 LDO4O 23 LDO4S 24 LDO1O 27 LDO3S 28 LDO3O 30 LDO2O 31 LDO2S 6 STATUS VBAT* LDO*O LDO*S GNDM STATUS pin VBAT1 STATUS GNDM Continued on next page. No.A0585-8/11 LV5103LP Continued from preceding page. Pin No. 12 Pin FBIN Functions Equivalent Circuit Feedback resistor connection for the FBIN switching regulator block 85kΩ 40kΩ GNDSWREG 14 RREF RREF reference voltage VBAT1 RREF 4.8MΩ 4.8MΩ GNDM 15 BGR BGR reference voltage RREF 1kΩ 10kΩ BGR GNDM 17 RKEYDET PKEYDET pin VBAT1 LDO2S 100kΩ 200Ω PKEYDET GNDM 18 PWRKEY PWRKEY pin VBAT1 PWRKEY 18kΩ GNDM Continued on next page. No.A0585-9/11 LV5103LP Continued from preceding page. Pin No. Pin Functions 25 SWCTL SWCTL pin 26 LDO3B LDO3B pin Equivalent Circuit LDO3O VBAT1 500kΩ 18kΩ SWCTL LDO3B GNDM 32 DELAY DELAY pin VBAT1 1kΩ 18kΩ DELAY 200Ω 33 RESET RESET pin VBAT1 200Ω RESET GNDM 34 BVLT 36 BVLTON BVLT and BVLTON pins VBAT1 1MΩ 18kΩ BVLT BVLTON 200Ω GNDM 40 SWOUT SWREG output block VBAT3 VBAT1 1kΩ PGND SWOUT GNDM No.A0585-10/11 LV5103LP Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. 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Specifications and information herein are subject to change without notice. PS No.A0585-11/11