E8404A 100-500MHz Dual Channel, Digitally Programmed Pin Electronics Solution PRELIMINARY Features TEST AND MEASUREMENT PRODUCTS Description The E8404A has a Driver and Window Comparator receiver and commutating Load Circuit for each channel with performance settings to save power or maximize bandwidth. Two Fully Integrated Pin Channels including: - 16-bit DACs for each level - Tri-level Driver - Window Receiver - 4mA/40mA Ranged Active Commutating Load - Waveform Clamps Driver, Comparator and Load maximum 8V span over -2 to +7V range • Configurable Output Protection • 50MHz Serial Bus Programming - SPI™/QSPI™/ MICROWIRE™ - Daisy-chainable • Power Dissipation ~0.9W/Channel (quiescent, Low Perf, I/O mode) ~1.0W/Channel (quiescent, High Perf, I/O mode) • Pin and Software Compatible to E8400, E8405, E8410, E8415 • Digitally Programmable Performance/Power • Differential Drive and Receive Functionality • Optimal Small Swing Performance • Small 11mm x 11mm Package • • All level’s DACs for the Driver, Receiver and Load are on-chip and are programmed via a high speed serial bus. Each of the level’s DACs have offset and gain registers for on-chip calibrations. The Driver circuit is capable of forcing two levels to the DUT (DVH and DVL) as well as a third voltage for a termination level (DVT) to terminate high-speed DUT signals to the Comparator receivers into a high quality 50Ω load. The Driver can also be configured to a high impedance (HiZ) state for an open termination of DUT signals. Waveform clamps are also available to clip the input signals from a DUT when not using the Driver as a termination. The clamps prevent reflections from returning to the DUT transmission line which can create timing errors and false triggering. All of the on-chip DAC levels and configuration registers for each channel may be programmed via SET commands. This PinCast method of programming allows all channels in a system to be programmed concurrently with a simple set command whereby any pin channel that had been assigned to that set will respond. Functional Block Diagram CAL_S[0] DC BUSY* CS* CLK SDIN SDOUT RESET* INT* SLEEP* TEST_MODE The two driver circuits may be placed into a differential drive mode. This reduces driver-to-driver skews to levels difficult to achieve by external deskewing. The two window comparators may also be placed into a differential receive mode. These features enable higher quality testing of differential signals to/from the DUT. C O N T R O L ISK DUTIO_S[0] VCM ISC DVH DVT DHI* DHI DEN DEN* DUTIO_F[0] VCH DVL VCC VCL QA* CH 0 A QA QB QB* VAA CVA VDD VEE B GND CVB REF_IN_HI ANODE_S ANODE_F REF_IN_LO QB* Applications • • • • • RREF1[0] CVB QB B QA A QA* CH 1 RREF2[0] RREF1[1] CVA VCH Logic Testers Mixed-Signal Test Equipment Memory Testers Flash Memory Testers ASIC Verifiers DHI* DVL RREF2[1] VCL DUTIO_F[1] DHI DEN DEN* DVH DVT ISK VCM DUTIO_S[1] GND_SNS ISC SPI and QSPI and trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. Revision 3, November 2, 2007 CAL_S[1] www.semtech.com