SPANSION S71GL032NA0BFW0Z0

S71GL-N Based MCPs
Stacked Multi-Chip Product (MCP)
Flash Memory and RAM
64/32 Megabit (4/2 M x 16-bit) CMOS 3.0 Volt-only
Page Mode Flash Memory and
32/16/8/4 Megabit (2M/1M/512k/256k x 16-bit) Pseudo Static RAM
S71GL-N Based MCPs Cover Sheet
Data Sheet (Advance Information)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Each product described herein may be designated as Advance Information,
Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions.
Publication Number S71GL-N_00
Revision 02
Issue Date June 19, 2007
Data
Sheet
(Advan ce
Infor m a tio n)
Notice On Data Sheet Designations
Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of
product information or intended specifications throughout the product life cycle, including development,
qualification, initial production, and full production. In all cases, however, readers are encouraged to verify
that they have the latest information before finalizing their design. The following descriptions of Spansion data
sheet designations are presented here to highlight their presence and definitions.
Advance Information
The Advance Information designation indicates that Spansion Inc. is developing one or more specific
products, but has not committed any design to production. Information presented in a document with this
designation is likely to change, and in some cases, development on the product may discontinue. Spansion
Inc. therefore places the following conditions upon Advance Information content:
“This document contains information on one or more products under development at Spansion Inc.
The information is intended to help you evaluate this product. Do not design in this product without
contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed
product without notice.”
Preliminary
The Preliminary designation indicates that the product development has progressed such that a commitment
to production has taken place. This designation covers several aspects of the product life cycle, including
product qualification, initial production, and the subsequent phases in the manufacturing process that occur
before full production is achieved. Changes to the technical specifications presented in a Preliminary
document should be expected while keeping these aspects of production under consideration. Spansion
places the following conditions upon Preliminary content:
“This document states the current technical specifications regarding the Spansion product(s)
described herein. The Preliminary status of this document indicates that product qualification has been
completed, and that initial production has begun. Due to the phases of the manufacturing process that
require maintaining efficiency and quality, this document may be revised by subsequent versions or
modifications due to changes in technical specifications.”
Combination
Some data sheets contain a combination of products with different designations (Advance Information,
Preliminary, or Full Production). This type of document distinguishes these products and their designations
wherever necessary, typically on the first page, the ordering information page, and pages with the DC
Characteristics table and the AC Erase and Program table (in the table notes). The disclaimer on the first
page refers the reader to the notice on this page.
Full Production (No Designation on Document)
When a product has been in production for a period of time such that no changes or only nominal changes
are expected, the Preliminary designation is removed from the data sheet. Nominal changes may include
those affecting the number of ordering part numbers available, such as the addition or deletion of a speed
option, temperature range, package type, or VIO range. Changes may also include those needed to clarify a
description or to correct a typographical error or incorrect specification. Spansion Inc. applies the following
conditions to documents in this category:
“This document states the current technical specifications regarding the Spansion product(s)
described herein. Spansion Inc. deems the products to have been in sufficient production volume such
that subsequent versions of this document are not expected to change. However, typographical or
specification corrections, or modifications to the valid combinations offered may occur.”
Questions regarding these document designations may be directed to your local sales office.
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S71GL-N Based MCPs
S71GL-N_00_02 June 19, 2007
S71GL-N Based MCPs
Stacked Multi-Chip Product (MCP)
Flash Memory and RAM
64/32 Megabit (4/2 M x 16-bit) CMOS 3.0 Volt-only
Page Mode Flash Memory and
32/16/8/4 Megabit (2M/1M/512k/256k x 16-bit) Pseudo Static RAM
Data Sheet (Advance Information)
Distinctive Characteristics
„ Packages
MCP Features
– 7 x 9 x 1.2 mm 56 ball FBGA (TLC056)
„ Power supply voltage of 2.7 to 3.1 volt
„ Operating Temperature
„ High performance
– –25°C to +85°C
– 90 ns access time (90 ns Flash, 70 ns pSRAM/SRAM)
– 25 ns page read times
General Description
The S71GL-N product series consists of S29GL-N Flash memory with pSRAM combinations defined as:
Flash Memory Density
32 Mb
pSRAM Density
4 Mb
S71GL032N40
8 Mb
S71GL032N80
16 Mb
S71GL032NA0
64 Mb
S71GL064NA0
32 Mb
S71GL064NB0
For detailed specifications, please refer to the individual data sheets.
Document
Publication Identification Number (PID)
S29GL-N
S29GL-N_00
4 Mb pSRAM Type 9
pSRAM_33
8 Mb pSRAM Type 9
pSRAM_34
16 Mb pSRAM Type 7
pSRAM_13
32 Mb pSRAM Type 8
pSRAM_31
Publication Number S71GL-N_00
Revision 02
Issue Date June 19, 2007
This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.
Data
1.
Product Selector Guide
1.1
64 Mb Flash Memory
Device-Model# (Note)
Sheet
Flash Access time
(ns)
(Advan ce
(p)SRAM
density
Infor m a tio n)
(p)SRAM Access time
(ns)
(p)SRAM type Package
S71GL032N40-0K
4 Mb
S71GL032N40-0P
pSRAM 9
S71GL032N80-0K
8 Mb
S71GL032N80-0P
S71GL032NA0-0U
90
70
TLC056
S71GL032NA0-0Z
S71GL064NA0-0U
16 Mb
pSRAM7
32 Mb
pSRAM 8
S71GL064NA0-0Z
S71GL064NB0-0U
S71GL064NB0-0Z
Note
Please see the valid combinations table for the model# description.
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In for m ation)
2. MCP Block Diagram
VCCf
VCC
CE1#f
WP#/ACC
RESET#
Flash-only Address
Flash
Shared Address
OE#
WE#
VSS
RY/BY#
VCCS
DQ15 to DQ0
VCC
pSRAM
IO15-IO0
CE1#s
CE#
UB#
UB#
LB#
LB#
CE2s
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S71GL-N Based MCPs
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Data
Sheet
(Advan ce
Infor m a tio n)
3. Connection Diagram
56-ball Fine-Pitch Ball Grid Array
(Top View, Balls Facing Down)
A2
A3
A4
A5
A6
A7
A7
LB#
WP/ACC
WE#
A8
A11
Legend
B1
B2
B3
B4
B5
B6
B7
B8
A3
A6
UB#
RST#f
CE2s
A19
A12
A15
C1
C2
C3
C4
C5
C6
C7
C8
RY/BY#
A20
A2
A5
A18
A9
A13
A21
D1
D2
D3
D6
D7
D8
A1
A4
A17
A10
A14
RFU
E1
E2
E3
E6
E7
E8
A0
VSS
DQ1
DQ6
RFU
A16
F1
F2
F3
F4
F5
F6
F7
F8
CE1#f
OE#
DQ9
DQ3
DQ4
DQ13
DQ15
RFU
G1
G2
G3
G4
G5
G6
G7
G8
CE1#s
DQ0
DQ10
VCCf
VCCs
DQ12
DQ7
VSS
H2
H3
H4
H5
H6
H7
DQ8
DQ2
DQ11
RFU
DQ5
DQ14
Shared
(Note 1)
Flash only
RAM only
Reserved for
Future Use
Note
May be shared depending on density.
3.1
MCP
Flash-only Addresses
Shared Addresses
S71GL032NA0
A20
A19-A0
S71GL032N80
A20-A19
A18-A0
S71GL032N40
A20-A18
A17-A0
S71GL064NB0
A21
A20-A0
S71GL064NA0
A21-A20
A19-A0
Special Handling Instructions For FBGA Package
Special handling is required for Flash Memory products in FBGA packages.
Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The
package and/or data integrity may be compromised if the package body is exposed to temperatures above
150°C for prolonged periods of time.
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S71GL-N Based MCPs
S71GL-N_00_02 June 19, 2007
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4.
S hee t
(Adva nce
In for m ation)
Pin Description
Pin
A21–A0
DQ15–DQ0
Description
22 Address Inputs (Common and Flash only) (A20-A0 for the S71GL032N)
16 Data Inputs/Outputs (Common)
CE1#f
Chip Enable (Flash)
CE1#s
Chip Enable 1 (pSRAM/SRAM)
CE2s
Chip Enable 2 (pSRAM/SRAM)
OE#
Output Enable (Common)
WE#
Write Enable (Common)
RY/BY#
Ready/Busy Output (Flash 1)
UB#
Upper Byte Control (pSRAM/SRAM)
LB#
Lower Byte Control (pSRAM/SRAM)
RESET#
WP#/ACC
Hardware Reset Pin, Active Low (Flash)
Hardware Write Protect/Acceleration Pin (Flash)
VCCf
Flash 3.0 volt-only single power supply (see Product Selector Guide for speed options and voltage
supply tolerances)
VCCS
pSRAM/SRAM Power Supply
VSS
Device Ground (Common)
NC
Pin Not Connected Internally
June 19, 2007 S71GL-N_00_02
S71GL-N Based MCPs
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Data
5.
Sheet
(Advan ce
Infor m a tio n)
Ordering Information
The order number is formed by a valid combinations of the following:
S71GL
064
N
A0
BF
W
0
Z
0
PACKING TYPE
0 = Tray
2 = 7” Tape and Reel
3 = 13” Tape and Reel
MODEL NUMBER
See the Valid Combinations table.
PACKAGE MODIFIER
0 = 7 x 9 mm, 1.2 mm height, 56 balls (TLC056)
TEMPERATURE RANGE
W = Wireless (-25°C to +85°C)
PACKAGE TYPE
BF = Fine-pitch BGA Lead (Pb)-free package
pSRAM / SRAM DENSITY
B0 = 32 Mb pSRAM
A0 = 16 Mb pSRAM
40 = 4 Mb pSRAM
80 = 8 Mb pSRAM
PROCESS TECHNOLOGY
N = 110 nm, MirrorBit Technology
FLASH DENSITY
064 = 64Mb
032 = 32Mb
PRODUCT FAMILY
S71GL Multi-chip Product (MCP)
3.0-volt Page Mode Flash Memory and RAM
Table 5.1 Valid Combinations
S71GL064N Valid Combinations
Base Ordering
Part Number
Package &
Temperature
Package Modifier/Model
Number
Packing Type
Speed Options (ns)/Boot
Sector Option
0K
90 / Bottom Boot Sector
0P
90 / Top Boot Sector
0K
90 / Bottom Boot Sector
0P
90 / Top Boot Sector
S71GL032N40
Package
Marking
pSRAM9 / 70
S71GL032N80
pSRAM9 / 70
0U
S71GL032NA0
(p)SRAM Type/
Access Time
(ns)
BFW
90 / Bottom Boot Sector
0, 2, 3 (1)
pSRAM7 / 70
0Z
90 / Top Boot Sector
S71GL064NA0
0U
90 / Bottom Boot Sector
S71GL064NA0
0Z
90 / Top Boot Sector
S71GL064NB0
0U
90 / Bottom Boot Sector
S71GL064NB0
0Z
90 / Top Boot Sector
TLC056
pSRAM7 / 70
pSRAM8 / 70
Note
1. Type 0 is standard. Specify other options as required.
Valid Combinations
Valid Combinations list configurations planned to be supported in volume for this device. Consult your local
sales office to confirm availability of specific valid combinations and to check on newly released
combinations.
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S71GL-N Based MCPs
S71GL-N_00_02 June 19, 2007
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6. Physical Dimensions
6.1
TLC056—56-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 7 mm Package
D1
A
D
eD
0.15 C
(2X)
8
7
SE
6
7
5
E
E1
4
3
eE
2
1
H
INDEX MARK
PIN A1
CORNER
B
10
TOP VIEW
G
F
E
D
C B
A
7
SD
0.15 C
(2X)
PIN A1
CORNER
BOTTOM VIEW
0.20 C
A A2
A1
C
56X
0.08 C
SIDE VIEW
6
b
0.15 M C A B
0.08 M C
NOTES:
PACKAGE
TLC 056
JEDEC
N/A
DxE
9.00 mm x 7.00 mm
PACKAGE
SYMBOL
MIN
NOM
MAX
A
---
---
1.20
A1
0.20
---
---
A2
0.81
---
0.97
NOTE
PROFILE
BODY SIZE
7.00 BSC.
BODY SIZE
D1
5.60 BSC.
MATRIX FOOTPRINT
E1
5.60 BSC.
MATRIX FOOTPRINT
MD
8
MATRIX SIZE D DIRECTION
ME
8
MATRIX SIZE E DIRECTION
56
0.40
ALL DIMENSIONS ARE IN MILLIMETERS.
3.
BALL POSITION DESIGNATION PER JESD 95-1, SPP-010.
4.
e REPRESENTS THE SOLDER BALL GRID PITCH.
5.
SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D"
DIRECTION.
SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE
"E" DIRECTION.
9.00 BSC.
0.35
2.
BALL HEIGHT
E
n
DIMENSIONING AND TOLERANCING METHODS PER
ASME Y14.5M-1994.
BODY THICKNESS
D
φb
1.
n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS
FOR MATRIX SIZE MD X ME.
6
DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL
DIAMETER IN A PLANE PARALLEL TO DATUM C.
7
SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A
AND B AND DEFINE THE POSITION OF THE CENTER SOLDER
BALL IN THE OUTER ROW.
BALL COUNT
0.45
WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE
OUTER ROW SD OR SE = 0.000.
BALL DIAMETER
WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE
OUTER ROW, SD OR SE = e/2
eE
0.80 BSC.
BALL PITCH
eD
0.80 BSC
BALL PITCH
SD / SE
0.40 BSC.
SOLDER BALL PLACEMENT
A1,A8,D4,D5,E4,E5,H1,H8
DEPOPULATED SOLDER BALLS
8.
"+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED
BALLS.
9.
N/A
10 A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK
MARK, METALLIZED MARK INDENTATION OR OTHER MEANS.
3348 \ 16-038.22a
June 19, 2007 S71GL-N_00_02
S71GL-N Based MCPs
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Data
Sheet
(Advan ce
Infor m a tio n)
7. Revision History
Section
Description
Revision 01 (May 14, 2007)
Initial release.
Revision 02 (June 19, 2007)
Global
10
Editorial changes to valid combinations table
S71GL-N Based MCPs
S71GL-N_00_02 June 19, 2007
D at a
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(Adva nce
In for m ation)
Colophon
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as
contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the
public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility,
aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for
any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to
you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor
devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design
measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal
operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under
the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country,
the prior authorization by the respective government entity will be required for export of those products.
Trademarks and Notice
The contents of this document are subject to change without notice. This document may contain information on a Spansion product under
development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this
document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose,
merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any
damages of any kind arising out of the use of the information in this document.
Copyright © 2007 Spansion Inc. All rights reserved. Spansion®, the Spansion Logo, MirrorBit®, MirrorBit® Eclipse™, ORNAND™, HD-SIM™ and
combinations thereof, are trademarks of Spansion LLC in the US and other countries. Other names used are for informational purposes only
and may be trademarks of their respective owners.
June 19, 2007 S71GL-N_00_02
S71GL-N Based MCPs
11