74ALVCH16244 LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED : tPD = 3.0 ns (MAX.) at VCC = 3.0 to 3.6V tPD = 3.7 ns (MAX.) at VCC = 2.3 to 2.7V tPD = 5.1 ns (MAX.) at VCC = 1.65V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3.0V |IOH| = IOL = 12mA (MIN) at VCC = 2.3V |IOH| = IOL = 4mA (MIN) at VCC = 1.65V OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 3.6V BUS HOLD PROVIDED ON DATA INPUTS PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16244 LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V TSSOP ORDER CODES PACKAGE TSSOP TUBE T&R 74ALVCH16244TTR PIN CONNECTION DESCRIPTION The 74ALVCH16244 is a low voltage CMOS 16 BIT BUS BUFFER (NON INVERTED) fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs. Any nG output control governs four BUS BUFFERS. Output Enable input (nG) tied together gives full 16-bit operation. When nG is LOW, the outputs are enabled. When nG is HIGH, the output are in high impedance state. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. This device is designed to be used with 3 state memory address drivers, etc. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. February 2003 1/10 74ALVCH16244 INPUT AND OUTPUT EQUIVALENT CIRCUIT IEC LOGIC SYMBOLS PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1 2, 3, 5, 6 8, 9, 11, 12 13, 14, 16, 17 19, 20, 22, 23 24 25 30, 29, 27, 26 36, 35, 33, 32 41, 40, 38, 37 47, 46, 44, 43 48 4, 10, 15, 21, 28, 34, 39, 45 1G 1Y1 to 1Y4 2Y1 to 2Y4 3Y1 to 3Y4 4Y1 to 4Y4 4G 3G 4A1 to 4A4 3A1 to 3A4 2A1 to 2A4 1A1 to 1A4 2G GND Ground (0V) 7, 18, 31, 42 VCC Positive Supply Voltage Output Enable Input Data Outputs Data Outputs Data Outputs Data Outputs Output Enable Input Output Enable Input Data Outputs Data Outputs Data Outputs Data Outputs Output Enable Input TRUTH TABLE INPUTS G An Yn L L H L H X L H Z X : Don‘t Care Z : High Impedance 2/10 OUTPUT 74ALVCH16244 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value Unit Supply Voltage -0.5 to +4.6 V VI DC Input Voltage -0.5 to +4.6 V VO DC Output Voltage (OFF State) VO DC Output Voltage (High or Low State) (note 1) -0.5 to +4.6 V -0.5 to VCC + 0.5 - 50 V mA IIK DC Input Diode Current IOK DC Output Diode Current (note 2) - 50 mA IO DC Output Current ± 50 mA ICC or IGND DC VCC or Ground Current per Supply Pin Power Dissipation PD Tstg Storage Temperature TL Lead Temperature (10 sec) ± 100 mA 400 mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO < GND, VO > VCC RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit Supply Voltage 1.65 to 3.6 V VI Input Voltage -0.3 to 3.6 V VO Output Voltage (OFF State) 0 to 3.6 V VO Output Voltage (High or Low State) 0 to VCC V VCC IOH, IOL High or Low Level Output Current (VCC = 3.0 to 3.6V) ± 24 mA IOH, IOL High or Low Level Output Current (VCC = 2.3 to 2.7V) ± 12 mA IOH, IOL High or Low Level Output Current (VCC = 1.65V) Top dt/dv Operating Temperature Input Rise and Fall Time (note 1) ±4 mA -55 to 125 °C 0 to 10 ns/V 1) VIN from 0.8V to 2V at VCC = 3.0V 3/10 74ALVCH16244 DC SPECIFICATIONS Test Condition Symbol Parameter VIH High Level Input Voltage VIL Low Level Input Voltage VOH High Level Output Voltage VOL II IIHOLD Ioff IOZ ICC ∆ICC 4/10 Low Level Output Voltage Input Leakage Current Input Hold Current Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current ICC incr. per Input Value -40 to 85 °C VCC (V) Min. 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 Max. 0.65 Vcc 1.7 2.0 -55 to 125 °C Min. Max. 0.65 Vcc 1.7 2.0 0.35 Vcc 0.7 0.8 0.35 Vcc 0.7 0.8 1.65 to 3.6 IO=-100 µA VCC-0.2 VCC-0.2 1.65 IO=-4 mA 1.2 1.2 2.3 IO=-6 mA 2.0 2.0 2.3 IO=-12 mA 1.7 1.7 2.7 IO=-12 mA 2.2 2.2 3.0 IO=-12 mA 2.4 2.4 2.0 Unit V V 3.0 IO=-24 mA 1.65 to 3.6 IO=100 µA 0.2 0.2 1.65 IO=4 mA 0.45 0.45 2.3 IO=6 mA 0.4 0.4 2.3 IO=12 mA 0.7 0.7 2.7 IO=12 mA 0.4 0.4 3.0 IO=24 mA 0.55 0.55 3.6 VI = 0 or 3.6V ±5 ±5 1.65 VI =0.58 V + 25 + 25 1.65 VI =1.07 V - 25 - 25 2.0 2.3 VI =0.7 V + 45 + 45 2.3 VI =1.7 V - 45 - 45 3.0 VI =0.8 V + 75 + 75 3.0 VI =2 V - 75 - 75 V µA µA 3.6 VI = 0 to 3.6V ± 500 ± 500 0 VI or VO = 3.6V 10 20 µA 3.6 VI = VIH or VIL VO = 0 to VCC ±5 ± 10 µA 3.6 VI = VCC or GND IO= 0 20 40 µA 3.0 to 3.6 VIH = VCC - 0.6V 500 750 µA 74ALVCH16244 AC ELECTRICAL CHARACTERISTICS Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time Value -40 to 85 °C -55 to 125 °C VCC (V) CL (pF) RL (Ω) ts = tr (ns) Min. Max. Min. Max. 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 30 30 50 50 30 30 50 50 30 30 50 50 1000 500 500 500 1000 500 500 500 1000 500 500 500 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 1 1 1 1 1 1 1 1 1 1 1 1 5.1 3.7 3.6 3.0 7.1 5.7 5.4 4.4 6.5 5.2 4.6 4.1 1 1 1 1 1 1 1 1 1 1 1 1 5.1 3.7 3.6 3.0 7.1 5.7 5.4 4.4 6.5 5.2 4.6 4.1 Unit ns 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|) 2) Parameter guaranteed by design CAPACITIVE CHARACTERISTICS Test Condition Symbol CIN Parameter Input Capacitance Control Inputs Input Capacitance Data Inputs Value TA = 25 °C VCC (V) Min. 3.3 VIN =VCC or GND Typ. 3 Unit Max. pF 3.3 VIN =VCC or GND 6 pF Output Capacitance 3.3 VIN = 0 to VCC 7 pF CPD Power Dissipation Capacitance Output enabled (note 1) CPD Power Dissipation Capacitance Output disabled (note 1) 3.3 2.5 3.3 2.5 fIN = 10MHz CL=50pF VIN = 0 or VCC 19 16 5 4 pF CIN COUT 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit) 5/10 74ALVCH16244 TEST CIRCUIT TEST SWITCH tPLH, tPHL Open tPZL, tPLZ (VCC = 3.0 to 3.6V) 6V tPZL, tPLZ (VCC = 2.3 to 2.7V) tPZH, tPHZ 2VCC GND RT = ZOUT of pulse generator (typically 50Ω) TEST CIRCUIT AND WAVEFORM SYMBOL VALUE VCC Symbol 6/10 3.0 to 3.6V 2.7V 2.3 to 2.7V 1.65 to 1.95V VIH 2.7V 2.7V VCC VCC VM 1.5V 1.5V VCC/2 VCC/2 VX VOL +0.3V VOL +0.3V VOL +0.15V VOL +0.15V VY VOH -0.3V VOH -0.3V VOH -0.15V VOH -0.15V CL 50pF 50pF 30pF 30pF RL=R1 500Ω 500Ω 500Ω 1000Ω tr = tr <2.5ns <2.5ns <2.0ns <2.0ns 74ALVCH16244 WAVEFORM 1 : PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 7/10 74ALVCH16244 TSSOP48 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. 1.2 A1 0.05 0.047 0.15 A2 MAX. 0.002 0.006 0.9 0.035 b 0.17 0.27 0.0067 0.011 c 0.09 0.20 0.0035 0.0079 D 12.4 12.6 0.488 0.496 E 8.1 BSC E1 6.0 0.318 BSC 6.2 e 0.236 0.5 BSC 0.244 0.0197 BSC K 0˚ 8˚ 0˚ 8˚ L 0.50 0.75 0.020 0.030 A A2 A1 b K e L E c D E1 PIN 1 IDENTIFICATION 1 7065588C 8/10 74ALVCH16244 Tape & Reel TSSOP48 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 30.4 0.519 1.197 Ao 8.7 8.9 0.343 0.350 Bo 13.1 13.3 0.516 0.524 Ko 1.5 1.7 0.059 0.067 Po 3.9 4.1 0.153 0.161 P 11.9 12.1 0.468 0.476 9/10 74ALVCH16244 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 10/10