HCF40110B DECADE UP/DOWN COUNTER/DECODER/LATCH/DRIVER ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ SEPARATE CLOCK-UP AND CLOCK-DOWN LINES CAPABLE OF DRIVING COMMON CATHODE LEDS AND OTHER DISPLAYS DIRECTLY ALLOWS CASCADING WITHOUT ANY EXTERNAL CIRCUITRY MAXIMUM INPUT CURRENT OF 1 µA AT 18 V (full package-temperature range) QUIESCENT CURRENT SPECIFIED UP TO 20V STANDARDIZED, SYMMETRICAL OUTPUT CHARACTERISTCS 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES" DESCRIPTION HCF40110B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP package. HCF40110B is a dual-clocked up/down counter with a special preconditioning circuit that allows the counter to be clocked, via positive going inputs, up or down regardless of the states or DIP ORDER CODES PACKAGE TUBE DIP HCF40110BEY T&R timing (within 100 ns typ.) of the other clock line. The clock signal is fed into the control logic and Johnson counter after it is preconditioned. The outputs of the Johnson counter (which include anti-lock gating to avoid being locked at an illegal state) are fed into a latch. This data can be fed directly to the decoder through the latch or can be strobed to hold a particular count while the Johnson counter continues to be clocked. The decoder feeds a seven-segment bipolar output driver which can source up to 25mA to drive LEDs and other displays such as low-voltage fluorescent and incandescent lamps. A short duration negative-going pulse appears on the BORROW output when the count changes from 0 PIN CONNECTION October 2002 1/10 HCF40110B to 9 or the CARRY output when the count changes from 9 to 0. At other times the BORROW and BORROW outputs can be tied directly to the clock-up and clock-down lines, respectively, of another HCF40110B for easy cascading of several counters. INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 15, 14, 13, 12, 3, 2 8 a, b, c, d, e, f, g Toggle Enable Reset Latch Enable Clock Down Clock Up Carry Borrow VSS 16 VDD 4 5 6 7 9 10 11 FUNCTIONAL DIAGRAM (One Half) 2/10 NAME AND FUNCTION 7 Segment Outputs Enable Johnson Counter Reset Input Latch Enable Clock Down Clock Up Carry Output Borrow Output Negative Supply Voltage Positive Supply Voltage HCF40110B TRUTH TABLES CLOCK UP* CLOCK DOWN* X RESET COUNTER DISPLAY L L L Increments by 1 Follows Counter L L L Decrements by 1 Follows Counter X X L No Change No Change X X X X X H H L Goes to 00000 Inhibited Follow Counter (Display = 0) Remains Fixed X H L L Increments by 1 Remains Fixed H L L Decrements by 1 Remains Fixed X X X LATCH TOGGLE ENABLE ENABLE X X : Don’t Care * : Typically 100 ns between clock-up and clock-down positive transitions are required to ensure proper counting LOGIC DIAGRAM 3/10 HCF40110B LOGIC DIAGRAM DISPLAY SEGMENTS 4/10 HCF40110B ABSOLUTE MAXIMUM RATINGS Symbol VDD Parameter Supply Voltage VI DC Input Voltage II DC Input Current PD Value Unit -0.5 to +22 V -0.5 to VDD + 0.5 ± 10 V mA 200 100 mW mW Top Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature -55 to +125 °C Tstg Storage Temperature -65 to +150 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage. RECOMMENDED OPERATING CONDITIONS Symbol VDD Parameter Supply Voltage VI Input Voltage Top Operating Temperature Value Unit 3 to 20 V 0 to VDD V -55 to 125 °C 5/10 HCF40110B DC SPECIFICATIONS Test Condition Symbol IL VOH VOL VIH VIL IOH IOL IOL II IOZ CI Parameter Quiescent Current High Level Output Voltage Low Level Output Voltage VI (V) 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 High Level Input Voltage Low Level Input Voltage Output Drive Current Output Sink Current Q Output Sink Current Input Leakage Current 3-State Output Leakage Current Input Capacitance VO (V) 0/5 0/5 0/10 0/15 0/5 0/10 0/15 0/5 0/10 0/15 0.5/4.5 1/9 1.5/13.5 4.5/0.5 9/1 13.5/1.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 0.4 0.5 1.5 Value |IO| VDD (µA) (V) <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 10 15 5 10 15 TA = 25°C Min. Typ. Max. 0.04 0.04 0.04 0.08 5 10 20 100 4.95 9.95 14.95 -40 to 85°C -55 to 125°C Min. Min. 150 300 600 3000 4.95 9.95 14.95 0.05 0.05 0.05 4.95 9.95 14.95 3.5 7 11 1.5 3 4 -3.2 -1 -2.6 -6.8 4 10.4 27.2 1 2.6 6.8 3.5 7 11 1.5 3 4 -1.1 -0.36 -0.9 -2.4 1.43 3.74 9.52 0.36 0.9 2.4 µA V 0.05 0.05 0.05 V V 1.5 3 4 -1.1 -0.36 -0.9 -2.4 1.43 3.74 9.52 0.36 0.9 2.4 V mA mA mA 0/18 Any Input 18 ±10-5 ±0.1 ±1 ±1 µA 0/18 Any Input 18 ±10-4 ±0.4 ±12 ±12 µA 5 7.5 Any Input The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V 6/10 Max. 150 300 600 3000 0.05 0.05 0.05 3.5 7 11 -1.36 -0.44 -1.1 -3.0 1.74 4.42 11.56 0.44 1.1 3.0 Max. Unit pF HCF40110B DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns) Test Condition Symbol Parameter VDD (V) Value (*) Min. Typ. Unit Max. CLOCK UP/CLOCK DOWN tW fCL tWC tWB Pulse Width Maximum Frequency Carry Pulse Width Borrow Pulse Width 5 10 15 5 10 15 5 10 15 5 10 15 85 35 15 2.5 5 8 225 100 70 260 110 80 5 10 15 5 10 15 5 10 15 750 285 200 300 125 75 150 60 40 ns MHz ns ns RESET tPLH tPHL Propagation Delay Time Reset to Clock Delay from Reset to First Allowable Clock tW Pulse Width ns ns ns (*) Typical temperature coefficient for all VDD value is 0.3 %/°C. NOTE : Measured at the point of 10% change in output load of 50pF, RL = 1KΩ to VDD for tPZL, tPLZ and RL = 1KΩ to VSS for tPHZ TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RL = 200KΩ RT = ZOUT of pulse generator (typically 50Ω) 7/10 HCF40110B WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) 8/10 HCF40110B Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 9/10 HCF40110B Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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