STMICROELECTRONICS HCF4035BEY

HCF4035B
4 STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER
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4 STAGE CLOCKED SHIFT OPERATION
SYNCHRONOUS PARALLEL ENTRY ON
ALL 4 STAGES
JK INPUTS ON FIRST STAGE
ASYNCHRONOUS TRUE/COMPLEMENT
CONTROL ON ALL OUTPUTS
STATIC FLIP-FLOP OPERATION;
MASTER-SLAVE CONFIGURATION
BUFFERED INPUTS AND OUTPUTS
HIGH SPEED 12MHz (Typ.) at VDD = 10V
QUIESCENT CURRENT SPECIF. UP TO 20V
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
5V, 10V AND 15V PARAMETRIC RATINGS
INPUT LEAKAGE CURRENT
II = 100nA (MAX) AT VDD = 18V TA = 25°C
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION
The HCF4035B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
This device is a four stage clocked signal serial
register
with
provision
for
synchronous
PARALLEL inputs to each stage and SERIAL
inputs to the first stage via JK logic. Register
stages 2, 3, and 4 are coupled in a serial D flip-flop
configuration when the register is in the serial
DIP
SOP
ORDER CODES
PACKAGE
TUBE
T&R
DIP
SOP
HCF4035BEY
HCF4035BM1
HCF4035M013TR
mode (PARALLEL/SERIAL control low). Parallel
entry into each register stage is permitted when
the PARALLEL/SERIAL control is high. In the
parallel or serial mode information is transferred
on positive clock transitions. When the TRUE/
COMPLEMENT control is high, the true contents
of the register are available at the output
terminals. When the TRUE/COMPLEMENT
control is low, the outputs are the complements of
the data in the register. The TRUE/
COMPLEMENT control functions asynchronously
with respect to the CLOCK signal. JK input logic is
provided on the first stage SERIAL input to
minimize logic requirements particularly in
counting and sequence generation applications.
With JK inputs connected together, the first stage
becomes a D flip-flop. An asynchronous common
RESET is also provided.
PIN CONNECTION
September 2001
1/11
HCF4035B
IINPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
9, 10, 11, 12
PI-1 to PI-4
Q1/Q1 to Q4/
1, 15, 14, 13
Q4
5
RESET
4, 3
J, K
6
CLOCK
7
P/S
2
T/C
VSS
8
16
VDD
NAME AND FUNCTION
Parallel Inputs
True/Complement Outputs
Reset Input
Serial Inputs
Clock Input
Parallel/Serial Control
True/Complement Control
Negative Supply Voltage
Positive Supply Voltage
FUNCTIONAL DIAGRAM
TRUTH TABLE
tn-1 (Inputs)
tn (Outputs)
CLOCK
X
X : Don’t Care
2/11
J
K
R
Qn-1
Qn
L
X
L
L
L
H
X
L
L
H
X
L
L
H
L
H
L
L
Qn-1
Qn-1 Toggle Mode
X
H
L
H
H
Qn-1
L
X
X
L
Qn-1
X
X
H
X
HCF4035B
LOGIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
VDD
Parameter
Supply Voltage
Value
Unit
-0.5 to +22
V
VI
DC Input Voltage
-0.5 to VDD + 0.5
V
II
DC Input Current
± 10
mA
200
100
mW
mW
Top
Power Dissipation per Package
Power Dissipation per Output Transistor
Operating Temperature
-55 to +125
°C
Tstg
Storage Temperature
-65 to +150
°C
PD
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol
VDD
Parameter
Supply Voltage
VI
Input Voltage
Top
Operating Temperature
Value
Unit
3 to 20
V
0 to VDD
V
-55 to 125
°C
3/11
HCF4035B
DC SPECIFICATIONS
Test Condition
Symbol
IL
VOH
VOL
VIH
VIL
IOH
IOL
II
CI
Parameter
Quiescent Current
High Level Output
Voltage
Low Level Output
Voltage
VI
(V)
0/5
0/10
0/15
0/20
0/5
0/10
0/15
5/0
10/0
15/0
High Level Input
Voltage
Low Level Input
Voltage
Output Drive
Current
Output Sink
Current
Input Leakage
Current
Input Capacitance
VO
(V)
0/5
0/5
0/10
0/15
0/5
0/10
0/15
0/18
0.5/4.5
1/9
1.5/13.5
4.5/0.5
9/1
13.5/1.5
2.5
4.6
9.5
13.5
0.4
0.5
1.5
Value
|IO| VDD
(µA) (V)
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
<1
Any Input
Any Input
5
10
15
20
5
10
15
5
10
15
5
10
15
5
10
15
5
5
10
15
5
10
15
18
TA = 25°C
Min.
Typ.
Max.
0.04
0.04
0.04
0.08
5
10
20
100
4.95
9.95
14.95
-40 to 85°C
-55 to 125°C
Min.
Min.
150
300
600
3000
4.95
9.95
14.95
0.05
0.05
0.05
4.95
9.95
14.95
3.5
7
11
1.5
3
4
-3.2
-1
-2.6
-6.8
1
2.6
6.8
±0.1
5
7.5
0.05
0.05
0.05
1.5
3
4
-1.1
-0.36
-0.9
-2.4
0.36
0.9
2.4
The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
4/11
V
V
1.5
3
4
±1
µA
V
3.5
7
11
-1.1
-0.36
-0.9
-2.4
0.36
0.9
2.4
±10-5
Max.
150
300
600
3000
0.05
0.05
0.05
3.5
7
11
-1.36
-0.44
-1.1
-3.0
0.44
1.1
3.0
Max.
Unit
V
mA
mA
±1
µA
pF
HCF4035B
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns)
Test Condition
Symbol
Parameter
CLOCKED OPERATION
tPLH tPHL Propagation Delay Time
tTHL tTLH Transition Time
fMAX
tW
Maximum Clock Input
Frequency
Clock Pulse Width
tr , tf
Clock Input Rise or Fall
Time
tsetup
Data Setup Time J/K lines
tsetup
Data Setup Time
Parallel In Lines
RESET OPERATION
tPLH tPHL Propagation Delay Time
tW
Reset Pulse Width
VDD (V)
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
Value (*)
Min.
2
6
8
Unit
Typ.
Max.
250
100
75
100
50
40
4
12
16
100
45
30
15
15
15
110
40
30
70
25
20
500
200
150
200
100
80
200
90
60
230
100
80
125
55
40
460
200
160
250
110
40
ns
ns
MHz
ns
µs
220
80
60
140
50
40
ns
ns
ns
ns
(*) Typical temperature coefficient for all VDD value is 0.3 %/°C.
5/11
HCF4035B
TYPICAL APPLICATIONS
Binary To BCD Converter
Bidec Logic
6/11
HCF4035B
DOUBLE SEQUENCE GENERATOR
STATE SEQUENCES
Using a control line (E) two different state
sequences can be generated. For example,
suppose the following two sequences are
desiderated on command (control line E)
Control = E = 0
0
1
2
5
10
4
9
3
6
13
11
7
14
12
8
1
Q1
Q2
Q3
Q4
A
B
C
D
0
1
0
1
0
0
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
0
1
1
1
15
14
13
10
5
11
6
12
9
2
4
8
1
3
7
Q1
Q2
Q3
Q4
A
B
C
D
1
0
1
0
1
1
0
0
1
0
0
0
1
1
1
1
0
0
1
0
1
1
0
0
1
0
0
0
1
1
1
1
1
0
1
0
1
1
0
0
1
0
0
0
1
1
1
1
1
0
1
0
1
1
0
0
1
0
0
0
SHIFT LEFT/SHIFT RIGHT REGISTER
7/11
HCF4035B
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance)
RL = 200KΩ
RT = ZOUT of pulse generator (typically 50Ω)
8/11
HCF4035B
Plastic DIP-16 (0.25) MECHANICAL DATA
mm.
inch
DIM.
MIN.
a1
0.51
B
0.77
TYP
MAX.
MIN.
TYP.
MAX.
0.020
1.65
0.030
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
17.78
0.700
F
7.1
0.280
I
5.1
0.201
L
Z
3.3
0.130
1.27
0.050
P001C
9/11
HCF4035B
SO-16 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
MAX.
0.003
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45° (typ.)
D
9.8
10
0.385
0.393
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
8.89
0.350
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.62
0.024
8° (max.)
PO13H
10/11
HCF4035B
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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11/11