HCF4056B BCD TO 7 SEGMENT DECODER /DRIVER WITH STROBED LATCH FUNCTION ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ QUIESCENT CURRENT SPECIF. UP TO 20V OPERATION OF LIQUID CRYSTALS WITH CMOS CIRCUITS PROVIDES ULTRA LOW POWER DISPLAY. EQUIVALENT AC OUTPUT DRIVE FOR LIQUID CRYSTAL DISPLAYS - NO EXTERNAL CAPACITOR REQUIRED VOLTAGE DOUBLING ACROSS DISPLAY [(VDD - VEE) = 18V] RESULTS IN EFFECTIVE 36V (p-p) DRIVE ACROSS SELECTED DISPLAY SEGMENTS LOW OR HIGH OUTPUT LEVEL DC DRIVE FOR OTHER TYPES OF DISPLAYS ONE CHIP LOGIC LEVEL CONVERSION FOR DIFFERENT INPUT AND OUTPUT LEVEL SWINGS FULL DECODING OF ALL INPUT COMBINATIONS : "0 - 9, L, H, P, A" AND BLANK POSITIONS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES" DESCRIPTION HCF4056B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. DIP SOP ORDER CODES PACKAGE TUBE T&R DIP SOP HCF4056BEY HCF4056BM1 HCF4056M013TR HCF4056B is a single digit BCD to 7 segment decoder driver circuit that provides a level shifting function on the chip. This feature permits the BCD input-signal swings (VDD to VSS) to be the same as or different from the 7-segment output signal swings (VDD to VEE). For example, the BCD input-signal swings (VDD to VSS) may be as low as 0 to -3V, whereas the output-display drive signal swing (VDD to VEE) may be from 0 to -5V. If VDD to VEE exceeds 15V, VDD to VSS should be at least 4V. The 7-segment outputs are controlled by the DISPLAY-FREQUENCY (DF) input, which causes the selected segment outputs to be low, high, or a square wave output (for liquid crystal displays). PIN CONNECTION September 2002 1/10 HCF4056B When the DF input is low, the output segments will be high when selected by the BCD inputs. When the DF input is high, the output segments will be low when selected by the BCD inputs. When a square wave is present at the DF input, the selected segments will have a square wave output that is 180° out of phase with the DF input. Those segments which are not selected will have a square wave output that is in phase with the input. DF square wave repetition rates for liquid crystal displays usually range from 30Hz (well above flicker rate) to 200Hz (well below the upper limit of the liquid crystal frequency response). HCF4056B provides a strobed-latch function at the BCD inputs. The decoding of all input combinations in this device provides displays of 0 to 9 as well as L, P, H, A, -, and a blank position. The level shifted function permits the use of different input and output signal swings. The input swings from a low level of VSS to a high level of V DD, while the outputs swing from a low level of VEE to the same high level of VDD. Thus, the input and output swings can be selected independently of each other over a 3 to 18V range. VSS may be connected to VEE when no level-shift function is required. The HCF4056B, however must be used together with HCF4054B to provide the common DF output. INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 2 NAME AND FUNCTION 3 5, 3, 2, 4 2 ,2 ,2 ,2 a to g BCD Inputs 7 - Segments Outputs 7 DISPLAY FREQ. IN STROBE VEE Negative Supply Voltage 8 VSS Negative Supply Voltage 16 VDD Positive Supply Voltage 1 2/10 1 9, 10, 11, 12, 13, 15, 14 6 FUNCTIONAL DIAGRAM SYMBOL 0 Display Frequency Input Strobe Input HCF4056B TRUTH TABLE INPUT CODE 3 2 2 2 L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H OUTPUT STATE 2 0 2 a b c d e f g DISPLAY CHARACTER L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H H L H H L H H H H H L L H H L L H H H H H L L H H H L H H H L L H H L H H H H H H H L H L H L L H L H H L H H L H H H L L L L L H L H L L L H L H L H H H H L L H L L L H H H L H H H H H H L L L L H H H H H L H H L H H H H L 0 1 2 3 4 5 6 7 8 9 L H P A BLANK 1 ABSOLUTE MAXIMUM RATINGS Symbol VDD Parameter Supply Voltage Value Unit -0.5 to +22 V VI DC Input Voltage -0.5 to VDD + 0.5 V II DC Input Current ± 10 mA 200 100 mW mW Top Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature -55 to +125 °C Tstg Storage Temperature -65 to +150 °C PD Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage. RECOMMENDED OPERATING CONDITIONS Symbol VDD Parameter Supply Voltage VI Input Voltage Top Operating Temperature Value Unit 3 to 20 V 0 to VDD V -55 to 125 °C 3/10 HCF4056B DC SPECIFICATIONS Test Condition Symbol IL VOH VOL VIH VIL IOH IOL II CI Parameter Quiescent Current High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage Output Drive Current Output Sink Current Input Leakage Current (any input) Input Capacitance (any input) VEE (V) VI (V) -5 0 0 0 0 0 0 0 0 0 -5 0 0 5 0 0 -5 0 0 -5 0 0 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 0 0/18 0/5 0/10 0/15 0/5 0/10 0/15 VO (V) Value VSS VDD (V) (V) 0.5/4.5 1/9 1.5/18.5 0.5/4.5 9/1 1.5/18.5 4.5 9.5 13.5 0.4 0.5 1.5 TA = 25°C Min. -40 to 85°C -55 to 125°C Unit Typ. Max. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0.04 10 0.04 15 0.04 20 0.08 5 4.95 10 9.95 15 14.95 5 0.05 10 0.05 15 0.05 5 3.5 10 7 15 11 5 10 15 5 -0.38 -0.9 10 -0.38 -0.9 15 -1.27 -3 5 1.1 2.6 10 1.1 2.6 15 2.9 6.8 5 10 20 100 0 18 Max. Min. 150 300 600 3000 4.95 9.95 14.95 Max. 150 300 600 3000 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 1.5 3 4 -0.28 -0.28 -0.95 0.82 0.82 2.17 V V 1.5 3 4 -0.28 -0.28 -0.95 0.82 0.82 2.17 ±1 µA V 0.05 0.05 0.05 3.5 7 11 ±10-5 ±0.1 5 Min. V mA mA ±1 7.5 µA pF The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns) Test Condition Symbol Parameter tPHL tPLH Propagation Delay Time (any Input to any Output) tTHL tTLH Transition Time (any Output) VEE (V) VSS (V) VDD (V) -5 0 0 -5 0 0 0 0 0 0 0 0 5 10 15 5 10 15 (*) Typical temperature coefficient for all VDD value is 0.3 %/°C. 4/10 Value (*) Min. Unit Typ. Max. 650 575 375 100 100 75 1300 1150 750 200 200 150 ns ns HCF4056B TYPICAL APPLICATIONS FIGURE 1 : Display Driver Circuit FIGURE 2 : Display Driver Waveforms. 5/10 HCF4056B FIGURE 3 : Conversion Of "H" Display To "F" Display Example of a circuit that converts an "H" display (code 1011) to an "F" display. TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RL = 200KΩ RT = ZOUT of pulse generator (typically 50Ω) 6/10 HCF4056B WAVEFORM : DATA SETUP TIME AND STROBE PULSE DURATION (f=1MHz; 50% duty cycle ) 7/10 HCF4056B Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 8/10 HCF4056B SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45˚ (typ.) D 9.8 E 5.8 10 0.385 6.2 0.228 0.393 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8 ˚ (max.) PO13H 9/10 HCF4056B Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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