P4C1256 P4C1256 HIGH SPEED 32K x 8 STATIC CMOS RAM FEATURES Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Fast tOE Automatic Power Down Packages —28-Pin 300 mil DIP and SOJ —28-Pin 600 mil Ceramic DIP —28-Pin LCC(350 mil x 550 mil) —32-Pin LCC (450 mil x 550 mil) High Speed (Equal Access and Cycle Times) — 12/15/20/25/35 ns (Commercial) — 15/20/25/35/45 ns (Industrial) — 20/25/35/45/55/70 ns (Military) Low Power — 880 mW Active (Commercial) Single 5V±10% Power Supply Easy Memory Expansion Using CE and OE Inputs Common Data I/O DESCRIPTION The P4C1256 is a 262,144-bit high-speed CMOS static RAM organized as 32Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply. Access times as fast as 12 nanoseconds permit greatly enhanced system operating speeds. CMOS is utilized to reduce power consumption to a low level. The P4C1256 is a member of a family of PACE RAM™ products offering fast access times. The P4C1256 device provides asynchronous operation with matching access and cycle times. Memory locations are specified on address pins A0 to A14. Reading is accomplished by device selection (CE and output enabling (OE) while write enable (WE) remains HIGH. By presenting the address under these conditions, the data in the addressed memory location is presented on the data input/output pins. The input/output pins stay in the HIGH Z state when either CE or OE is HIGH or WE is LOW. Package options for the P4C1256 include 28-pin 300 mil DIP and SOJ packages. For military temperature range, Ceramic DIP and LCC packages are available. ••• ••• ••• COLUMN I/O • •• ••• ••• INPUT DATA CONTROL I/O2 COLUMN SELECT WE ••• CE A (7) 3 26 A14 A3 4 25 A13 A4 5 24 A12 A5 6 23 A 11 A6 7 22 OE A7 8 21 A 10 A8 9 20 CE A9 10 19 I/08 I/01 18 I/07 I/02 11 12 17 I/06 I/03 13 16 I/05 GND 14 15 I/04 4 3 1 32 31 30 29 2 WE A14 A2 VCC WE A0 VCC 27 A2 A1 28 2 A3 A4 5 6 28 A 13 A 12 A5 A6 7 27 A 11 8 26 NC A7 A8 9 25 10 24 OE A 10 A9 NC 11 23 12 22 I/O1 13 21 14 15 16 17 18 19 20 CE I/O8 I/O7 I/O5 I/O6 I/O1 1 A1 NC A A0 I/O4 (8) 262,144-BIT MEMORY ARRAY NC •• • ROW SELECT A PIN CONFIGURATIONS I/O2 I/O3 GND FUNCTIONAL BLOCK DIAGRAM ••• DIP (P5, C5, D5-1), SOJ (J5) TOP VIEW A OE 1519B 32 LCC (L6) TOP VIEW See Selection Guide page for 28-pin LCC Means Quality, Service and Speed 1Q97 117 P4C1256 MAXIMUM RATINGS(1) Symbol Parameter Value Unit VCC Power Supply Pin with Respect to GND –0.5 to +7 V VTERM Terminal Voltage with Respect to GND (up to 7.0V) –0.5 to VCC +0.5 V TA Operating Temperature –55 to +125 °C Symbol RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE Grade(2) Ambient Temperature GND VCC 0V 0V 0V 5.0V ± 10% 5.0V ± 10% 5.0V ± 10% Military –55°C to +125°C –40°C to +85°C Industrial Commercial 0°C to +70°C Parameter Value Unit TBIAS Temperature Under Bias –55 to +125 °C TSTG Storage Temperature –65 to +150 °C PT Power Dissipation 1.0 W IOUT DC Output Current 50 mA CAPACITANCES(4) VCC = 5.0V, TA = 25°C, f = 1.0MHz Parameter Symbol Conditions Typ. Unit CIN Input Capacitance VIN = 0V 8 pF COUT Output Capacitance VOUT = 0V 10 pF DC ELECTRICAL CHARACTERISTICS Over recommended operating temperature and supply voltage(2) Symbol Parameter VIH Input High Voltage VIL Input Low Voltage VHC CMOS Input High Voltage VLC CMOS Input Low Voltage VOL Output Low Voltage (TTL Load) VOH Output High Voltage (TTL Load) Test Conditions P4C1256 Unit Min Max VCC +0.5 V 2.2 0.8 –0.5(3) VCC –0.2 VCC +0.5 (3) –0.5 IOL = +8 mA, VCC = Min. IOH = –4 mA, VCC = Min. 2.4 V V 0.2 V 0.4 V V ILI Input Leakage Current VCC = Max. VIN = GND to VCC Mil. Ind./Com’l. –10 –5 +10 +5 µA ILO Output Leakage Current VCC = Max., CE = VIH, Mil. VOUT = GND to VCC Ind./Com’l. –10 –5 +10 +5 µA ISB CE ≥ VIH or Mil. Standby Power Supply Current (TTL Input Levels) CE2 ≤VIL, VCC= Max Ind./Com’l. f = Max., Outputs Open ___ ___ 45 30 mA ISB1 Standby Power Supply Current (CMOS Input Levels) CE ≥ VHC or Mil. CE2 ≤VLC, VCC= Max Ind./Com’l. f = 0, Outputs Open VIN ≤ VLC or VIN ≥ VHC ___ ___ 20 10 mA n/a = Not Applicable Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability. 2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. Transient inputs with VIL and IIL not more negative than –3.0V and –100mA, respectively, are permissible for pulse widths up to 20 ns. 4. This parameter is sampled and not 100% tested. 118 P4C1256 POWER DISSIPATION CHARACTERISTICS VS. SPEED Symbol ICC Temperature Range Commercial Parameter Dynamic Operating Current* Industrial Military –12 170 –15 –20 160 N/A N/A Unit 155 –25 150 –35 145 –45 N/A –55 N/A –70 N/A 170 165 160 155 150 N/A N/A mA N/A 170 165 160 155 150 150 mA mA *VCC = 5.5V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V. CE = VIL, OE = VIH. AC ELECTRICAL CHARACTERISTICS—READ CYCLE (VCC = 5V ± 10%, All Temperature Ranges)(2) Sym. -12 Parameter -15 -20 -25 -35 -45 -55 -70 Unit Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max tRC Read Cycle Time 12 tAA Address Access Time 12 15 20 25 35 45 55 70 ns tAC Chip Enable Access Time 12 15 20 25 35 45 55 70 ns tOH Output Hold from Address Change 2 2 2 3 3 3 3 3 ns tLZ Chip Enable to Output in Low Z 2 2 2 3 3 3 3 3 ns tHZ Chip Disable to Output in High Z 5 8 9 11 15 20 25 30 ns tOE Output Enable Low to Data Valid 5 7 9 10 15 20 25 30 ns tOLZ Output Enable Low to Low Z tOHZ Output Enable High to High Z tPU Chip Enable to Power Up Time Chip Disable to Power Down Time tPD 20 15 0 0 5 0 0 7 0 12 25 0 9 0 15 35 0 11 0 20 119 0 15 0 20 55 45 20 ns 30 25 30 ns ns 0 0 25 ns 0 0 0 20 70 35 ns P4C1256 OE CONTROLLED)(1) READ CYCLE NO. 1 (OE tRC (5) ADDRESS tAA OE tOE tOLZ tOH (4) CE tAC tOHZ (4) tHZ tAC (4) (4) DATA OUT READ CYCLE NO. 2 (ADDRESS CONTROLLED) tRC (5) ADDRESS tAA tOH PREVIOUS DATA VALID DATA OUT DATA VALID CE CONTROLLED) READ CYCLE NO. 3 (CE tRC CE tLZ(8) tHZ tAC DATA OUT DATA VALID HIGH IMPEDANCE ICC VCC SUPPLY CURRENT tPD tPU ISB Notes: 1. WE is HIGH for READ cycle. 2. CE1 is LOW, CE2 is HIGH and OE is LOW for READ cycle. 3. ADDRESS must be valid prior to, or coincident with CE1 transition LOW . 4. Transition is measured ± 200 mV from steady state voltage prior to change, with loading as specified in Figure 1. This parameter is sampled and not 100% tested. 5. READ Cycle Time is measured from the last valid address to the first transitioning address. 120 P4C1256 AC CHARACTERISTICS—WRITE CYCLE (VCC = 5V ± 10%, All Temperature Ranges)(2) Sym. Parameter -12 Write Cycle Time 12 tCW Chip Enable Time to End of Write Address Valid to End of Write Address Set-up Time Write Pulse Width Address Hold Time Data Valid to End of Write tAS tWP tAH tDW -20 -35 -25 -45 -55 -70 Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max tWC tAW -15 Unit 15 20 25 35 45 55 70 ns 9 10 15 18 22 30 35 40 ns 9 10 15 20 25 35 40 45 ns 0 0 0 0 0 0 0 0 ns 9 11 15 18 22 25 30 35 ns 0 0 0 0 0 0 0 0 ns 8 9 11 13 15 20 25 30 ns 0 0 0 0 0 0 0 0 ns tDH Date Hold Time tWZ Write Enable to Output in High Z tOW 3 Output Active from End of Write 7 8 3 10 11 3 15 3 5 18 5 25 0 30 0 ns ns WE CONTROLLED)(6) WRITE CYCLE NO. 1 (WE (9) tWC ADDRESS tCW CE tAW tAH tWP WE tAS tDW tDH DATA VALID DATA IN (4) tOW tWZ (4,7) (7) DATA OUT DATA UNDEFINED HIGH IMPEDANCE Notes: 6. CE1 and WE must be LOW for WRITE cycle. 7. OE is LOW for this WRITE cycle to show tWZ and tOW. 8. If CE1 goes HIGH simultaneously with WE HIGH, the output remains in a high impedance state. 9. Write Cycle Time is measured from the last valid address to the first transitioning address. 121 P4C1256 CE CONTROLLED)(6) TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE tWC (9) ADDRESS tCW tAS CE tAH tAW tWP WE tDW tDH DATA VALID DATA IN DATA OUT(6) HIGH IMPEDANCE AC TEST CONDITIONS TRUTH TABLE Input Pulse Levels Mode GND to 3.0V CE1 CE2 OE WE I/O Power Input Rise and Fall Times 3ns Standby H X X X High Z Standby Input Timing Reference Level 1.5V Standby X L X X High Z Standby Output Timing Reference Level 1.5V DOUT Disabled L H H H High Z Active Read L H L H DOUT Active Write L H X L High Z Active Output Load See Figures 1 and 2 +5V R TH = 166.5 Ω 480Ω D OUT DOUT 255Ω 30pF* (5pF* for t , t LZ , t OHZ , tOLZ, tWZ and t OW ) 30pF* (5pF* for t VTH = 1.73 V HZ HZ ,t ,t LZ , OHZ, t OLZ , t WZ and t OW ) Figure 1. Output Load Figure 2. Thevenin Equivalent * including scope and test fixture. Note: Because of the ultra-high speed of the P4C1256, care must be taken when testing this device; an inadequate setup can cause a normal functioning part to be rejected as faulty. Long high-inductance leads that cause supply bounce must be avoided by bringing the VCC and ground planes directly up to the contactor fingers. A 0.01 µF high frequency capacitor is also required between VCC and ground. To avoid signal reflections, proper termination must be used; for example, a 50Ω test environment should be terminated into a 50Ω load with 1.73V (Thevenin Voltage) at the comparator input, and a 116Ω resistor must be used in series with DOUT to match 166Ω (Thevenin Resistance). 122 P4C1256 PACKAGE SUFFIX Package Suffix P J C D DW L28 L32 TEMPERATURE RANGE SUFFIX Temperature Range Suffix Description Plastic DIP, 300 mil wide standard Plastic SOJ, 300 mil wide standard Sidebrazed DIP, 300 mil wide CERDIP, 300 mil wide CERDIP, 600 mil wide Leadless Chip Carrier, 350 x 550 mils Leadless Chip Carrier, 450 x 550 mils C I M MB Description Commercial Temperature Range, 0°C to +70°C. Industrial Temperature Range, –40˚C to +85˚C. Military Temperature Range, –55°C to +125°C. Mil. Temp. with MIL-STD-883 Class B compliance. ORDERING INFORMATION Performance Semiconductor's part numbering scheme is as follows: P4C 1256 ss p t Temperature Range Package Code Speed (Access/Cycle Time) Device Number Static RAM Prefix I = Ultra-low standby power designator L, if available. ss = Speed (access/cycle time in ns). e.g. 25, 35. p = Package code, i.e., P, J, C, D, DW, L28, L32. t = Temperature range, i.e., C, M. MB. The P4C1256 is also available per SMD 5962-88662 123 P4C1256 SELECTION GUIDE The P4C1256 is available in the following temperature, speed and package options. The P4C1256L is available only over the military temperature range. Temp. Range Speed Package 12 15 20 25 35 45 55 70 Com'l Plastic DIP Plastic SOJ -12PC -12JC -15PC -15JC -20PC -20JC -25PC -25JC -35PC -35JC N/A N/A N/A N/A N/A N/A Ind. Plastic DIP Plastic SOJ N/A N/A -15PI -15JI -20PI -20JI -25PI -25JI -35PI -35JI -45PI -425JI N/A N/A N/A N/A Mil. Temp. Sidebrazed (300 mil) CERDIP (300 mil) CERDIP (600 mil) L28 L32 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A -20CM -20DM -20DWM -20L28M -20L32M -25CM -25DM -25DWM -25L28M -25L32M -35CM -35DM -35DWM -35L28M -35L32M -45CM -45DM -45DWM -45L28M -45L32M -55CM -55DM -55DWM -55L28M -55L32M -70CM -70DM -70DWM -70L28M -70L32M Military Proc'd* Sidebrazed (300 mil) CERDIP (300 mil) CERDIP (600 mil) L28 L32 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A -70CMB -55CMB -45CMB -35CMB -20CMB -25CMB -70DMB -55DMB -45DMB -35DMB -20DMB -25DMB -20DWMB -25DWMB -35DWMB -45DWMB -55DWMB -70DWMB -20L28MB -25L28MB -35L28MB -45L28MB -55L28MB -70L28MB -20L32MB -25L32MB -35L32MB -45L32MB -55L32MB -70L32MB * Military temperature range with MIL-STD-883, Class B processing. N/A = Not Available A0 VCC WE A2 A1 28 LCC PIN CONFIGURATION 3 A3 A4 4 A5 A6 27 26 25 A 14 A 13 6 24 A 12 7 23 A 11 A7 8 22 A8 9 21 OE A 10 10 20 11 19 18 17 I/O6 I/O5 12 14 15 16 13 I/O4 I/O2 28 1 5 I/O3 GND A9 I/O1 2 28 LCC (L5) TOP VIEW 124 CE I/O8 I/O7