LDR1833 LDR2533 Very low drop dual voltage regulator Features ■ Output current 1 up to 500 mA ■ Output current 2 up to 1.0 A ■ Low dropout voltage 1 (0.3 V @ IO = 500 mA) ■ Low dropout voltage 2 (0.4 V @ IO = 1 A) ■ Very low supply current (typ. 50 µA in OFF mode, 1.6 mA max in ON mode) ■ Logic-controlled electronic shutdown output voltage availability for each regulator: 1.8 V, 2.5 V, 3.3 V ■ Internal current and thermal limit ■ Stable with low value (min. 4.7 µF) and low ESR output capacitors ■ Supply voltage rejection: 70 dB (typ.) ■ Temperature range (- 40 °C to 125 °C) PPAK Description The LDR1833, LDR2533 is a very low drop dual voltage regulator available in PPAK. The very low drop-voltage (0.5 V) and the very low supply current make it particularly suitable for low noise and low power applications such as PDA, Microdrive and other data storage applications while the used high voltage technology makes this device suitable for consumer applications such as Monitors and Set-top-box. For each VO a shutdown logic control function is available (TTL compatible) to decrease the total power consumption. Table 1. Device summary Output voltages Order codes April 2008 VO1 VO2 LDR1833PT-R 1.8 V 3.3 V LDR2533PT-R 2.5 V 3.3 V Rev 3 1/16 www.st.com 16 Contents LDR1833 - LDR2533 Contents 1 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/16 LDR1833 - LDR2533 1 Diagram Figure 1. Block diagram Diagram VI1 INH1 POWER 1 START UP 1 BAND GAP 1 VO1 DRIVER 1 + ERROR AMPLIFIER 1 THERMAL 1 THERMAL 2 + ERROR AMPLIFIER 2 INH2 START UP 2 BAND GAP 2 DRIVER 2 VI2 POWER 2 VO2 3/16 Pin configuration LDR1833 - LDR2533 2 Pin configuration Figure 2. Pin connections (top view) PPAK Table 2. 4/16 Pin description Pin n° Symbol Name and function 3 GND 2 VI1 Input 1 supply pin. Bypass with a 2.2µF capacitor to GND 1 VI2 Input 2 supply pin. Bypass with a 2.2µF capacitor to GND 4 VO1 Output 1 pin. Bypass with a 4.7µF capacitor to GND port 5 VO2 Output 2 pin. Bypass with a 4.7µF capacitor to GND port Ground pin LDR1833 - LDR2533 Maximum ratings 3 Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Value Unit VI1 & VI2 DC input voltage -0.3 to 15 V INH Shutdown voltage -0.3 to 15 V IO Output current Internally limited PD Power dissipation Internally limited TSTG TA Storage temperature range -50 to +150 °C Operating ambient temperature range -40 to +125 °C Note: Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. Table 4. Thermal data Symbol RthJC Parameter Thermal resistance junction-case PPAK Unit 8 °C/W 5/16 Typical application 4 Typical application Figure 3. Typical application circuit 6/16 LDR1833 - LDR2533 LDR1833 - LDR2533 Electrical characteristics 5 Electrical characteristics Table 5. Electrical characteristics (VI1 = VO1 + 2 V, VI2 = VO2 + 2 V, VINH1 = VINH2 = 2.5 V, CI1,2 = 2.2 µF, CO1,2 = 4.7 µF, IO1 = IO2 = 10 mA, TA = -40 °C to 125 °C, unless otherwise specified. Typical values are referred at TA = 25 °C) Symbol Parameter VO1 Output voltage 1 VO2 Output voltage 2 Test conditions Min. Typ. Max. Unit -5 VNOM1 +5 %V -5 VNOM2 +5 %V VDROP1 Dropout voltage 1 (1) IO1 = 500mA 0.3 0.7 V VDROP2 Dropout voltage 2 (1) IO2 = 1A 0.4 0.8 V ΔVO1 Line regulation 1 VI1 = VO1+2V to VO1+7V, IO = 250mA 15 30 mV ΔVO2 Line regulation 2 VI2 = VO2+2V to VO2+7V, IO = 500mA 15 40 mV ΔVO1 Load regulation 1 VI1 = VO1+2V, IO1 = 10 to 500mA 10 mV ΔVO2 Load regulation 2 VI2 = VO2+2V, IO2 = 10mA to 1A 60 mV ISTOT Total supply current IO1 = IO2 = NO LOAD 2 mA 1 channel supply current NO LOAD 1 mA Quiescent current IO1 = 500mA, IO2 = 1A 30 mA ISC1 Short circuit current 1 TA = 25° 500 800 mA ISC2 Short circuit current 2 TA = 25° 1 1.6 A VINH-H Enable voltage HIGH VINH-L Enable voltage LOW IS IQMAX 2.4 V 0.8 V IINH Enable pin current VINH = 5V 6 µA SVR Supply voltage rejection (2) VI1,2 = VO1,2 +3V ±1V, IO1,2 = 10 mA, f = 120Hz 70 dB RMS output noise (2) Bandwidth of 10Hz to 100kHz 0.003 %VO eN 1. This test is not performed for VO < 2.5 V. 2. Guaranteed by design, but not tested in production 7/16 Typical characteristics LDR1833 - LDR2533 6 Typical characteristics Figure 4. (unless otherwise specified TJ = 25 °C) Dropout voltage (VO1) vs Figure 5. temperature Dropout voltage (VO2) vs temperature Figure 6. Dropout voltage (VO1) vs temperature Figure 7. Dropout voltage (VO2) vs temperature Figure 8. Line regulation (VO1) vs temp. Figure 9. Load regulation (VO1) vs temp. 8/16 LDR1833 - LDR2533 Typical characteristics Figure 10. Line regulation (VO2) vs temperature Figure 11. Load regulation (VO2) vs temperature Figure 12. Short circuit current (VO1) vs drop voltage Figure 13. Short circuit current (VO2) vs drop voltage Figure 14. Inhibit voltage vs temperature Figure 15. One channel inhibit current vs temperature 9/16 Typical characteristics LDR1833 - LDR2533 Figure 16. Supply voltage rejection vs (VO1) temperature Figure 17. Supply voltage rejection vs (VO2) temperature Figure 18. Supply voltage rejection (VO1) vs frequency Figure 19. Supply voltage rejection (VO2) vs frequency Figure 20. Maximum total quiescent current vs Figure 21. Total supply current vs temperature temperature 10/16 LDR1833 - LDR2533 Typical characteristics Figure 22. Quiescent current (VO1) vs output current Figure 23. Quiescent current (VO2) vs output current Figure 24. Thermal protection vs VO1 Figure 25. Load transient CI1,2=1µF, CO1,2=2.2µF, VINH1,2=2.5V, VI1=4.5V, VI2=5.3V, IO1=5mA to 0.5A, IO2=5mA to 1A, tRISE=tFALL=4.2µs Figure 26. Line transient VO1,2 Figure 27. Start up transient VO1 CI1,2=0, CO1,2=2.2µF, VI1=4.4 to 10.4V, VI2=5.3 to 11.3V, IO1=0.25A, IO2=0.5A, tRISE=tFALL=4.4µs VI1=1.1 to 8.5V, VI2=1.2 to 9.8V, IO1=0.25A, IO2=0.5A, tRISE=5µs 11/16 Package mechanical data 7 LDR1833 - LDR2533 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 12/16 LDR1833 - LDR2533 Package mechanical data PPAK mechanical data mm. inch. Dim. Min. Typ. Max. Min. Typ. Max. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.4 0.6 0.015 0.023 B2 5.2 5.4 0.204 0.212 0.023 C 0.45 0.6 0.017 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 6.6 0.252 D1 E 5.1 6.4 E1 4.7 e G 0.201 1.27 4.9 0.260 0.185 0.050 5.25 0.193 0.206 G1 2.38 2.7 0.093 0.106 H 9.35 10.1 0.368 0.397 0.039 L2 0.8 L4 0.6 L5 1 L6 1 1 2.8 0.031 0.023 0.039 0.039 0.110 0078180-E 13/16 Package mechanical data LDR1833 - LDR2533 Tape & reel DPAK-PPAK mechanical data mm. inch. Dim. Min. Typ. A Min. Typ. 330 13.0 13.2 Max. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 14/16 Max. 0.504 0.512 22.4 0.519 0.882 Ao 6.80 6.90 7.00 0.268 0.272 0.2.76 Bo 10.40 10.50 10.60 0.409 0.413 0.417 Ko 2.55 2.65 2.75 0.100 0.104 0.105 Po 3.9 4.0 4.1 0.153 0.157 0.161 P 7.9 8.0 8.1 0.311 0.315 0.319 LDR1833 - LDR2533 Revision history 8 Revision history Table 6. Document revision history Date Revision Changes 03-Aug-2004 2 Modified: tables 1, 3, 5 and figures 3, 6, 10, 11, 14, 17, 22, 23. 15-Apr-2008 3 Modified: Table 1 on page 1. 15/16 LDR1833 - LDR2533 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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