TI PCA9547PW

PCA9547
8-channel I2C-bus multiplexer with reset
Rev. 02 — 12 September 2006
Product data sheet
1. General description
The PCA9547 is an octal bidirectional translating multiplexer controlled by the I2C-bus.
The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only one
SCx/SDx channel can be selected at a time, determined by the contents of the
programmable control register. The device powers up with Channel 0 connected, allowing
immediate communication between the master and downstream devices on that channel.
An active LOW reset input allows the PCA9547 to recover from a situation where one of
the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the
I2C-bus state machine causing all the channels to be deselected, except Channel 0 so
that the master can regain control of the bus.
The pass gates of the multiplexers are constructed such that the VDD pin can be used to
limit the maximum high voltage which will be passed by the PCA9547. This allows the use
of different bus voltages on each pair, so that 1.8 V, 2.5 V, or 3.3 V parts can communicate
with 5 V parts without any additional protection. External pull-up resistors pull the bus up
to the desired voltage level for each channel. All I/O pins are 5 V tolerant.
2. Features
n
n
n
n
n
n
n
n
n
n
n
n
n
n
n
1-of-8 bidirectional translating multiplexer
I2C-bus interface logic; compatible with SMBus standards
Active LOW RESET input
3 address pins allowing up to 8 devices on the I2C-bus
Channel selection via I2C-bus, one channel at a time
Power-up with all channels deselected except Channel 0 which is connected
Low Ron multiplexers
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
No glitch on power-up
Supports hot insertion
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant inputs
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
n Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
n Packages offered: SO24, TSSOP24, HVQFN24
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
3. Ordering information
Table 1.
Ordering information
Type number
Package
Name
Description
Version
PCA9547D
SO24
plastic small outline package; 24 leads;
body width 7.5 mm
SOT137-1
PCA9547PW
TSSOP24
plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
SOT355-1
PCA9547BS
HVQFN24
plastic thermal enhanced very thin quad flat package;
no leads; 24 terminals; body 4 × 4 × 0.85 mm
SOT616-1
3.1 Ordering options
Table 2.
Ordering options
Type number
Topside mark
Temperature range
PCA9547D
PCA9547D
Tamb = −40 °C to +85 °C
PCA9547PW
PCA9547
Tamb = −40 °C to +85 °C
PCA9547BS
9547
Tamb = −40 °C to +85 °C
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
2 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
4. Block diagram
PCA9547
SC0
SC1
SC2
SC3
SC4
SC5
SC6
SC7
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
VSS
VDD
RESET
SCL
SDA
SWITCH CONTROL LOGIC
RESET
CIRCUIT
INPUT
FILTER
A0
I2C-BUS
CONTROL
A1
A2
002aaa961
Fig 1. Block diagram of PCA9547
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
3 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
5. Pinning information
5.1 Pinning
A0
1
24 VDD
A0
1
A1
2
23 SDA
A1
2
24 VDD
23 SDA
RESET
3
22 SCL
RESET
3
22 SCL
SD0
4
21 A2
SD0
4
21 A2
SC0
5
20 SC7
SC0
5
20 SC7
SD1
6
19 SD7
SD1
6
SC1
7
18 SC6
SC1
7
SD2
8
17 SD6
SD2
8
17 SD6
SC2
9
16 SC5
SC2
9
16 SC5
SD3 10
15 SD5
SD3 10
15 SD5
SC3 11
14 SC4
SC3 11
14 SC4
VSS 12
13 SD4
VSS 12
13 SD4
PCA9547D
PCA9547PW
002aaa958
19 SD7
18 SC6
002aaa959
19 SCL
20 SDA
21 VDD
22 A0
terminal 1
index area
23 A1
Fig 3. Pin configuration for TSSOP24
24 RESET
Fig 2. Pin configuration for SO24
SD0
1
18 A2
SC0
2
17 SC7
SD1
3
SC1
4
SD2
5
14 SD6
SC2
6
13 SC5
16 SD7
15 SC6
SD5 12
9
VSS
SC4 11
8
SC3
SD4 10
7
SD3
PCA9547BS
002aaa960
Transparent top view
Fig 4. Pin configuration for HVQFN24 (transparent top view)
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
4 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
5.2 Pin description
Table 3.
Symbol
A0
Pin description
Pin
Description
SO, TSSOP
HVQFN
1
22
address input 0
A1
2
23
address input 1
RESET
3
24
active LOW reset input
SD0
4
1
serial data output 0
SC0
5
2
serial clock output 0
SD1
6
3
serial data output 1
SC1
7
4
serial clock output 1
SD2
8
5
serial data output 2
SC2
9
6
serial clock output 2
SD3
10
7
serial data output 3
SC3
11
8
serial clock output 3
VSS
12
9[1]
supply ground
SD4
13
10
serial data output 4
SC4
14
11
serial clock output 4
SD5
15
12
serial data output 5
SC5
16
13
serial clock output 5
SD6
17
14
serial data output 6
SC6
18
15
serial clock output 6
SD7
19
16
serial data output 7
SC7
20
17
serial clock output 7
A2
21
18
address input 2
SCL
22
19
serial clock line
SDA
23
20
serial data line
VDD
24
21
supply voltage
[1]
HVQFN package die supply ground is connected to both the VSS pin and the exposed center pad. The VSS
pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and
board-level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias need to be
incorporated in the PCB in the thermal pad region.
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
5 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
6. Functional description
6.1 Device addressing
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9547 is shown in Figure 5. To conserve power, no
internal pull-up resistors are incorporated on the hardware selectable address pins and
they must be pulled HIGH or LOW.
1
1
1
0
A2
fixed
A1
A0 R/W
hardware
selectable
002aaa962
Fig 5. Slave address
The last bit of the slave address defines the operation to be performed. When set to
logic 1 a read is selected, while a logic 0 selects a write operation.
6.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9547, which will be stored in the Control register. If multiple bytes are
received by the PCA9547, it will save the last byte received. This register can be written
and read via the I2C-bus.
channel selection bits
(read/write)
7
6
5
4
3
2
1
0
X
X
X
X
B3
B2
B1
B0
002aaa963
enable bit
Fig 6. Control register
6.2.1 Control register definition
A SCx/SDx downstream pair, or channel, is selected by the contents of the control
register. This register is written after the PCA9547 has been addressed. The 4 LSBs of
the control byte are used to determine which channel is to be selected. When a channel is
selected, the channel will become active after a STOP condition has been placed on the
I2C-bus. This ensures that all SCx/SDx lines will be in a HIGH state when the channel is
made active, so that no false conditions are generated at the time of connection.
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
6 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
Table 4.
Control register
Write = channel selection; Read = channel status
D7
D6
D5
D4
B3
B2
B1
B0
Command
X
X
X
X
0
X
X
X
no channel selected
X
X
X
X
1
0
0
0
channel 0 enabled
X
X
X
X
1
0
0
1
channel 1 enabled
X
X
X
X
1
0
1
0
channel 2 enabled
X
X
X
X
1
0
1
1
channel 3 enabled
X
X
X
X
1
1
0
0
channel 4 enabled
X
X
X
X
1
1
0
1
channel 5 enabled
X
X
X
X
1
1
1
0
channel 6 enabled
X
X
X
X
1
1
1
1
channel 7 enabled
0
0
0
0
1
0
0
0
channel 0 enabled;
power-up/reset default state
6.3 RESET input
The RESET input is an active LOW signal which may be used to recover from a bus fault
condition. By asserting this signal LOW for a minimum of tw(rst)L, the PCA9547 will reset its
register and I2C-bus state machine and will deselect all channels except channel 0. The
RESET input must be connected to VDD through a pull-up resistor.
6.4 Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9547 in
a reset condition until VDD has reached VPOR. At this point, the reset condition is released
and the PCA9547 register and I2C-bus state machine are initialized to their default states,
causing all the channels to be deselected except channel 0. Thereafter, VDD must be
lowered below 0.2 V to reset the device.
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
7 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
6.5 Voltage translation
The pass gate transistors of the PCA9547 are constructed such that the VDD voltage can
be used to limit the maximum voltage that will be passed from one I2C-bus to another.
002aab802
5.0
Vo(mux)
(V)
4.0
(1)
(2)
3.0
(3)
2.0
1.0
2.0
2.5
3.0
3.5
4.0
4.5
5.5
5.0
VDD (V)
(1) maximum
(2) typical
(3) minimum
Fig 7. Pass gate voltage as a function of supply voltage
Figure 7 shows the voltage characteristics of the pass gate transistors (note that the
PCA9547 is only tested at the points specified in Section 10 “Static characteristics” of this
data sheet). In order for the PCA9547 to act as a voltage translator, the Vo(mux) voltage
should be equal to, or lower than the lowest bus voltage. For example, if the main bus was
running at 5 V, and the downstream buses were 3.3 V and 2.7 V, then Vo(mux) should be
equal to or below 2.7 V to effectively clamp the downstream bus voltages. Looking at
Figure 7, we see that Vo(mux)(max) will be at 2.7 V when the PCA9547 supply voltage is
3.5 V or lower so the PCA9547 supply voltage could be set to 3.3 V. Pull-up resistors can
then be used to bring the bus voltages to their appropriate levels (see Figure 14).
More information can be found in Application Note AN262, PCA954X family of I2C/SMBus
multiplexers and switches.
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
8 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
7. Characteristics of the I2C-bus
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
7.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see Figure 8).
SDA
SCL
data line
stable;
data valid
change
of data
allowed
mba607
Fig 8. Bit transfer
7.1.1 START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (seeFigure 9.)
SDA
SDA
SCL
SCL
S
P
START condition
STOP condition
mba608
Fig 9. Definition of START and STOP conditions
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
9 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
7.2 System configuration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see Figure 10).
SDA
SCL
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
I2C-BUS
MULTIPLEXER
SLAVE
002aaa966
Fig 10. System configuration
7.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; setup and hold
times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
data output
by transmitter
not acknowledge
data output
by receiver
acknowledge
SCL from master
1
S
START
condition
2
8
9
clock pulse for
acknowledgement
002aaa987
Fig 11. Acknowledgement on the I2C-bus
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
10 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
7.4 Bus transactions
Data is transmitted to the PCA9547 control register using the Write mode as shown in
Figure 12.
slave address
SDA
S
1
1
1
0
A2
control register
A1
A0
START condition
0
R/W
A
X
X
X
X
B3
B2
acknowledge
from slave
B1
B0
A
P
acknowledge
from slave
STOP condition
002aaa988
Fig 12. Write control register
Data is read from PCA9547 using the Read mode as shown in Figure 13.
slave address
SDA
S
1
1
1
0
A2
START condition
last byte
control register
A1
A0
1
R/W
A
X
X
acknowledge
from slave
X
X
B3
B2
B1
B0
NA
P
no acknowledge
from master
STOP condition
002aaa989
Fig 13. Read control register
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
11 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
8. Application design-in information
VDD = 2.7 V to 5.5 V
VDD = 3.3 V
SDA
SDA
SD0
SCL
SCL
SC0
channel 0
V = 2.7 V to 5.5 V
RESET
I2C-bus/SMBus
master
V = 2.7 V to 5.5 V
SD1
channel 1
SC1
V = 2.7 V to 5.5 V
SD2
channel 2
SC2
V = 2.7 V to 5.5 V
SD3
channel 3
SC3
V = 2.7 V to 5.5 V
PCA9547
SD4
channel 4
SC4
V = 2.7 V to 5.5 V
SD5
channel 5
SC5
V = 2.7 V to 5.5 V
SD6
channel 6
SC6
V = 2.7 V to 5.5 V
A2
A1
A0
SD7
VSS
SC7
channel 7
002aaa965
Fig 14. Typical application
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
12 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol
Parameter
VDD
Min
Max
Unit
supply voltage
−0.5
+7.0
V
VI
input voltage
−0.5
+7.0
V
II
input current
−20
+20
mA
IO
output current
−25
+25
mA
IDD
supply current
−100
+100
mA
ISS
ground supply current
−100
+100
mA
Ptot
total power dissipation
-
400
mW
Tstg
storage temperature
−60
+150
°C
Tamb
ambient temperature
−40
+85
°C
[1]
Conditions
The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperatures which are detrimental to reliability. The maximum junction
temperature of this integrated circuit should not exceed 150 °C.
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
13 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
10. Static characteristics
Table 6.
Static characteristics
VDD = 2.3 V to 3.6 V; VSS = 0 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
See Table 7 on page 15 for VDD = 4.5 V to 5.5 V.[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
2.3
-
3.6
V
Supply
VDD
supply voltage
IDD
supply current
operating mode; VDD = 3.6 V; no load;
VI = VDD or VSS; fSCL = 100 kHz
-
20
50
µA
Istb
standby current
Standby mode; VDD = 3.6 V; no load;
VI = VDD or VSS
-
0.1
2
µA
VPOR
power-on reset voltage
no load; VI = VDD or VSS
-
1.6
2.1
V
[2]
Input SCL; input/output SDA
VIL
LOW-level input voltage
−0.5
-
+0.3VDD
V
VIH
HIGH-level input voltage
0.7VDD
-
6
V
IOL
LOW-level output current
VOL = 0.4 V
3
-
-
mA
VOL = 0.6 V
6
-
-
mA
IL
leakage current
VI = VDD or VSS
−1
-
+1
µA
Ci
input capacitance
VI = VSS
-
14
19
pF
−0.5
-
+0.3VDD
V
Select inputs A0, A1, A2, RESET
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
0.7VDD
-
VDD + 0.5
V
ILI
input leakage current
pin at VDD or VSS
−1
-
+1
µA
Ci
input capacitance
VI = VSS
-
2
5
pF
ON-state resistance
multiplexer; VDD = 3.6 V; VO = 0.4 V;
IO = 15 mA
5
11
30
Ω
multiplexer; VDD = 2.3 V to 2.7 V;
VO = 0.4 V; IO = 10 mA
7
16
55
Ω
Pass gate
Ron
Vo(mux)
multiplexer output voltage Vi(mux) = VDD = 3.3 V; Io(mux) = −100 µA
-
1.9
-
V
Vi(mux) = VDD = 3.0 V to 3.6 V;
Io(mux) = −100 µA
1.6
-
2.8
V
Vo(mux) = VDD = 2.5 V;
Io(mux) = −100 µA
-
1.5
-
V
Vo(mux) = VDD = 2.3 V to 2.7 V;
Io(mux) = −100 µA
0.9
-
2.0
V
IL
leakage current
VI = VDD or VSS
−1
-
+1
µA
Cio
input/output capacitance
VI = VSS
-
3
5
pF
[1]
For operation between published voltage ranges, refer to the worst-case parameter in both ranges.
[2]
VDD must be lowered to 0.2 V in order to reset part.
PCA9547_2
Product data sheet
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
14 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
Table 7.
Static characteristics
VDD = 4.5 V to 5.5 V; VSS = 0 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
See Table 6 on page 14 for VDD = 2.3 V to 3.6 V.[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
4.5
-
5.5
V
Supply
VDD
supply voltage
IDD
supply current
operating mode; VDD = 5.5 V;
no load; VI = VDD or VSS;
fSCL = 100 kHz
-
65
100
µA
Istb
standby current
Standby mode; VDD = 5.5 V;
no load; VI = VDD or VSS
-
0.6
2
µA
VPOR
power-on reset voltage
no load; VI = VDD or VSS
-
1.7
2.1
V
[2]
Input SCL; input/output SDA
VIL
LOW-level input voltage
−0.5
-
+0.3VDD
V
VIH
HIGH-level input voltage
0.7VDD
-
6
V
IOL
LOW-level output current
VOL = 0.4 V
3
-
-
mA
VOL = 0.6 V
6
-
-
mA
IIL
LOW-level input current
VI = VSS
1
-
1
µA
IIH
HIGH-level input current
VI = VSS
1
-
1
µA
Ci
input capacitance
VI = VSS
-
14
19
pF
Select inputs A0, A1, A2, RESET
VIL
LOW-level input voltage
−0.5
-
+0.3VDD
V
VIH
HIGH-level input voltage
0.7VDD
-
VDD + 0.5
V
ILI
input leakage current
pin at VDD or VSS
−1
-
+1
µA
Ci
input capacitance
VI = VSS
-
2
5
pF
Ron
ON-state resistance
multiplexer; VDD = 4.5 V to 5.5 V;
VO = 0.4 V; IO = 15 mA
4
9
24
Ω
Vo(mux)
multiplexer output voltage
Vi(mux) = VDD = 5.0 V;
Io(mux) = −100 µA
-
3.6
-
V
Vi(mux) = VDD = 4.5 V to 5.5 V;
Io(mux) = −100 µA
2.6
-
4.5
V
Pass gate
IL
leakage current
VI = VDD or VSS
−1
-
+1
µA
Cio
input/output capacitance
VI = VSS
-
3
5
pF
[1]
For operation between published voltage ranges, refer to the worst-case parameter in both ranges.
[2]
VDD must be lowered to 0.2 V in order to reset part.
PCA9547_2
Product data sheet
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15 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Symbol
Parameter
Conditions
Standard-mode
I2C-bus
from SDA to SDn,
or SCL to SCn
Fast-mode I2C-bus
Unit
Min
Max
Min
Max
-
0.3[1]
-
0.3[1]
ns
0
100
0
400
kHz
4.7
-
1.3
-
µs
4.0
-
0.6
-
µs
tPD
propagation delay
fSCL
SCL clock frequency
tBUF
bus free time between a STOP and
START condition
tHD;STA
hold time (repeated) START condition
tLOW
LOW period of the SCL clock
4.7
-
1.3
-
µs
tHIGH
HIGH period of the SCL clock
4.0
-
0.6
-
µs
tSU;STA
set-up time for a repeated START
condition
4.7
-
0.6
-
µs
tSU;STO
set-up time for STOP condition
4.0
-
0.6
-
µs
tHD;DAT
data hold time
0[3]
3.45
0[3]
0.9
µs
[2]
tSU;DAT
data set-up time
250
-
100
-
ns
tr
rise time of both SDA and SCL signals
-
1000
20 + 0.1Cb[4]
300
ns
tf
fall time of both SDA and SCL signals
-
300
20 + 0.1Cb[4]
300
µs
Cb
capacitive load for each bus line
-
400
-
400
µs
tSP
pulse width of spikes that must be
suppressed by the input filter
-
50
-
50
ns
tVD;DAT
data valid time
HIGH-to-LOW
[5]
-
1
-
1
µs
LOW-to-HIGH
[5]
-
0.6
-
0.6
µs
data valid acknowledge time
-
1
-
1
µs
tw(rst)L
LOW-level reset time
4
-
4
-
ns
trst
reset time
500
-
500
-
ns
trec(rst)
reset recovery time
0
-
0
-
ns
tVD:ACK
RESET
SDA clear
[1]
Pass gate propagation delay is calculated from the 20 Ω typical Ron and the 15 pF load capacitance.
[2]
After this period, the first clock pulse is generated.
[3]
A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIH(min) of the SCL signal) in order to
bridge the undefined region of the falling edge of SCL.
[4]
Cb = total capacitance of one bus line in pF.
[5]
Measurements taken with 1 kΩ pull-up resistor and 50 pF load.
PCA9547_2
Product data sheet
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16 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
SDA
tr
tBUF
tf
tHD;STA
tSP
tLOW
SCL
tHD;STA
P
tSU;STA
tHD;DAT
S
tHIGH
tSU;DAT
tSU;STO
Sr
P
002aaa986
Fig 15. Definition of timing on the I2C-bus
ACK or read cycle
START
SCL
70 %
SDA
trst
RESET
50 %
50 %
trec(rst)
50 %
tw(rst)L
002aac314
Fig 16. Definition of RESET timing
PCA9547_2
Product data sheet
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Rev. 02 — 12 September 2006
17 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
12. Package outline
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
HE
y
v M A
Z
24
13
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
12
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.01
0.019 0.013
0.014 0.009
0.61
0.60
0.30
0.29
0.05
0.419
0.043
0.055
0.394
0.016
inches
0.1
0.012 0.096
0.004 0.089
0.043
0.039
0.01
0.01
Z
(1)
0.9
0.4
0.035
0.004
0.016
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT137-1
075E05
MS-013
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 17. SO24 package outline (SOT137-1)
PCA9547_2
Product data sheet
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Rev. 02 — 12 September 2006
18 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
D
SOT355-1
E
A
X
c
HE
y
v M A
Z
13
24
Q
A2
(A 3)
A1
pin 1 index
A
θ
Lp
L
1
12
bp
e
detail X
w M
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
7.9
7.7
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.5
0.2
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT355-1
REFERENCES
IEC
JEDEC
JEITA
MO-153
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 18. TSSOP24 package outline (SOT355-1)
PCA9547_2
Product data sheet
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Rev. 02 — 12 September 2006
19 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
HVQFN24: plastic thermal enhanced very thin quad flat package; no leads;
24 terminals; body 4 x 4 x 0.85 mm
A
B
D
SOT616-1
terminal 1
index area
A
A1
E
c
detail X
e1
C
1/2 e
e
12
y
y1 C
v M C A B
w M C
b
7
L
13
6
e
e2
Eh
1/2 e
1
18
terminal 1
index area
24
19
X
Dh
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A(1)
max.
A1
b
c
D (1)
Dh
E (1)
Eh
e
e1
e2
L
v
w
y
y1
mm
1
0.05
0.00
0.30
0.18
0.2
4.1
3.9
2.25
1.95
4.1
3.9
2.25
1.95
0.5
2.5
2.5
0.5
0.3
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT616-1
---
MO-220
---
EUROPEAN
PROJECTION
ISSUE DATE
01-08-08
02-10-22
Fig 19. HVQFN24 package outline (SOT616-1)
PCA9547_2
Product data sheet
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Rev. 02 — 12 September 2006
20 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
13. Soldering
13.1 Introduction to soldering surface mount packages
There is no soldering method that is ideal for all surface mount IC packages. Wave
soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is recommended.
13.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and
binding agent) to be applied to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement. Driven by legislation and
environmental forces the worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example, convection or convection/infrared
heating in a conveyor type oven. Throughput times (preheating, soldering and cooling)
vary between 100 seconds and 200 seconds depending on heating method.
Typical reflow temperatures range from 215 °C to 260 °C depending on solder paste
material. The peak top-surface temperature of the packages should be kept below:
Table 9.
SnPb eutectic process - package peak reflow temperatures (from J-STD-020C
July 2004)
Package thickness
Volume mm3 < 350
Volume mm3 ≥ 350
< 2.5 mm
240 °C + 0/−5 °C
225 °C + 0/−5 °C
≥ 2.5 mm
225 °C + 0/−5 °C
225 °C + 0/−5 °C
Table 10.
Pb-free process - package peak reflow temperatures (from J-STD-020C July
2004)
Package thickness
Volume mm3 < 350
Volume mm3 350 to
2000
Volume mm3 > 2000
< 1.6 mm
260 °C + 0 °C
260 °C + 0 °C
260 °C + 0 °C
1.6 mm to 2.5 mm
260 °C + 0 °C
250 °C + 0 °C
245 °C + 0 °C
≥ 2.5 mm
250 °C + 0 °C
245 °C + 0 °C
245 °C + 0 °C
Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
13.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices
(SMDs) or printed-circuit boards with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically
developed.
If wave soldering is used the following conditions must be observed for optimal results:
• Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
PCA9547_2
Product data sheet
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21 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
– larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be
parallel to the transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the
transport direction of the printed-circuit board.
The footprint must incorporate solder thieves at the downstream end.
• For packages with leads on four sides, the footprint must be placed at a 45° angle to
the transport direction of the printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must be fixed with a droplet of
adhesive. The adhesive can be applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C
or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most
applications.
13.4 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage
(24 V or less) soldering iron applied to the flat part of the lead. Contact time must be
limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be soldered in one operation within
2 seconds to 5 seconds between 270 °C and 320 °C.
13.5 Package related soldering information
Table 11.
Suitability of surface mount IC packages for wave and reflow soldering methods
Package[1]
Soldering method
Wave
Reflow[2]
BGA, HTSSON..T[3], LBGA, LFBGA, SQFP,
SSOP..T[3], TFBGA, VFBGA, XSON
not suitable
suitable
DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP,
HSQFP, HSSON, HTQFP, HTSSOP, HVQFN,
HVSON, SMS
not suitable[4]
suitable
PLCC[5], SO, SOJ
suitable
suitable
not
recommended[5][6]
suitable
SSOP, TSSOP, VSO, VSSOP
not
recommended[7]
suitable
CWQCCN..L[8],
not suitable
LQFP, QFP, TQFP
PMFP[9],
WQCCN..L[8]
[1]
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026);
order a copy from your Philips Semiconductors sales office.
[2]
All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the
maximum temperature (with respect to time) and body size of the package, there is a risk that internal or
external package cracks may occur due to vaporization of the moisture in them (the so called popcorn
effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit
Packages; Section: Packing Methods.
PCA9547_2
Product data sheet
not suitable
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Rev. 02 — 12 September 2006
22 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
[3]
These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no
account be processed through more than one soldering cycle or subjected to infrared reflow soldering with
peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package
body peak temperature must be kept as low as possible.
[4]
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the
solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink
on the top side, the solder might be deposited on the heatsink surface.
[5]
If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave
direction. The package footprint must incorporate solder thieves downstream and at the side corners.
[6]
Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
[7]
Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger
than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
[8]
Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered
pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by
using a hot bar soldering process. The appropriate soldering profile can be provided on request.
[9]
Hot bar soldering or manual soldering is suitable for PMFP packages.
14. Abbreviations
Table 12.
Abbreviations
Acronym
Description
CDM
Charged Device Model
ESD
ElectroStatic Discharge
HBM
Human Body Model
I2C-bus
Inter-Integrated Circuit bus
LSB
Least Significant Bit
MM
Machine Model
PCB
Printed-Circuit Board
SMBus
System Management Bus
PCA9547_2
Product data sheet
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Rev. 02 — 12 September 2006
23 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
15. Revision history
Table 13.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PCA9547_2
20060912
Product data sheet
-
PCA9547_1
Modifications:
PCA9547_1
(9397 750 13369)
•
•
•
changed Section 4 “Marking” to Section 3.1 “Ordering options”
•
Table 6 “Static characteristics”, sub-section “Pass gate”, symbol Ron, first Conditions row:
changed “VDD = 3.67 V” to “VDD = 3.6 V”
•
Table 8 “Dynamic characteristics”: changed symbol/parameter “tREC:STA, recovery time to START
condition” to “trec(rst), reset recovery time”
•
•
•
added new Figure 16 “Definition of RESET timing”
Section 6.3 “RESET input”, second sentence: changed symbol “tWL” to “tw(rst)L”
Table 6 “Static characteristics” and Table 7 “Static characteristics”: changed parameter
description of symbol Ron from “multiplexer resistance” to “ON-state resistance” (moved
“multiplexer” to Conditions column)
(old) Section 12 “Application information” moved to Section 8 “Application design-in information”
Figure 14 “Typical application” modified at power supply connections between bus master and
PCA9547
20051005
Product data sheet
-
PCA9547_2
Product data sheet
-
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rev. 02 — 12 September 2006
24 of 26
PCA9547
Philips Semiconductors
8-channel I2C-bus multiplexer with reset
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.semiconductors.philips.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Philips Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Philips Semiconductors
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, Philips Semiconductors does not give any representations
or warranties, expressed or implied, as to the accuracy or completeness of
such information and shall have no liability for the consequences of use of
such information.
Right to make changes — Philips Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — Philips Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a Philips Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. Philips Semiconductors accepts no liability for inclusion and/or use
of Philips Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Philips Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — Philips Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.semiconductors.philips.com/profile/terms, including those
pertaining to warranty, intellectual property rights infringement and limitation
of liability, unless explicitly otherwise agreed to in writing by Philips
Semiconductors. In case of any inconsistency or conflict between information
in this document and such terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of Koninklijke Philips Electronics N.V.
17. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: [email protected]
PCA9547_2
Product data sheet
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Rev. 02 — 12 September 2006
25 of 26
Philips Semiconductors
PCA9547
8-channel I2C-bus multiplexer with reset
18. Contents
1
2
3
3.1
4
5
5.1
5.2
6
6.1
6.2
6.2.1
6.3
6.4
6.5
7
7.1
7.1.1
7.2
7.3
7.4
8
9
10
11
12
13
13.1
13.2
13.3
13.4
13.5
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 6
Device addressing . . . . . . . . . . . . . . . . . . . . . . 6
Control register . . . . . . . . . . . . . . . . . . . . . . . . . 6
Control register definition . . . . . . . . . . . . . . . . . 6
RESET input . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . 7
Voltage translation . . . . . . . . . . . . . . . . . . . . . . 8
Characteristics of the I2C-bus. . . . . . . . . . . . . . 9
Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
START and STOP conditions . . . . . . . . . . . . . . 9
System configuration . . . . . . . . . . . . . . . . . . . 10
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 10
Bus transactions . . . . . . . . . . . . . . . . . . . . . . . 11
Application design-in information . . . . . . . . . 12
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 13
Static characteristics. . . . . . . . . . . . . . . . . . . . 14
Dynamic characteristics . . . . . . . . . . . . . . . . . 16
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Introduction to soldering surface mount
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 21
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 21
Manual soldering . . . . . . . . . . . . . . . . . . . . . . 22
Package related soldering information . . . . . . 22
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24
Legal information. . . . . . . . . . . . . . . . . . . . . . . 25
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Contact information. . . . . . . . . . . . . . . . . . . . . 25
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© Koninklijke Philips Electronics N.V. 2006.
All rights reserved.
For more information, please visit: http://www.semiconductors.philips.com.
For sales office addresses, email to: [email protected].
Date of release: 12 September 2006
Document identifier: PCA9547_2