M74HC390 Dual decade counter Features ■ HIgh Speed: fMAX = 79MHz (Typ.) at VCC = 6V ■ Low power dissipation: ICC = 4µA (Max.) at TA = 25°C ■ High noise immunity: VNIH = VNIL = 28 % VCC (Min.) ■ Balanced propagation delays: tPLH ≅ tPHL ■ Wide operating voltage range: VCC (Opr) = 2V to 6V ■ Pin and function compatible with 74 series 390 DIP-16 SO-16 Description The M74HC390 is an high speed CMOS dual decade counter fabricated with silicon gate C2MOS technology. This dual decade counter contains two independent ripple carry counters. Each counter is composed of a divide by two and divide by five counter. The divide by two and divide by five counters can be cascaded to form dual decade, dual biquinary, or various combination up to a single divide by 100 counter. Each 4-bit counter is increased on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set low all four bits of each counter are set to low. This enables count truncation and allows the implementation of divide by N counter configuration. All inputs are equipped with protection circuits against static discharge and transient excess voltage. Order codes Part number Package Packaging M74HC390B1R DIP-14 Tube M74HC390RM13TR SO-14 Tape and reel July 2006 Rev 2 1/17 www.st.com 17 Contents M74HC390 Contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Block and logic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Timing chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 M74HC390 Pin settings 1 Pin settings 1.1 Pin connection Figure 1. 1.2 Pin connection (top through view) Pin description Table 1. Pin description Pin N° 1, 15 2, 14 3, 5, 6, 7 4, 12 Symbol Name and function 1 CLOCK A Clock input divide by 2 section (HIGH to LOW Edge-Triggered) 2 CLOCK B 1 CLEAR 2 CLEAR Asynchronous master reset inputs 1QA to 1QD Flip flop outputs 1 CLOCK A Clock input divide by 5 section (HIGH to LOW Edge-Triggered) 2 CLOCK B 13, 11, 10, 9 2QA to 2QD Flip flop outputs 8 GND Ground (0V) 16 Vcc Positive supply voltage 3/17 Device summary 2 4/17 M74HC390 Device summary Figure 2. IInput and output equivalent circuit Figure 3. Logic diagram M74HC390 3 Truth table Truth table Table 2. Truth table Outputs BCD COUNT (1) COUNT BI-QUINARY (2) QD QC QB QA QA QD QC QB 0 L L L L L L L L 1 L L L H L L L H 2 L L H L L L H L 3 L L H H L L H H 4 L H L L L H L L 5 L H L H H H L L 6 L H H L H L L H 7 L H H H H L H L 8 H L L L H L H H 9 H L L H H H L L 1. Output QA is connected to input CLOCK B for BCD count. 2. Output QD is connected to input CLOCK A for bi-quinary count. Table 3. Truth table Inputs Outputs CLOCK A CLOCK B CLEAR QA QB QC QD X X H L L L L X L BINARY COUNT UP L QUINARY COUNT UP X 5/17 Block and logic diagrams 4 Note: 6/17 Block and logic diagrams Figure 4. Block diagram Figure 5. Logic diagram This logic diagram has not be used to estimate propagation delays M74HC390 M74HC390 5 Timing chart Timing chart Figure 6. Timing chart 7/17 Maximum rating 6 M74HC390 Maximum rating Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Absolute maximum ratings Symbol VCC Parameter Supply voltage Value Unit -0.5 to +7 V VI DC input voltage -0.5 to VCC + 0.5 V VO DC output voltage -0.5 to VCC + 0.5 V IIK DC input diode current ± 20 mA IOK DC output diode current ± 20 mA IO DC output current ± 25 mA DC VCC or ground current ± 50 mA 500(1) mW -65 to +150 °C 300 °C ICC or IGND PD Power dissipation Tstg Storage temperature TL Lead temperature (10 sec) 1. 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 6.1 Recommended operating conditions Table 5. Recommended operating conditions Symbol VCC Supply voltage Value Unit 2 to 6 V VI Input voltage 0 to VCC V VO Output voltage 0 to VCC V Top Operating temperature -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns tr, tf 8/17 Parameter Input rise and fall time M74HC390 7 Electrical characteristics Electrical characteristics Table 6. DC specifications Test condition Symbol Parameter VIH VIL VOH VOL High level input voltage Low level input voltage High level output voltage Low level output voltage Value TA = 25°C -40 to 85°C -55 to 125°C Unit VCC (V) Min Typ Max Min 2.0 1.5 1.5 1.5 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 Max Min Max V 2.0 0.5 0.5 0.5 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 V 2.0 IO=-20µA 1.9 2.0 1.9 1.9 4.5 IO=-20µA 4.4 4.5 4.4 4.4 6.0 IO=-20µA 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 6.0 IO=-5.2 mA 5.68 5.63 5.60 2.0 IO=20µA 0.0 0.1 0.1 0.1 4.5 IO=20µA 0.0 0.1 0.1 0.1 6.0 IO=20µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ±0.1 ±1 ±1 µA ±0.5 ±5 ±10 µA 1 10 20 µA II Input leakage current IOZ Output leakage current 6.0 VI = VIH or VIL VO = VCC or GND ICC Quiescent supply current 6.0 VI = VCC or GND 5.8 V V 9/17 Electrical characteristics M74HC390 Table 7. AC electrical characteristics (CL = 50 pF, Input tr = tf = 6ns) Test condition Symbol Parameter Output transition tTLH tTHL time tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL fMAX fMAX tW(H) tW(L) tW(H) tREM 10/17 Propagation delay time (CLOCK A - QA) Propagation delay time (CLOCK AQB,QD) Propagation delay time (CLOCK A - QC) Propagation delay time (CLOCK B - QC) Propagation delay time (CLEAR Qn) Maximum clock frequency (CLOCK A - QA) Maximum clock frequency (CLOCK B - QB) Minimum pulse width (CLOCK) Minimum pulse width (CLEAR) Minimum removal time Value TA = 25°C VCC (V) -55 to 125°C Unit Min Min Typ Max 2.0 30 75 95 110 4.5 8 15 19 22 6.0 7 13 16 19 2.0 42 120 150 180 4.5 14 24 30 36 6.0 12 20 26 31 2.0 45 120 150 180 4.5 15 24 30 36 6.0 13 20 26 31 2.0 108 280 350 420 36 56 70 84 6.0 31 48 60 71 2.0 72 185 230 280 4.5 24 37 46 56 6.0 20 31 39 48 2.0 45 125 155 190 4.5 15 25 31 38 6.0 13 21 26 32 4.5 Min -40 to 85°C QA Connected to CKB Max 2.0 8.4 17 6.8 5.6 4.5 42 65 34 28 6.0 50 79 40 33 2.0 8.4 17 6.8 5.6 4.5 42 67 34 28 6.0 50 79 40 33 Max ns ns ns ns ns ns MHz MHz 2.0 24 75 95 110 4.5 6 15 19 22 6.0 5 13 16 19 2.0 24 75 95 110 4.5 6 15 19 22 6.0 5 13 16 19 2.0 25 30 35 4.5 5 6 7 6.0 5 5 6 ns ns ns M74HC390 Electrical characteristics Table 8. Capacitive characteristics Test condition Symbol Parameter CIN Input capacitance CPD Power dissipation capacitance VCC (V) Value TA = 25°C Min Typ Max 5 10 -40 to 85°C -55 to 125°C Min Min Max 10 Unit Max 10 84 pF pF (1) 1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC 11/17 Test circuit 8 M74HC390 Test circuit Figure 7. Note: Test circuit CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) 9 Waveforms Figure 8. 12/17 Clock waveform (f = 1MHz; 50% duty cycle) M74HC390 10 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 13/17 Package mechanical data M74HC390 Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 14/17 M74HC390 Package mechanical data SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 0.004 0.010 0.46 0.013 0.018 0.25 0.007 1.64 b 0.35 b1 0.19 C MAX. 0.063 0.5 0.010 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) 0016020D 15/17 Revision history 11 M74HC390 Revision history Table 9. Revision history 16/17 Date Revision Changes 07-Aug-2001 1 First Release 21-Jul-2006 2 New template, deleted TSSOP16 package information M74HC390 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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