MJD32C Low voltage PNP power transistor Features ■ NPN type is MJD31C ■ Surface-mounting TO-252 power package in tape & reel Applications ■ 3 1 General purpose switching and amplifier Description DPAK TO-252 The device is manufactured in Planar technology with “Base Island” layout. The resulting transistor shows exceptional high gain performance coupled with very low saturation voltage. Table 1. Figure 1. Internal schematic diagram Order code Part number Marking Package Packaging MJD32CT4 MJD32C DPAK Tape & reel June 2007 Rev 1 1/9 www.st.com 9 Electrical ratings 1 MJD32C Electrical ratings Table 2. Absolute maximum rating Symbol Value Unit VCBO Collector-base voltage (IE = 0) -100 V VCEO Collector-base voltage (IB = 0) -100 V VEBO Emitter-base voltage (IC = 0) -5 V Collector current -3 A Collector peak current -5 A Base current -1 A PTOT Total dissipation at Tc = 25°C 15 W Tstg Storage temperature -65 to 150 °C 150 °C IC ICM IB TJ 2/9 Parameter Max. operating junction temperature MJD32C 2 Electrical characteristics Electrical characteristics (Tcase = 25°C unless otherwise specified) Table 3. Symbol Electrical characteristics Parameter Test Conditions Min. Typ. Max. Unit ICES Collector cut-off current (VBE = 0) VCE =-100V -20 µA ICEO Collector cut-off current (IB = 0) VCB =-60V -50 µA IEBO Emitter cut-off current (IC = 0) VEB =-5V -0.1 mA Collector-emitter VCEO(sus) (1) sustaining voltage (IB = 0) IC =-30mA -100 V VCE(sat) (1) Collector-emitter saturation voltage IC =-3A _ IB =-375mA -1.2 V VBE(on) (1) Base-emitter on voltage IC =-3A _ VCE=-4V -1.8 V DC current gain IC =-1A IC = -3A hFE VCE =-4V VCE =-4V 25 10 50 1. Note (1) Pulsed duration = 300 ms, duty cycle £1.5% 2.1 Electrical characteristic (curves) Figure 2. Safe operating area Figure 3. Derating curve 3/9 Electrical characteristics 4/9 MJD32C Figure 4. DC current gain Figure 5. DC current gain Figure 6. Collector-emitter saturation voltage Figure 7. Base-emitter saturation voltage Figure 8. Collector-emitter on voltage Figure 9. Resistive load switching time MJD32C Electrical characteristics Figure 10. Resistive load switching time 2.2 Test circuits Figure 11. Resistive load switching test circuit 1) Fast electronic switch 2) Non-inductive resistor 5/9 Package mechanical data 3 MJD32C Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 6/9 MJD32C Package mechanical data TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 1.00 0.024 L2 L4 V2 0.8 0.60 0 o 0.031 8 o 0 o 0.039 0o P032P_B 7/9 Revision history 4 MJD32C Revision history Table 4. 8/9 Revision history Date Revision 25-Jun-2007 1 Changes Initial release. MJD32C Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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