STD65N55F3 N-channel 55V - 8.0mΩ - 65A - DPAK STripFET™ Power MOSFET General features Type VDSS RDS(on) ID Pw STD65N55F3 55V <10.5mΩ 65A 110W ■ Standard threshold drive ■ 100% avalanche tested 3 1 DPAK Description This n-channel enhancement mode Power MOSFET is the latest refinement of STMicroelectronics' unique “Single Feature Size™“ strip-based process, which has decreased the critical alignment steps, offering remarkable manufacturing reproducibility. The outcome is a transistor with extremely high packing density for low onresistance, rugged avalanche characteristics and low gate charge. Internal schematic diagram Applications ■ Switching application – Automotive Order code Part number Marking Package Packaging STD65N55F3 65N55F3 DPAK Tape & reel February 2007 Rev 2 1/13 www.st.com 13 Contents STD65N55F3 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 ................................................ 8 STD65N55F3 1 Electrical ratings Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter VDS Drain-source voltage (VGS=0) VGS Gate-Source voltage Value Unit 55 V ± 20 V ID Drain current (continuous) at TC = 25°C 65 A ID Drain current (continuous) at TC = 100°C 46 A IDM (1) Drain current (pulsed) 260 A PTOT Total dissipation at TC = 25°C 110 W Derating factor 0.73 W/°C dv/dt (2) Peak diode recovery voltage slope 11 V/ns EAS (3) Single pulse avalanche energy 390 mJ Tj Operating junction temperature Storage temperature -55 to 175 °C Tstg 1. Pulse width limited by safe operating area 2. ISD ≤65A, di/dt ≤300A/µs, VDD < V(BR)DSS. Tj < Tjmax 3. Starting Tj = 25°C, Id = 32A, Vdd = 25V Table 2. Symbol Rthj-case Thermal resistance Parameter Thermal resistance junction-case max Rthj-pcb (1) Thermal resistance junction-pcb max Tl Maximum lead temperature for soldering purpose Value Unit 1.36 °C/W 50 °C/W 275 °C 1. When mounted on FR-4 board of 1inch², 2oz Cu. 3/13 Electrical characteristics 2 STD65N55F3 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 3. Symbol V(BR)DSS Static Parameter Drain-source breakdown Voltage Test conditions ID = 250µA, VGS= 0 55 V VDS = Max rating, VDS = Max rating,Tc = 125°C 10 100 µA µA Gate body leakage current (VDS = 0) VGS = ±20V ±200 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 250µA 4 V RDS(on) Static drain-source on resistance VGS= 10V, ID= 32A 10.5 mΩ IDSS Zero gate voltage drain current (VGS = 0) IGSS Table 4. Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd 2 8.0 Dynamic Parameter Test conditions Forward transconductance VDS =25V, ID=32A Input capacitance Output capacitance Reverse transfer capacitance VDS =25V, f=1MHz, VGS=0 Total gate charge Gate-source charge Gate-drain charge VDD=27V, ID = 65A VGS =10V (see Figure 15) 1. Pulsed: pulse duration = 300µs, duty cycle 1.5% 4/13 Min. Typ. Max. Unit Min Typ. Max. Unit 50 S 2200 500 25 pF pF pF 33.5 12.5 9.5 45 nC nC nC STD65N55F3 Electrical characteristics Table 5. Symbol td(on) tr td(off) tf Table 6. Symbol ISD Switching on/off (inductive load) Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD=27V, ID= 32A, RG=4.7Ω, VGS=10V (see Figure 14) VDD=27V, ID= 32A, RG=4.7Ω, VGS=10V (see Figure 14) Parameter Test conditions VSD Forward on voltage ISD=65A, VGS=0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD=65A, di/dt =100A/µs, VDD=25V, Tj=150°C IRRM Max. Unit 20 50 ns ns 35 11.5 ns ns Min. Typ. Source-drain current Source-drain current (pulsed)(1) Qrr Typ. Source drain diode ISDM trr Min. (see Figure 16) 47 87 3.7 Max. Unit 65 260 A A 1.5 V ns nC A 1. Pulsed: pulse duration = 300µs, duty cycle 1.5% 5/13 Electrical characteristics STD65N55F3 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characteristics Figure 4. Transfer characteristics Figure 5. Normalized BVDSS vs temperature Figure 6. Static drain-source on resistance 6/13 STD65N55F3 Electrical characteristics Figure 7. Gate charge vs gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs temperature Capacitance variations Figure 10. Normalized on resistance vs temperature Figure 11. Source-drain diode forward characteristics 7/13 Test circuit 3 STD65N55F3 Test circuit Figure 12. Unclamped inductive load test circuit Figure 13. Unclamped inductive waveform Figure 14. Switching times test circuit for resistive load Figure 15. Gate charge test circuit Figure 16. Test circuit for inductive load Figure 17. Switching time waveform switching and diode recovery times 8/13 STD65N55F3 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/13 Package mechanical data STD65N55F3 DPAK MECHANICAL DATA mm. inch DIM. MAX. MIN. A A1 A2 B b4 MIN. 2.2 0.9 0.03 0.64 5.2 TYP 2.4 1.1 0.23 0.9 5.4 0.086 0.035 0.001 0.025 0.204 0.094 0.043 0.009 0.035 0.212 C C2 D D1 E E1 e e1 H L (L1) L2 L4 R V2 0.45 0.48 6 0.6 0.6 6.2 0.017 0.019 0.236 0.023 0.023 0.244 6.6 0.252 5.1 6.4 0.173 0.368 0.039 2.8 0.8 0.181 0.397 0.110 0.031 1 0.023 0.2 0° 0.260 0.185 0.090 4.6 10.1 0.6 MAX. 0.200 4.7 2.28 4.4 9.35 1 TYP. 0.039 0.008 8° 0° 8° 0068772-F 10/13 STD65N55F3 5 Packaging mechanical data Packaging mechanical data DPAK FOOTPRINT All dimensions are in millimeters TAPE AND REEL SHIPMENT REEL MECHANICAL DATA DIM. mm MIN. A B 1.5 C 12.8 D 20.2 G 16.4 N 50 T TAPE MECHANICAL DATA DIM. mm inch MIN. MAX. A0 6.8 7 0.267 0.275 B0 10.4 10.6 0.409 0.417 B1 D 1.5 D1 1.5 E 1.65 MIN. 12.1 0.476 1.6 0.059 0.063 1.85 0.065 0.073 7.4 7.6 0.291 0.299 2.55 2.75 0.100 0.108 0.153 0.161 P0 3.9 4.1 P1 7.9 8.1 0.311 0.319 P2 1.9 2.1 0.075 0.082 40 15.7 MAX. 330 12.992 13.2 0.504 0.520 18.4 0.645 0.724 0.059 0.795 1.968 22.4 0.881 BASE QTY BULK QTY 2500 2500 0.059 F R MIN. MAX. K0 W inch MAX. 1.574 16.3 0.618 0.641 11/13 Revision history 6 STD65N55F3 Revision history Table 7. 12/13 Revision history Date Revision Changes 08-Feb-2007 1 First release 22-Feb-2007 2 Description has been changed STD65N55F3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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