SN54ACT244, SN74ACT244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS517B – JUNE 1995 – REVISED MAY 1996 D SN54ACT244 . . . J OR W PACKAGE SN74ACT244 . . . DB, DW, N, OR PW PACKAGE (TOP VIEW) Inputs Are TTL Compatible EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and Flat (W) Packages, Ceramic Chip Carriers (FK), and Plastic (N) and Ceramic (J) DIPs 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND description These octal buffers/drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 SN54ACT244 . . . FK PACKAGE (TOP VIEW) 2Y4 1A1 1OE VCC The ’ACT244 are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. 1A2 2Y3 1A3 2Y2 1A4 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 The SN54ACT244 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ACT244 is characterized for operation from –40°C to 85°C. 2OE D D FUNCTION TABLE (each buffer) INPUTS OE A OUTPUT Y L H H L L L H X Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ACT244, SN74ACT244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS517B – JUNE 1995 – REVISED MAY 1996 logic symbol† 1 1OE 1A1 1A2 1A3 1A4 EN 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 1Y4 2A3 2A4 19 EN 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DB package . . . . . . . . . . . . . . . . . . 0.6 W DW package . . . . . . . . . . . . . . . . . . 1.6 W N package . . . . . . . . . . . . . . . . . . . . 1.3 W PW package . . . . . . . . . . . . . . . . . . 0.7 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils, except for the N package, which has a trace length of zero. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ACT244, SN74ACT244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS517B – JUNE 1995 – REVISED MAY 1996 recommended operating conditions (see Note 3) SN54ACT244 MAX MIN MAX 4.5 5.5 4.5 5.5 VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 VO IOH Output voltage 0 High-level output current IOL ∆t/∆v Low-level output current High-level input voltage SN74ACT244 MIN 2 2 0.8 Input transition rise or fall rate TA Operating free-air temperature NOTE 3: Unused inputs must be held high or low to prevent them from floating. UNIT V V 0.8 V VCC VCC V –24 –24 mA 24 24 mA VCC VCC 0 0 V 0 8 0 8 ns/V –55 125 –40 85 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = – 50 µA VOH IOL = – 24 mA A IOH = – 50 mA† IOH = –75 mA† IOZ II ICC SN54ACT244 MIN MAX IOL = 24 mA MIN 4.4 4.49 4.4 4.4 5.5 V 5.4 5.49 5.4 5.4 4.5 V 3.86 3.7 3.76 5.5 V 4.86 4.7 4.76 0.001 5.5 V 0.001 0.1 0.1 0.1 0.1 0.1 0.5 0.44 5.5 V 0.36 0.5 0.44 5.5 V ±0.25 5.5 V ±0.1 5.5 V 4 1.6 VI = VCC or GND VI = VCC or GND 0.1 0.36 VO = VCC or GND Ci V 4.5 V V 1.65 5.5 V One input at 3.4 V, Other inputs at GND or VCC UNIT 3.85 4.5 V 5.5 V IO = 0 MAX 3.85 IOL = 50 mA† IOL = 75 mA† VI = VCC or GND VI = VCC or GND, SN74ACT244 4.5 V 5.5 V ∆ICC‡ Co TA = 25°C MIN TYP MAX 5.5 V IOL = 50 µA VOL VCC 1.65 ±5 ± 2.5 µA ±1 ±1 µA 80 40 µA 1.5 mA 5.5 V 0.6 5V 2.5 pF 5V 8 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. ‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ACT244, SN74ACT244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS517B – JUNE 1995 – REVISED MAY 1996 switching characteristics over recommended operating VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y tPZH tPZL OE Y tPHZ tPLZ OE Y MIN free-air TA = 25°C TYP MAX temperature SN54ACT244 range, SN74ACT244 MIN MAX MIN MAX 2 6.5 9 1 10 1.5 10 2 7 9 1 10 1.5 10 1.5 7 8.5 1 9.5 1 9.5 2 7 9.5 1 11 1.5 10.5 2 8 9.5 1 11 1.5 10.5 2.5 7.5 10 1 11.5 2 10.5 UNIT ns ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance per buffer/driver CL = 50 pF, TYP f = 1 MHz 45 UNIT pF PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 500 Ω From Output Under Test CL = 50 pF (see Note A) Open 500 Ω LOAD CIRCUIT Output Control (low-level enabling) 3V Input 1.5 V 1.5 V 0V tPLH tPHL VOH Output 50% VCC 50% VCC VOL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC Open 3V 1.5 V 0V tPZL [ VCC tPLZ Output Waveform 1 S1 at 2 × VCC (see Note B) Output Waveform 2 S1 at Open (see Note B) 1.5 V 50% VCC tPHZ tPZH VOLTAGE WAVEFORMS VOL + 0.3 V VOL 50% VCC VOH – 0.3 V VOH [0V VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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