STMICROELECTRONICS STM5118ALB

STM5118
Low-cost interactive FTA set-top box decoder
DATA BRIEF
DESCRIPTION
STMicroelectronics sets a new standard for
performance, price and integration in the single chip
MPEG-2 set-top-box decoder market with the
introduction of the STM5118. This highly integrated
solution targets mass market FTA set-top boxes,
offers increased performance over earlier devices
and includes many features for further reduce
costs, including a unified memory architecture.
The STM5118 features the ST20 CPU that is
standard across the OMEGA range but boosts the
clock speed to 200 MHz which, when combined
with the 2D graphics engine gives the new device
outstanding graphics performances, for mosaic
composition, fast channel change time and richer
graphic content. Targeting low-cost, single tuner
STB applications, the STM5118 is hardware and
software binary compatible with the STx5105. This
allows manufacturers to use a unified platform for
all mass market set-top boxes.
The integration of the VCXO and audio DACs
ensures that manufacturers using the STM5118 will
cut their total bill of materials and significantly
simplify board design and assembly.
Figure 1. Package (24 x 24 mm LQFP216)
xxxx
Figure 2. STM5118
STV0288
and
STB6000 tuner
STV0362
COFDM
+ tuner
Transport stream in
SDRAM
or
IR
RX/TX
Audio
buffer
STM5118
Video
buffer
NOR
Flash
Rev. 1
1/3
STM5118
FEATURES
n Enhanced ST20 32-bit VL-RISC CPU
n
– RGB, CVBS, Y/C and YUV outputs with four
10-bit DAC outputs. RGB/CVBS or YUV/
CVBS or YC/CVBS
– 200 MHz, single cycle cache, 4 Kbyte
instruction cache, 4 Kbyte data cache,
2 Kbyte SRAM
n
n
– Encoding of CGMS, Teletext, WSS, VPS,
close caption.
Unified memory interface
– Up to166 MHz, 16-bit wide SDRAM interface
n
– MPEG-1 layers I/II
– SRAM, peripheral, Flash, SFlash™ support
– simultaneous MPEG audio decode and
output of Dolby® streams on S/PDIF
– IEC958/IEC1937 digital audio output
interface
Programmable transport interface (PTI)
– single transport stream input
– integrated stereo audio DAC system
– support for DVB transport streams
n
MPEG-2 MP@ML video decoder
– fully programmable horizontal and vertical
SRCs
n
Audio subsystem
Programmable flash memory interface
– support for low cost DVB-CI and ATAPI
n
PAL/NTSC/SECAM encoder
n
Central DMA controller
n
On-chip peripherals
– two ASCs (UARTs) with Tx and Rx FIFOs
– three 8-bit banks of parallel I/O and one
7-bit bank
Graphics/display
– advanced blitter base compositor
– two SSCs for I²C/SPI master/slave interfaces
– 8 bpp CLUT graphics, 256 x 30 bits (AYCbCr)
CLUT entries
– 16 bpp true color graphics, RGB565,
ARGB1555, ARGB4444 formats, with link-list
control
– Alpha blending, antialiasing, antiflutter,
antiflicker filters
– infrared transmitter/receiver
– integrated VCXO
– low-power RTC watchdog controller
n
JTAG/TAP interface
n
Package 24 mm x 24 mm LQFP216
– 2D paced blitter engine with fill function
PART NUMBERING
Table 1. Order Codes
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Part Number
Description
STM5118ALB
MPEG2 low-cost decoder
STM5118
REVISION HISTORY
Table 2. Revision history
Date
Revision
July-2005
1
Description of changes
First issue
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