STMICROELECTRONICS STM6315LBW13F

STM6315
Open drain microprocessor reset
Features
■
Low supply current of 1.5µA (typ)
■
±1.8% reset threshold accuracy (25°C)
■
Guaranteed RST assertion down to
VCC = 1.0V
■
Open drain RST output can exceed VCC
■
Power supply transient immunity
■
Operating temperature: –40 to +125°C
■
Available in SOT143-4 package.
March 2007
SOT143-4 (W1)
Rev 5
1/21
www.st.com
1
Contents
STM6315
Contents
1
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Manual reset input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Negative-going VCC transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4
Valid RST output down to VCC = 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
STM6315
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SOT143-4 – 4-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . 17
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3/21
List of figures
STM6315
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
4/21
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
SOT143-4 connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Reset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Manual reset timing diagram, switch bounce/debounce . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Supply current vs. supply voltage, VRST = 2.63V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Supply current vs. temperature (no load), VRST = 2.63V . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
RST output voltage vs. output current, VCC = 4.25V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Normalized reset time-out period vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Max. transient duration not causing reset pulse vs. reset threshold Overdrive . . . . . . . . . 11
AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
SOT143-4 – 4-lead small outline transistor package outline . . . . . . . . . . . . . . . . . . . . . . . 17
STM6315
1
Summary description
Summary description
The STM6315 Microprocessor Reset Circuit is a low power supervisory device used to
monitor power supplies. It performs a single function: asserting a reset signal whenever the
VCC supply voltage drops below a preset value and keeping it asserted until VCC has risen
above the preset threshold for a minimum period of time (trec). It also provides a manual
reset input (MR). The open drain RST output can be pulled up to a voltage higher than VCC,
but less than 6V.
The STM6315 comes with standard factory-trimmed reset thresholds of 2.63V, 2.93V,
3.08V, 4.38V, and 4.63V. The STM6315 is available in the SOT143-4 package.
Figure 1.
Logic diagram
VCC
STM6315
MR
RST
VSS
Table 1.
Signal names
Symbol
Figure 2.
AI11162
Description
VCC
Supply voltage
MR
Manual reset input
RST
Active-low open drain reset output
VSS
Ground
SOT143-4 connections (top view)
VSS
1
4
VCC
RST
2
3
MR
AI11163
5/21
Summary description
Figure 3.
STM6315
Block diagram
VCC
COMPARE
VRST
trec
Generator
RST
DEBOUNCE
MR
AI11164
Figure 4.
Hardware hookup
VCC
VCC
VCC
10k
STM6315
MR
Manual
Reset
RST(1)
VSS
MCU
RESET
Input
VSS
AI11165
1. Open drain RST output requires external pull-up resistor.
6/21
STM6315
Operation
2
Operation
2.1
Reset output
The STM6315 Microprocessor Reset Circuit has an active-low, open drain reset output. This
output structure will sink current when RST is asserted. Connect a pull-up resistor from RST
to any supply voltage up to 6V (see Figure 4 on page 6). Select a resistor value large
enough to register a logic low, and small enough to register a logic high while supplying all
input current and leakage paths connected to the reset output line. A 10k pull-up is sufficient
in most applications.
The STM6315 asserts a reset signal to the MCU whenever VCC goes below the reset
threshold (VRST), or when the manual reset input (MR) is taken low (see Figure 5 and
Figure 6 on page 8). RST is guaranteed valid down to VCC = 1.0V.
During power-up, (once VCC exceeds the reset threshold) an internal timer keeps RST low
for the reset time-out period, trec. After this interval, RST returns high.
If VCC drops below the reset threshold, RST goes low. Each time RST is asserted, it stays
low for at least the reset time-out period. Any time VCC goes below the reset threshold, the
internal timer clears. The reset timer starts when VCC returns above the reset threshold.
2.2
Manual reset input
A logic low on MR asserts RST. RST remains asserted while MR is low, and for trec after it
returns high. The MR input has an internal pull-up resistor 63kΩ (typ), allowing it to be left
open if not used.
This input can be driven with TTL/CMOS-logic levels or with open drain/collector outputs.
Connect a standard open push-button switch from MR to VSS to create a manual reset
function (see Figure 4 on page 6); external debounce circuitry is not required. If the device is
used in a noisy environment, connect a 0.1µF capacitor from MR to VSS to provide
additional noise immunity.
2.3
Negative-going VCC transients
The STM6315 is relatively immune to negative-going VCC transients (glitches). Figure 12 on
page 11 shows typical transient duration versus reset comparator overdrive (for which the
STM6315 will NOT generate a reset pulse). The graph was generated using a negative
pulse applied to VCC, starting at 0.5V above the actual reset threshold and ending below it
by the magnitude indicated (Reset Threshold Overdrive). The graph indicates the maximum
pulse width a negative VCC transient can have without causing a reset pulse. As the
magnitude of the transient increases (further below the threshold), the maximum allowable
pulse width decreases. Any combination of duration and overdrive which lies under the
curve will NOT generate a reset signal (see Figure 12). A 0.1µF bypass capacitor mounted
as close as possible to the VCC pin provides additional transient immunity.
7/21
Operation
2.4
STM6315
Valid RST output down to VCC = 0V
When VCC falls below 1V, the RST output no longer sinks current, but becomes an open
circuit. In most systems this is not a problem, as most MCUs do not operate below 1V.
However, in applications where RST output must be valid down to 0V, a pull-down resistor
may be added to hold the RST output low. This resistor must be large enough to not load
the RST output, and still be small enough to pull the output to Ground. A 100KΩ resistor is
recommended.
Figure 5.
Reset timing diagram
VCC
VRST
VCC (min)
RST
trec
AI11166
Figure 6.
Manual reset timing diagram, switch bounce/debounce
MR Glitch Rejection
MR
MR Input Pulse Width
RST
trec
MR-to-RST Delay
8/21
AI11167b
STM6315
Typical operating characteristics
3
Typical operating characteristics
Note:
Typical values are at TA = 25°C.
Figure 7.
Supply current vs. supply voltage, VRST = 2.63V
3.00
2.75
Supply Current, ICC (µA)
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
0.0
Figure 8.
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Supply Voltage, VCC (V)
4.0
4.5
5.0
5.5
AI11871c
Supply current vs. temperature (no load), VRST = 2.63V
2.25
Supply Current, ICC (µA)
2.00
1.75
1.50
1.25
1.00
VCC = 2V
VCC = 3V
0.75
VCC = 4V
0.50
VCC = 5V
0.25
0.00
–40
–20
0
20
40
60
Temperature, TA (°C)
80
100
120
AI11872c
9/21
Typical operating characteristics
Figure 9.
STM6315
RST output voltage vs. output current, VCC = 4.25V
0.20
Output Voltage (V)
0.16
0.12
0.08
0.04
0
0
3
6
Output Current (mA)
9
12
AI11873c
Figure 10. Normalized reset time-out period vs. temperature
Normalized Reset Time-out Period,
trec/trec (typ) (–)
1.14
1.12
1.10
1.08
1.06
1.04
1.02
1.00
0.98
–40
10/21
–20
0
20
40
60
Temperature, TA (°C)
80
100
120
AI11875b
STM6315
Typical operating characteristics
Normalized Reset Threshold, VRST/VRST-typ (–)
Figure 11. Normalized reset threshold vs. temperature
1.01
1.005
1
0.995
0.99
–40
–20
0
20
40
60
Temperature, TA (°C)
80
100
120
AI11876c
Figure 12. Max. transient duration not causing reset pulse vs. reset threshold Overdrive
100
Transient Duration (µs)
90
80
70
60
50
40
30
20
10
0
1
Note:
10
100
Reset Threshold Overdrive (mV)
1000
AI11877
Reset occurs above the curve.
11/21
Maximum rating
4
STM6315
Maximum rating
Stressing the device above the rating listed in the Table 2: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 2.
Absolute maximum ratings
Symbol
TSTG
TSLD
(1)
Parameter
Storage temperature (VCC Off)
Lead solder temperature for 10 seconds
Value
Unit
–55 to 150
°C
260
°C
–0.3 to VCC + 0.3
V
VIO
Input or output voltage
VCC
Supply voltage
–0.3 to 7.0
V
IO
Output current
20
mA
PD
Power dissipation
320
mW
1. Reflow at peak temperature of 260°C (total thermal budget not to exceed 245°C for greater than 30
seconds).
12/21
STM6315
5
DC and AC parameters
DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristics Tables that
follow are derived from tests performed under the measurement conditions summarized in
Table 3: Operating and AC measurement conditions. Designers should check that the
operating conditions in their circuit match the operating conditions when relying on the
quoted parameters.
Table 3.
Operating and AC measurement conditions
Parameter
STM6315
Unit
1.0 to 5.5
V
–40 to +125
°C
~5
ns
Input Pulse Voltages
0.2 to 0.8VCC
V
Input and Output Timing Reference Voltages
0.3 to 0.7VCC
V
VCC Supply Voltage
Ambient Operating Temperature (TA)
Input Rise and Fall Times
Figure 13. AC testing input/output waveforms
0.8VCC
0.2VCC
0.7VCC
0.3VCC
AI02568
13/21
DC and AC parameters
Table 4.
Sym
VCC
STM6315
DC and AC characteristics
Description
Test Condition (1)
Max
Unit
5.5
V
12
µA
15
µA
10
µA
VCC = 3.6V, no load
TA = –40 to +125°C
12
µA
VCC > 4.25V, ISINK = 3.2mA
0.4
V
VCC > 2.5V, ISINK = 1.2mA
0.3
V
VCC > 1.0V, ISINK = 80µA
0.3
V
VCC > VRST, RST not
asserted
1
µA
VRST + 1.8%
V
VRST – 2.5% VRST VRST + 2.5%
V
Operating voltage
Min
1.0
VCC = 5.5V, no load
TA = –40 to +85°C
ICC
VOL
VCC supply current
RST output voltage
RST output open drain
Leakage Current
Typ
2.0
VCC = 5.5V, no load
TA = –40 to +125°C
VCC = 3.6V, no load
TA = –40 to +85°C
1.5
Reset Thresholds
Reset threshold (2)
VRST (see Table 6 on page 18
for detailed listing)
tRD
VCC-to-RST delay
STM6315xAxxxx
STM6315xBxxxx
trec
RST pulse
width (2)
STM6315xDxxxx
STM6315xGxxxx
Reset threshold temperature
coefficient
14/21
VCC falling; TA = 25°C
VCC falling; TA = –40 to 85°C
VRST – 1.8%
VCC falling; TA = –40 to 125°C VRST – 3.5%
VCC falling from
(VRST + 100mV) to
(VRST – 200mV) at 1mV/µs
VRST + 3.5%
35
TA = –40 to +85°C
1
TA = –40 to +125°C
0.8
TA = –40 to +85°C
20
TA = –40 to +125°C
16
TA = –40 to +85°C
140
TA = –40 to +125°C
112
TA = –40 to +85°C
1120
TA = –40 to +125°C
896
V
µs
2
ms
2.4
ms
40
ms
48
ms
280
ms
336
ms
2240
ms
2688
ms
1.5
30
210
1680
60
ppm/°C
STM6315
Table 4.
Sym
DC and AC parameters
DC and AC characteristics (continued)
Description
Test Condition (1)
Min
VRST > 4.0V
0.8
V
VRST < 4.0V
0.3VCC
V
Typ
Max
Unit
Manual Reset Input
VIL
MR low input threshold
VIH
MR low input threshold
MR input pulse width
VRST > 4.0V
2.4
V
VRST < 4.0V
0.7VCC
V
1
µs
MR glitch rejection
100
ns
MR-to-RST delay
500
ns
MR pull-up resistance
32
63
100
kΩ
1. Valid for ambient operating temperature: TA = –40 to 125°C; VCC = 2.5 to 5.5V (except where noted).
2. Other VRST thresholds and trec timings are offered. Minimum order quantities may apply. Contact local sales office for
availability.
15/21
Package mechanical data
6
STM6315
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
16/21
STM6315
Package mechanical data
Figure 14. SOT143-4 – 4-lead small outline transistor package outline
E
E1
0.15
B
M
CAB
A1
1
e/2
e1
e
D
0.15
M
CAB
b2
0.20
M
4X
CAB
3X b
A2
C 0.10
A
C
A
C
θ
L1
C
L
SOT143-4
Note:
Drawing is not to scale.
Table 5.
SOT143-4 – 4-lead small outline transistor package mechanical data
mm
inches
Symbol
Typ
Min
Max
Typ
Min
Max
A
–
0.89
1.12
–
0.035
0.044
A1
–
0.01
0.10
–
0.001
0.004
A2
–
0.88
1.02
–
0.035
0.042
b
–
0.37
0.51
–
0.015
0.020
b2
–
0.76
0.94
–
0.030
0.037
C
–
0.09
0.18
–
0.004
0.007
D
–
2.80
3.04
–
0.110
0.120
E
–
2.10
2.64
–
0.083
0.104
E1
–
1.20
1.40
–
0.047
0.055
e
1.92
–
–
0.076
–
–
e1
0.20
–
–
0.008
–
–
L
0.55
–
–
0.022
–
–
L1
–
0.40
0.60
–
0.016
0.024
Θ
0°
10°
0°
10°
N
4
4
17/21
Part numbering
7
STM6315
Part numbering
Table 6.
Ordering information scheme
Example:
STM6315
R
D
W1
3
F
Device Type
STM6315
Reset Threshold Voltage (1)
L = VRST = 4.63V
M = VRST = 4.38V
S = VRST = 2.93V
R = VRST = 2.63V
RST Pulse Width (1)
A = trec = 1.5ms
B = trec = 30ms
D = trec = 210ms
G = trec = 1680ms
Package
W1 = SOT143-4
Temperature Range
3 = –40 to 125°C
Shipping Method
F = ECOPACK Package, Tape & Reel
1. Other VRST thresholds and trec timings are offered. Minimum order quantities may apply. Contact local
sales office for availability.
Note:
18/21
For other options, or for more information on any aspect of this device, please contact the
ST Sales Office nearest you.
STM6315
Part numbering
Table 7.
Marking description
Part Number
Reset Threshold (1)
(V)
RST Pulse Width (1)
(ms)
Output
Topside
Marking (2)
STM6315LB
4.63
30
Open drain RST
9LBx
STM6315MD
4.38
210
Open drain RST
9MDx
STM6315SD
2.93
210
Open drain RST
9SDx
STM6315RA
2.63
1.5
Open drain RST
9RAx
STM6315RB
2.63
30
Open drain RST
9RBx
STM6315RD
2.63
210
Open drain RST
9RDx
STM6315RG
2.63
1680
Open drain RST
9RGx
1. Other VRST thresholds and trec timings are offered. Minimum order quantities may apply. Contact local
sales office for availability.
2. Where "x" = Assembly Work Week (A to Z), such that "A" = WW01-02, "B" = WW03-04, and so forth.
19/21
Revision history
8
STM6315
Revision history
Table 8.
20/21
Document revision history
Date
Revision
Changes
14-Nov-2005
1.0
First edition.
08-Feb-2006
2.0
Update template, characteristics, marking (Figure 7, 8, 9, 10, and 11;
Table 4, 6, and 7).
12-Apr-2006
3
Updated characteristics (Figure 7, 8, and 11; Table 4, 6, and 7).
27-Jul-2006
4
Updated Table 3, 5 and 6.
21-Mar-2007
5
Updated Table 2, 6, and 7.
STM6315
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