STMEC001 Power interface switch for ExpressCardTM Features ■ Compliant with PC Card™ standard for ExpressCard ■ 3-channel power interface switch ■ Built-in under-voltage lockout (UVLO) circuit ■ Ultra-low standby-mode current ■ Additional 5 V or 12 V power supply not required ■ High reliability ensured with integrated overcurrent, thermal and undervoltage protection circuitries applied to each voltage rail ■ Soft start function for non-rush current ■ Ultra-low standby-mode current for power saving ■ Ultra-low ON resistance for fast switching QFN16 TSSOP20 Description The STMEC001 is an ExpressCard power interface switch which provides the complete power management solution required by the ExpressCard specification. The STMEC001 consists of 3 internal switches distributing 3.3 V, 3.3VAUX, and 1.5 V to the ExpressCard socket without the need of additional charge pump or external switches. The STMEC001 ExpressCard power switch is ideal for notebook computers, desktop computers, personal digital assistants (PDA), or other handheld devices implementing the ExpressCard schematic. . Table 1. April 2008 Device summary Order code Package Packing STMEC001QTR QFN16 Tape and reel STMEC001ATTR TSSOP20 Tape and reel Rev 4 1/19 www.st.com 19 Contents STMEC001 Contents 1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Power states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 Power states description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Logic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 Switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/19 STMEC001 Pin description /OC RCLKEN /STBY SYSRST STMEC001 pin configuration (top view) SHDN 16 15 14 13 VIN_3.3AUX VIN_3.3V 2 11 VO_3.3AUX VO_3.3V 3 10 VIN_1.5V 4 9 VO_1.5V 1 24 NC /SYSRST 2 23 /OC /SHDN 3 22 RCLKEN 4 21 VIN_3.3VAUX VIN_3.3V 5 20 V0_3.3VAUX VIN_3.3V 6 19 VIN_1.5V VO_3.3V 7 18 VIN_1.5V VO_3.3V 8 17 VO_1.5V /PERST 9 16 VO_1.5V NC 10 15 /CPPE GND 11 14 /CPUSB NC 12 13 NC VO_3.3V 5 6 7 8 /CPPE 12 /CPUSB 1 GND Figure 1. /PERST 1 Pin description QFN16 NC /STBY TSSOP20 3/19 Pin description STMEC001 Table 2. Pin assignments Pin 4/19 Name Type 1 NC - No connection 15 2 /SYSRST I System Reset input - active low, logic level signal, internal 150 KΩ pull-up 16 3 /SHDN I Shutdown input - active low, logic level signal, internal 150 KΩ pull-down 1 4 /STBY I Standby input - active low, logic level signal, internal 150 KΩ pull-down 2 5 VIN_3.3V I 3.3 V input for VO_3.3V - 6 VIN_3.3V I 3.3 V input for VO_3.3V 3 7 VO_3.3V O Switched output that delivers 0 V, 3.3 V or high impedance to card 4 8 VO_3.3V O Switched output that delivers 0 V, 3.3 V or high impedance to card 5 9 /PERST O A logic level power good to slot (delayed) - 10 NC - No connection 6 11 GND - Ground - 12 NC - No connection - 13 NC - No connection 7 14 /CPUSB I Card Present input for USB cards, internal 150 KΩ pull-up 8 15 /CPPE I Card Present input for PCI ExpressCard, internal 150 KΩ pull-up 9 16 VO_1.5V O Switched output that delivers 0 V, 1.5 V or high impedance to card - 17 VO_1.5V O Switched output that delivers 0 V, 1.5 V or high impedance to card 10 18 VIN_1.5V I 1.5 V input for 1.5Vout - 19 VIN_1.5V I 1.5 V input for 1.5VOUT 11 20 VO_3.3VAUX O Switched output that delivers 0 V, 3.3 V or high impedance to card 12 21 VIN_3.3VAUX I 3.3 V input for VO_3.3VAUX and chip power QFN16 TSSOP20 - Description 13 22 RCLKEN I/O Reference Clock Enable signal. As an output, a logic level power good to host for slot (open drain). As an input, if kept inactive by the host, prevents /PERST from being de-asserted, internal 150 KΩ pull-up 14 23 /OC O Over-current status output for slot (open drain) - 24 NC - No connection STMEC001 1.1 Pin description Pin functional description Table 3. Pin detailed descriptions Symbol Description CPPE A logic low level on this input indicates that the card present supports PCI Express functions. This input pin connects to the 3.3 VAUX input through a 150 kΩ internal pull up. When inserted, the card physically connects this input to ground if the card supports PCI Express functions. CPUSB A logic low level on this input indicates that the card present supports USB functions. The input pin CPUSB connects to the 3.3 VAUX input through a 150 kΩ internal pull up. When inserted, the card physically connects CPUSB to ground if the card supports USB functions. SHDN When asserted (logic low), this input instructs the STMEC001 to turn off all voltage outputs and the discharge FETs at the 3 outputs are activated. STBY When asserted (logic low), this input places the power switch in Standby Mode by turning off the 3.3 V and 1.5 V power switches and keeping the 3.3 VAUX switch on. This pin serves as both an input and an output. On power up, the power switch keeps this signal at a low state as long as any of the output power rails are out of their tolerance range. Once all output power rails are within tolerance, the power switch releases RCLKEN RCLKEN allowing it to transition to a high state (internally pulled up to 3.3 VAUX). The transition of RCLKEN from a low to a high state starts an internal timer for the purpose of de-asserting /PERST. As an input, RCLKEN can be kept low to delay the start of the /PERST internal timer. RCLKEN can be used by the host system to enable a clock driver. PERST On power up, this output remains asserted. Once all power rails are within tolerance, RCLKEN is asserted and /PERST is de-asserted after a time delay. On power down, this output is asserted whenever any of the power rails drop below their voltage tolerance. SYSRST This input is driven by the host system and directly affects /PERST. Asserting /SYSRST (logic level: low) forces /PERST to assert. OC The OC pin is an open drain output for over-current indication. Output does not turn off during over-current condition. The output voltage decreases as the output current exceeds over-current limit. Only if the temperature increases above the limit the output is turned off completely. Over-current in one output does not affect the other outputs. 5/19 Logic diagram 2 STMEC001 Logic diagram Figure 2. STMEC001 block diagram UVLO Vin_3.3V SW V/I sense and discharge switch VO_3.3V Vin_1.5V SW V/I sense and discharge switch VO_1.5V Vin_3.3VAUX SW V/I sense and discharge switch 150 KΩ 150 KΩ 150 KΩ 150 KΩ 150 KΩ 150 KΩ #PERST #SHDN #STBY #CPUSB Control logic #SYSRST #CPPE #OC RCLKEN Thermal sense 6/19 VO_3.3VAUX POR STMEC001 Logic diagram Figure 3. STMEC001 typical application 3.3 V 3.3 V IN Power supply 3.3 V AUX IN 1.5 V IN 3.3 V AUX STMEC001 1.5 V ExpressCard Power switch ExpressCard slot Control signals Control signals ExpressCard host Data links 7/19 Maximum ratings 3 STMEC001 Maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Absolute maximum ratings(1) Symbol VI Parameter Input voltage Value Unit VI(3.3VIN) – 0.3 to 4.6 V VI(1.5VIN) – 0.3 to 4.6 V VI(3.3VAUX) – 0.3 to 4.6 V VI(3.3VIN) internally limited IO Output current VI(1.5VIN) internally limited VI(3.3VAUX) internally limited TOP Operating junction temperature, TJ (max to be calc. at worst case PD at 85° C ambient) –40 to 120 °C TSTG Storage temperature range –55 to 150 °C 1. Absolute maximum ratings are those values above which damage to the device may occur. Functional operation under these conditions is not implied. All voltages are referenced to GND. 8/19 STMEC001 4 Power states Power states The STMEC001 operates in a number of states, as described in the following table: Table 5. Power states Voltage inputs Logic states Outputs Mode 3.3VAUX 3.3 V 1.5 V /SHDN /CPUSB /CPPE /STBY 3.3VAUX 3.3 V 1.5 V ON X X 1 1 1 X GND GND GND No card ON X X 0 X X X GND GND GND Shutdown ON ON ON 1 0 X 1 ON ON ON USB enable ON ON ON 1 X 0 1 ON ON ON PE enable ON ON ON 1 X X 0 ON OFF OFF Standby OFF X X X X X X OFF OFF OFF OFF 4.1 Power states description ● No card mode: when no card is inserted, and at least 3.3 VAUX is available, all outputs are grounded ● Shutdown mode: when /SHDN is asserted, and at least 3.3 VAUX is available all outputs are grounded ● USB/PW enable mode: when all 3 inputs are available, detection of cartd insertion turns on all 3 outputs. – VIN_3.3 V, VIN_3.3VAUX and VIN_1.5 V are present at the USB/PW enable input of the power switch prior to a card being inserted. Power to the card is based on the state of /CPUSB and /CPPE (see table). – The card is present and VIN_1.5 V or/and VIN_3.3 V is removed from the input of the power switch; VIN_3.3VAUX will still be provided to the card, VIN_1.5 and VIN_3.3 V will be disabled (see table). If power to VIN_1.5 V and VIN_3.3 V is restored, output to the card will be restored. – Prior to the insertion of a card, VIN_3.3 VAUX is available, VIN_3.3 V and VIN_1.5 V are not available; no power is made available to the card. If VIN_1.5 V and VIN_3.3 V are made available at the input of the power switch after the card is inserted, both VO_3.3 V and VO_1.5 V are made available to the card. – Standy mode: when all 3 supplies are available and /STBY is asserted. Only 3.3 VAUX output is on. – OFF mode: if VAUX is off, all outpus are off. When VIN_3.3VAUX is not present, VIN_1.5 V or/and VIN_3.3 V must not be present. 9/19 Electrical characteristics STMEC001 5 Electrical characteristics Table 6. Recommended operating conditions Symbol VI IO TOP Parameter Value Unit Input voltage: VI(3.3VIN) is required for its respective functions 3.0 to 3.6 V Input voltage: VI(1.5VIN) is required for its respective functions 1.35 to 1.65 V Input voltage: VI(3.3VAUX) is required for all circuit operations 3.0 to 3.6 V Output current: IO(3.3V) at TJ = 100 ° C 1.3 (max.) A Output current: IO(1.5V) at TJ = 100 ° C 650 (max.) mA Output current: IO(AuxV) at TJ = 100 ° C 275 (max.) mA 100 °C Operating junction temperature, TJ (max to be calc. at worst case PD at 85° C ambient) Table 7. Symbol Electrical characteristics TJ = 25° C, VI(VIN 3.3 V) = VI(VIN 3.3VAUX)= 3.3 V, VI(VIN 1.5 V) = 1.5 V Parameter VIN_3.3 V to VO_3.3 V RSW(1) TSSOP20 VIN_1.5 V to VO_1.5 V VIN_3.3VAUX to VO_VAUX VIN_3.3 V to VO_3.3 V RSW(1) QFN16 VIN_1.5 V to VO_1.5 V VIN_3.3VAUX to VO_VAUX RO 10/19 Test conditions Min I = 1300 mA, TJ = 25 ° C Typ Max 53 64 I = 1300 mA, TJ = 100 ° C Unit 80 I = 650 mA, TJ = 25 ° C 70 88 mΩ I = 650 mA, TJ = 100 ° C 105 I = 275 mA, TJ = 25 ° C 140 I = 275 mA, TJ = 100 ° C 170 210 I = 1300 mA, TJ = 25 ° C 53 I = 1300 mA, TJ = 100 ° C 64 80 I = 650 mA, TJ = 25 ° C 80 92 mΩ I = 650 mA, TJ = 100 ° C 115 I = 275 mA, TJ = 25 ° C 170 I = 275 mA, TJ = 100 ° C 192 230 RO(3.3 V) discharge resistance I discharge = 1 mA 0.1 0.5 RO(1.5 V) discharge resistance I discharge = 1 mA 0.1 0.5 RO(1.5 V) discharge resistance I discharge = 1 mA 0.1 0.5 ΚΩ STMEC001 Table 7. Electrical characteristics Electrical characteristics TJ = 25° C, VI(VIN 3.3 V) = VI(VIN 3.3VAUX)= 3.3 V, VI(VIN 1.5 V) = 1.5 V (continued) Symbol IOS Parameter Test conditions Min Typ Max Unit IO(3.3 V) limit (limit is the steady state value) TJ -40° C to100° C Output powered into a short 1.3 2.5 A IO(1.5 V) limit TJ -40° C to100° C Output powered into a short 650 1300 mA IO(VAUX) limit TJ -40° C to 100° C Output powered into a short 275 660 1. Switch resistance (in production - probe testing at 1.3 A. Final test at 1.0 A and apply guard band) Table 8. Power switching Symbol Tsh IOL Parameter Thermal shutdown, trip point, TJ. Over-current condition 155 Typ Max Unit 165 VO (3.3VOUT) with100 mΩ short Current limit response time. From short to first threshold within 1.1 times VO (1.5VOUT) with100 mΩ short of the final current limit VO (VAUX) with100 mΩ short 5 20 5 20 5 20 Input quiescient current: normal operation with pull-up VIN_3.3VAUX VO (VAUX) = VI(3.3VAUX) = VI(3.3VIN) VO(1.5V) = VI(1.5VIN) VIN_3.3V TJ -40° C,100° C VIN_1.5V Outputs are ON and unloaded Reverse leakage current ILEAK(1) (current measured from output pins / input grounded) 40 10 150 180 25 40 10 25 VIN_3.3VAUX T -40° C,100° C J VIN_3.3V discharge FETs are ON 150 270 10 15 VIN_1.5V 10 15 50 100 15 20 5 10 TJ = 25 ° C 5 10 TJ = 100 ° C 20 50 TJ = 25 ° C 10 15 TJ = 100 ° C 30 50 TJ = 25 ° C 10 15 TJ = 100 ° C 30 50 VIN_3.3VAUX VIN_1.5V VIN_3.3V μs 120 VIN_3.3VAUX VO(VAUX) = VI(3.3VAUX) = VI(3.3VI N) VO(1.5 V) = VI(1.5VIN) VIN_3.3V TJ -40° C,100° C] VIN_1.5V Outputs are ON and unloaded VIN_3.3VAUX Forward leakage current (current measured at input pins/no card present) VIN_3.3V /SHDN inactive VIN_1.5V °C °C 10 Input quiescient current: /SHDN asserted with pull-up SHDN Min Hysteresis Input quiescent current: normal operation IQ Test condition μA μA μA 1. All high side switches are in Hi-Z state, VO (AUX) = VO (3.3 V) = 3.3 V, Vo (1.5 V) = 1.5 V, TJ -40 ° C,100 ° C 11/19 Electrical characteristics Table 9. Undervoltage lockout (UVLO) Symbol UVLO Parameter Test condition Min Typ Max Unit VIN_3.3 UVLO VIN_3.3 level, below which VIN_3.3 and VIN_1.5 switches are off 2.6 2.9 V VIN_1.5 UVLO VIN_1.5 level, below which VIN_3.3 and VIN_1.5 switches are off 1 1.25 V VIN_3.3 VAUX UVLO VIN_3.3VAUX level, below which sets the device into OFF state 2.6 2.9 V UVLO hysteresis 12/19 STMEC001 100 mV STMEC001 Logic characteristics 6 Logic characteristics Table 10. Logic states Logic transition Condition High level Min Typ Max Unit 2.0 Logic input voltage V Low level PERST# assertion threshold of output voltage 0.8 3.3 V output falling 2.7 3.0 AUX output falling 2.7 3.0 1.5 V output falling 1.2 1.35 PERST# assertion delay from output voltage invalid Output falling below threshold PERST# de-assertion from output voltage valid Output rising above threshold V 500 ns 20 ms PERST# assertion delay from SYSRST# STSRST asserted or de-asserted 500 ns RCLKEN assertion delay from output voltage valid Output rising above threshold 100 μs OC# output low voltage IOC = 2 mA 0.4 V OC# leakage current VOC = 3.6 V 1 μA OC# deglitch Falling into or out of an over-current condition 20 μs Table 11. 4 10 6 ESD protections Pin Condition ESD tolerance VOUT (3.3 V, 1.5 V, AUX) Versus GND & supply 6 All other pins (except RCLKEN) Versus GND & supply 2 RCLKEN Versus GND 2 RCLKEN Versus supply 1 Unit kV 13/19 Switching times STMEC001 7 Switching times Table 12. Switching characteristics Symbol tR tF tSHDN 14/19 Parameter Min Typ Max VIN_3.3V to VO_3.3V CL(3.3V) = 0.1 µF Io(3.3V) = 0 A 0.1 3 VIN_3.3VAUX to VO_VAUX CL(AUX) = 0.1 µF Io(AUX) = 0A 0.1 3 VIN_1.5V to VO_1.5V CL(1.5V) = 0.1 µF Io(1.5V) = 0 A 0.1 3 VIN_3.3V to VO_3.3V CL(3.3V) = 100 µF RL = VO_3.3V / 1.0 A 0.1 6 VIN_3.3VAUX to VO_VAUX CL(3.3V) = 100 µF RL = VO_VAUX/ 0.25 A 0.1 6 VIN_1.5V to VO_1.5V CL(3.3V) = 100 µF RL = VO_1.5 V / 0.5 A 0.1 6 VIN_3.3V to VO_3.3V CL(3.3V) = 0.1 µF Io(3.3V) = 0 A 10 150 VIN_3.3VAUX to VO_VAUX CL(AUX) = 0.1 µF Io(AUX) = 0 A 10 150 VIN_1.5V to VO_1.5V CL(1.5V) = 0.1 µF Io(1.5V) = 0 A 10 150 VIN_3.3V to VO_3.3V CL(3.3V) = 20 µF, no load 2.0 30.0 VIN_3.3VAUX to VO_VAUX CL(AUX) = 20 µF, no load 2.0 30.0 VIN_1.5V to VO_1.5V CL(1.5V) = 20 µF, no load 2.0 30.0 VIN_3.3V to VO_3.3V CL(3.3V) = 0.1 µF Io(3.3V) = 0 A 10 80 VIN_3.3VAUX to VO_VAUX CL(AUX) = 0.1 µF Io(AUX) = 0 A 10 80 VIN_1.5V to VO_1.5V CL(1.5V) = 0.1 µF Io(1.5V) = 0 A 10 80 VIN_3.3V to VO_3.3V CL(3.3V) = 100 µF RL = VO_3.3V/1.0 A 0.1 5.0 VIN_3.3VAUX to VO_VAUX CL(3.3V) = 100 µF RL = VO_VAUX/0.25 A 0.1 5.0 VIN_1.5V to VO_1.5V CL(3.3V) = 100 µF RL = VO_1.5V/0.5 A 0.1 5.0 Output rise time Output fall time (/CPUSB and /CPPE inactive) Condition Output fall time (/SHDN active) Unit ms μs ms μs ms STMEC001 Table 12. Switching times Switching characteristics (continued) Symbol tPD Parameter Condition Min Typ Max VIN_3.3V to VO_3.3V CL(3.3V) = 0.1 µF Io(3.3V) = 0 A 0.02 1.0 VIN_3.3VAUX to VO_VAUX CL(AUX) = 0.1 µF, Io(AUX) = 0 A 0.02 1.0 VIN_1.5V to VO_1.5V CL(1.5V) = 0.1 µF Io(1.5V) = 0 A 0.02 1.0 VIN_3.3V to VO_3.3V CL(3.3V)=100µF RL = VO_3.3V/1.0 A 0.05 1.0 VIN_3.3VAUX to VO_VAUX CL(3.3V) = 100 µF RL = VO_VAUX/0.25 A 0.05 1.0 VIN_1.5V to VO_1.5V CL(3.3V) = 100µF RL = VO_1.5V/0.5 A 0.05 1.0 Propagation delay Unit ms 15/19 Package mechanical data 8 STMEC001 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 4. QFN16 (3 x 3 mm) package outline E E2 A K A1 e D2 D b A3 K L r 1. Drawing not to scale. Table 13. QFN16 (3 x 3 mm) mechanical data millimeters inches Symbol Min Typ Max Min Typ Max 0.80 0.90 1.00 0.032 0.035 0.039 A1 0.02 0.05 0.001 0.002 A3 0.20 A b 0.18 D D2 0.007 1.55 1.70 1.70 1.80 0.061 0.067 1.80 0.061 0.067 0.020 K 0.20 0.008 r 0.40 0.09 0.071 0.118 0.50 0.30 0.012 0.118 3.00 1.55 0.010 e L 16/19 0.30 3.00 E E2 0.25 0.008 0.50 0.012 0.006 0.016 0.071 0.020 STMEC001 Package mechanical data Figure 5. TSSOP20 package outline A A2 A1 K e b L E c D E1 PIN 1 IDENTIFICATION 1 0087225C 1. Drawing not to scale. Table 14. TSSOP20 mechanical data millimeters inches Symbol Min Typ A Max Min Typ 1.2 A1 0.05 A2 0.8 b Max 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 6.4 6.5 6.6 0.252 0.256 0.260 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 1 0.65 BSC K 0° L 0.45 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 17/19 Revision history 9 STMEC001 Revision history Table 15. 18/19 Document revision history Date Revision Change 02-Aug-2006 1 First release 08-Feb-2007 2 Replaced TSSOP24 package information with QFN16 18-Oct-2007 3 Modified title, added RSW values for QFN16 inTable 7 on page 10 , small text changes, layout restructure, content reworked to improve readability in Section 4.1: Power states description on page 9, modified Figure 2: STMEC001 block diagram on page 6 17-Apr-2008 4 Modified: Figure 2 and Table 2: Pin assignments on page 4 and Table 5: Power states on page 9, minor text changes. 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