STMICROELECTRONICS STP200NF04L

STP200NF04L
STB200NF04L - STB200NF04L-1
N-CHANNEL 40V - 3 mΩ - 120 A TO-220/D²PAK/I²PAK
STripFET™ II MOSFET
Figure 1: Package
Table 1: General Features
TYPE
STB200NF04L
STP200NF04L
STB200NF04L-1
■
■
■
VDSS
RDS(on)
ID
40 V
40 V
40 V
3.5 mΩ
3.8 mΩ
3.8 mΩ
120 A
120 A
120 A
TYPICAL RDS(on) = 3mΩ
100% AVALANCHE TESTED
LOW THERESHOLD DRIVE
DESCRIPTION
This MOSFET is the latest development of STMicroelectronics unique “Single Feature Size™”
stripbased process. The resulting transistor shows
extremely high packing density for low on-resistance, rugged avalanche characteristics and lesscritical alignement steps therefore a remarkable
manufacturing reproducibility. This new improved
device has been specifically designed for Automotive applications.
3
1
3
2
1
TO-220
D²PAK
3
12
I²PAK
Figure 2: Internal Schematic Diagram
APPLICATIONS
■ HIGH CURRENT, HIGH SWITCHING SPEED
Table 2: Order Codes
PART NUMBER
MARKING
PACKAGE
PACKAGING
STP200NF04L
P200NF04L
TO-220
TUBE
STB200NF04L
B200NF04L
D²PAK
TAPE & REEL
STB200NF04L-1
B200NF04L
I²PAK
TUBE
Rev. 1
April 2005
1/12
STP200NF04L - STB200NF04L - STB200NF04L-1
Table 3: Absolute Maximum ratings
Symbol
VDS
VGDR
VGS
Parameter
Value
Unit
Drain-source Voltage (VGS = 0)
40
V
Drain-gate Voltage (RGS=20 KΩ)
40
V
Gate- source Voltage
± 16
V
ID (**)
Drain Current (continuous) at TC = 25°C
120
A
ID
Drain Current (continuous) at TC = 100°C
120
A
Drain Current (pulsed)
480
A
Total Dissipation at TC = 25°C
300
W
2
W/°C
IDM (2)
PTOT
Derating Factor
dv/dt (1)
Peak Diode Recovery voltage slope
3.6
V/ns
EAS (3)
Single Pulse Avalanche Energy
1.4
J
-55 to 175
°C
Tstg
Tj
Storage Temperature
Max. Operating Junction Temperature
(1)ISD ≤ 100 A, di/dt ≤ 240 A/µs, VDD ≤ 32 , Tj ≤ TJMAX
(2) Pulse width limited by safe operating area.
(3) Starting Tj = 25°C, IAR = 50A, VDD = 30V
(**) Current limited by Package
Table 4: Thermal Data
TO-220/I²PAK
Rthj-case
Thermal Resistance Junction-case
Max
Rthj-pcb (*)
Thermal Resistance Junction-pcb
Max
Thermal Resistance Junction-ambient
Max
Rthja
Tl
Maximum Lead Temperature For Soldering Purpose
D²PAK
Unit
0.50
°C/W
35
62.5
--
300
--
°C/W
°C
(*)When mounted on 1 inch² FR4 2oZ Cu
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
Table 5: On/Off
Symbol
V(BR)DSS
2/12
Parameter
Drain-source
Breakdown Voltage
Test Conditions
Min.
ID = 250 µA, VGS = 0
IDSS
VDS= Max Rating
Zero Gate Voltage
Drain Current (VGS = 0) VD = Max Rating, TC= 125 °C
IGSS
Gate-body Leakage
Current (VDS = 0)
Typ.
40
VGS(th)
Gate Threshold Voltage VDS = VGS, ID = 250µA
Static Drain-source On
Resistance
Unit
V
VGS = ± 16V
RDS(on)
Max.
1
1
10
µA
µA
±100
nA
4
V
VGS = 10 V, ID = 50 A
VGS = 5 V, ID = 50 A
TO-220
I²PAK
3.3
3.8
3.8
4.6
mΩ
mΩ
VGS = 10 V, ID = 50 A
VGS = 5 V, ID = 50 A
D²PAK
3.0
3.5
3.5
4.3
mΩ
mΩ
STP200NF04L - STB200NF04L - STB200NF04L-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 6: Dynamic
Symbol
gfs (4)
Parameter
Test Conditions
Forward Transconductance
VDS = 15 V, ID = 20 A
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS = 25V, f = 1 MHz, VGS = 0
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
tf(Voff)
tf
tc
Qg
Qgs
Qgd
Min.
Typ.
Max.
Unit
60
S
6400
1300
190
pF
pF
pF
VDD = 20 V, ID = 50 A,
RG= 4.7 Ω VGS = 4.5 V
(see Figure 16)
37
270
90
80
ns
ns
ns
ns
Turn-off Delay Time
Fall Time
Cross-over Time
Vclamp = 32 V, ID = 100 A,
RG= 4.7 Ω VGS = 4.5 V
(see Figure 17)
85
125
160
ns
ns
ns
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 32 V, ID = 100 A,
VGS = 4.5 V
(see Figure 19)
72
20
28.5
90
nC
nC
nC
Typ.
Table 7: Source Drain Diode
Symbol
Max.
Unit
Source-drain Current
100
A
ISDM (1)
Source-drain Current (pulsed)
400
A
VSD (4)
Forward On Voltage
1.3
V
ISD
trr
Qrr
IRRM
Parameter
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Test Conditions
Min.
ISD = 160 A, VGS = 0
ISD = 100 A, di/dt = 100 A/µs,
VDD = 20 V, Tj = 150°C
(see Figure 16)
88
240
5.5
ns
nC
A
(1) Pulse width limited by safe operating area
(4). Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
3/12
STP200NF04L - STB200NF04L - STB200NF04L-1
Figure 3: Safe Operating Area
Figure 6: Thermal Impedance
Figure 4: Output Characteristics
Figure 7: Transfer Characteristics
Figure 5: Transconductance
Figure 8: Static Drain-source On Resistance
4/12
STP200NF04L - STB200NF04L - STB200NF04L-1
Figure 9: Gate Charge vs Gate-source Voltage
Figure 12: Capacitance Variations
Figure 10: Normalized Gate Thereshold Voltage vs Temperature
Figure 13: Normalized On Resistance vs Temperature
Figure 11: Source-Drain Diode Forward Characteristics
Figure 14: Normalized Breakdown Voltage vs
Temperature
5/12
STP200NF04L - STB200NF04L - STB200NF04L-1
Figure 15: Unclamped Inductive Load Test Circuit
Figure 18: Unclamped Inductive Wafeform
Figure 16: Switching Times Test Circuit For
Resistive Load
Figure 19: Gate Charge Test Circuit
Figure 17: Test Circuit For Inductive Load
Switching and Diode Recovery Times
6/12
STP200NF04L - STB200NF04L - STB200NF04L-1
TO-220 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
A
4.40
4.60
0.173
TYP.
MAX.
0.181
b
0.61
0.88
0.024
0.034
b1
1.15
1.70
0.045
0.066
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.60
0.620
E
10
10.40
0.393
0.409
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
F
1.23
1.32
0.048
0.052
H1
6.20
6.60
0.244
0.256
J1
2.40
2.72
0.094
0.107
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L20
16.40
0.645
L30
28.90
1.137
øP
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
7/12
STP200NF04L - STB200NF04L - STB200NF04L-1
TO-262 (I2PAK) MECHANICAL DATA
mm.
inch
DIM.
MIN.
8/12
TYP
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
A1
2.40
2.72
0.094
0.107
b
0.61
0.88
0.024
0.034
b1
1.14
1.70
0.044
0.066
c
0.49
0.70
0.019
0.027
c2
1.23
1.32
0.048
0.052
D
8.95
9.35
0.352
0.368
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
E
10
10.40
0.393
0.410
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L2
1.27
1.40
0.050
0.055
STP200NF04L - STB200NF04L - STB200NF04L-1
D2PAK MECHANICAL DATA
TO-247 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
A1
2.49
2.69
0.098
0.106
A2
0.03
0.23
0.001
0.009
B
0.7
0.93
0.027
0.036
B2
1.14
1.7
0.044
0.067
C
0.45
0.6
0.017
0.023
C2
1.23
1.36
0.048
0.053
D
8.95
9.35
0.352
0.368
D1
E
8
10
E1
0.315
10.4
0.393
8.5
0.334
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.625
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
M
2.4
3.2
0.094
0.126
R
0º
0.015
4º
3
V2
0.4
1
9/12
STP200NF04L - STB200NF04L - STB200NF04L-1
D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
mm
MIN.
A
B
1.5
C
12.8
D
20.2
G
24.4
N
100
T
TAPE MECHANICAL DATA
DIM.
mm
MIN.
MAX.
MIN.
A0
10.5
10.7
0.413 0.421
B0
15.7
15.9
0.618 0.626
D
1.5
1.6
0.059 0.063
D1
1.59
1.61
0.062 0.063
E
1.65
1.85
0.065 0.073
MAX.
0.449 0.456
F
11.4
11.6
K0
4.8
5.0
0.189 0.197
P0
3.9
4.1
0.153 0.161
P1
11.9
12.1
0.468 0.476
P2
1.9
2.1
0.075 0.082
R
50
1.574
T
0.25
0.35 0.0098 0.0137
W
23.7
24.3
* on sales type
10/12
inch
0.933 0.956
inch
MAX.
MIN.
MAX.
330
12.992
13.2
0.504 0.520
26.4
0.960 1.039
0.059
0795
3.937
30.4
1.197
BASE QTY
BULK QTY
1000
1000
STP200NF04L - STB200NF04L - STB200NF04L-1
Table 8: Revision History
Date
Revision
11/Apr/2005
1
Description of Changes
First Release.
11/12
STP200NF04L - STB200NF04L - STB200NF04L-1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
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