STV8105 256 x 72 x 4-bit OLED passive matrix controller/driver Data Brief Features Description ■ Supports monochrome, passive-matrix OLED displays in different formats: – 256 x 72 black & white – 256 x 72 x 2-bits /4 levels of gray – 256 x 72 x 4-bits /16 levels of gray – 256 x 36 x 6-bits / 64 levels of gray – 128 x 72 x 6-bits / 64 levels of gray The STV8105 is a low-power, controller/driver “combo” IC for OLED displays. The STV8105 supports 256 columns by 72 rows with 16 levels of gray for monochrome and 2 x 128 columns by 72 rows with 16 levels of gray for “two” color displays. It can control a display of 128 columns by 72 rows or 256 columns by 36 rows with 64 levels of gray in monochrome mode. ■ On-chip DC/DC step-up converter ■ Display power supply up to 25 V ■ Device power supply: 3.0 to 3.6 V ■ Low-power consumption suitable for batteryoperated systems The STV8105 provides all necessary functions in a single chip, including on-chip supply control and bias current generators, resulting in a minimum of external components and in very low-power consumption. ■ Column source current capability: 800 µA, max. ■ Row sink current capability: 110 mA, max. ■ On-chip oscillator ■ Programmable gamma correction ■ Programmable display multiplexing ■ Two brightness control registers of 128 steps each ■ 32 steps dimmer control ■ One time programmable (OTP) fuse ROM for key configuration parameters ■ Dual scan, master/slave capability ■ Selectable 8-bit parallel as well as serial peripheral interfaces January 2007 The STV8105 communicates with the system via fully configurable interfaces (parallel or serial) to ease interfacing with the host microcontroller. The STV8105 has a set of command and control registers that can be addressed by these interfaces. Rev 1 For further information contact your local STMicroelectronics sales office. 1/3 www.st.com 3 STV8105 Table 1. Key features and benefits Features Benefits Column source current capability up to 800 µA Allow high brightness displays On chip oscillator - Embedded DC/DC Reduce system components Figure 1. Functional block diagram Serial interface Parallel interface Status register Instruction decoder Row drivers Display RAM 256 x 72 x 4 bits Control register Clock generators DC/DC converter Scanning control Current reference Column drivers Ordering information Table 2. Order codes Part number Temp range, ° C Package Packing STV8105/WPB -25 to +125 bumped die waffle pack Revision history Table 3. 2/3 Document revision history Date Revision 15-Jan-2007 1 Changes Initial release. STV8105 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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