STMICROELECTRONICS STW12NK95Z

STW11NK100Z
STW12NK95Z
N-channel 950V - 0.69Ω - 10A - TO-247
Zener - Protected SuperMESH™ PowerMOSFET
General features
Type
VDSS
RDS(on)
(@Tjmax)
STW12NK95Z
950 V
< 0.90Ω
■
Gate charge minimized
■
100% avalanche tested
■
Extremely high dv/dt capability
ID
PW
10 A
230W
TO-247
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Internal schematic diagram
Applications
■
Switching application
Order codes
Part number
Marking
Package
Packaging
STW12NK95Z
W12NK95Z
TO-247
Tube
August 2006
Rev 2
1/14
www.st.com
14
Contents
STW12NK95Z
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
2
Protection features of gate-to-source zener diodes . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Electrical characteristics (curves)
............................ 7
3
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2/14
STW12NK95Z
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
VDS
VDGR
VGS
Parameter
Value
Unit
Drain-source voltage (VGS = 0)
950
V
Drain-gate voltage (RGS = 20KΩ)
950
V
Gate-source voltage
± 30
V
ID
Drain current (continuous) at TC = 25°C
10
A
ID
Drain current (continuous) at TC=100°C
6.3
A
IDM(1)
Drain current (pulsed)
40
A
PTOT
Total dissipation at TC = 25°C
230
W
Derating Factor
1.85
W/°C
Gate source ESD (HBM-C=100pF, R=1,5KΩ)
6000
V
4.5
V/ns
-55 to 150
°C
VESD (G-S)
dv/dt
(2)
TJ
Tstg
Peak diode recovery voltage slope
Operating junction temperature
Storage temperature
1. Pulse width limited by safe operating area
2. ISD ≤10A, di/dt ≤200A/µs, VDD ≤V(BR)DSS, Tj ≤TJMAX
Table 2.
Symbol
Rthj-case
Thermal data
Parameter
Thermal resistance junction-case Max
Value
Unit
0.54
°C/W
Rthj-a
Thermal resistance junction-ambient Max
50
°C/W
Tl
Maximum lead temperature for soldering
purpose
300
°C
Table 3.
Symbol
Avalanche characteristics
Parameter
Value
Unit
IAR
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj Max)
10
A
EAS
Single pulse avalanche energy
(starting Tj=25°C, Id=Iar, Vdd=50V)
500
mJ
3/14
Electrical ratings
Table 4.
Symbol
BVGSO
1.1
STW12NK95Z
Gate-source zener diode
Parameter
Test conditions
Gate-source breakdown voltage Igs=± 1mA (Open Drain)
Min.
Typ.
30
Max.
Unit
V
Protection features of gate-to-source zener diodes
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
4/14
STW12NK95Z
2
Electrical characteristics
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 5.
Symbol
On/off states
Parameter
Test conditions
Drain-source breakdown
voltage
ID = 1mA, VGS= 0
IDSS
Zero gate voltage drain
current (VGS = 0)
VDS = Max rating,
VDS = Max rating,
Tc = 125°C
IGSS
Gate body leakage current
VGS = ± 20V
(VGS = 0)
V(BR)DSS
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 100µA
RDS(on)
Static drain-source on
resistance
VGS = 10V, ID = 5 A
Table 6.
Symbol
Parameter
Test conditions
Forward transconductance VDS =15V, ID = 5A
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
Qg
Qgs
Qgd
Typ.
Max.
Unit
950
3
V
1
50
µA
µA
±10
µA
3.75
4.5
V
0.69
0.9
Ω
Typ.
Max.
Unit
Dynamic
gfs (1)
Cosseq(2).
Min.
Min.
12
S
VDS =25V, f=1 MHz, VGS=0
3500
280
58
pF
pF
pF
Equivalent output
capacitance
VGS=0, VDS =0V to 760V
117
pF
Total gate charge
Gate-source charge
Gate-drain charge
VDD=760V, ID = 10A
VGS =10V
(see Figure 15)
113
19
60
152
nC
nC
nC
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Table 7.
Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Test conditions
VDD=475V, ID=5A,
RG=4.7Ω, VGS=10V
(see Figure 14)
VDD=475V, ID=5A,
RG=4.7Ω, VGS=10V
(see Figure 14)
Min.
Typ.
Max.
Unit
31
20
ns
ns
88
55
ns
ns
5/14
Electrical characteristics
Table 8.
Symbol
ISD
ISDM(1)
VSD
(2)
trr
Qrr
IRRM
trr
Qrr
IRRM
STW12NK95Z
Source drain diode
Parameter
Max
Unit
Source-drain current
10
A
Source-drain current (pulsed)
40
A
Min
Typ.
1.6
V
Forward on voltage
ISD=8.3A, VGS=0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=10,
di/dt = 100A/µs,
VDD=50V, Tj=25°C
728
78
21.6
ns
µC
A
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=10A,
di/dt = 100A/µs,
VDD=50V, Tj=150°C
964
11
23
ns
µC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
6/14
Test conditions
STW12NK95Z
Electrical characteristics
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characterisics
Figure 4.
Transfer characteristics
Figure 5.
Transconductance
Figure 6.
Static drain-source on resistance
7/14
Electrical characteristics
STW12NK95Z
Figure 7.
Gate charge vs gate-source voltage Figure 8.
Figure 9.
Normalized gate threshold voltage
vs temperature
Figure 11. Source-drain diode forward
characteristics
8/14
Capacitance variations
Figure 10. Normalized on resistance vs
temperature
Figure 12. Normalized BVDSS vs temperature
STW12NK95Z
Electrical characteristics
Figure 13. Maximum avalanche
energy vs temperature
9/14
Test circuit
3
STW12NK95Z
Test circuit
Figure 14. Switching times test circuit for
resistive load
Figure 15. Gate charge test circuit
Figure 16. Test circuit for inductive load
Figure 17. Unclamped Inductive load test
switching and diode recovery times
circuit
Figure 18. Unclamped inductive waveform
10/14
Figure 19. Switching time waveform
STW12NK95Z
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/14
Package mechanical data
STW12NK95Z
TO-247 MECHANICAL DATA
DIM.
mm.
MIN.
inch
MAX.
MIN.
TYP.
MAX.
A
4.85
5.15
0.19
0.20
A1
2.20
2.60
0.086
0.102
b
1.0
1.40
0.039
0.055
b1
2.0
2.40
0.079
0.094
0.134
b2
3.0
3.40
0.118
c
0.40
0.80
0.015
0.03
D
19.85
20.15
0.781
0.793
E
15.45
15.75
0.608
e
5.45
0.620
0.214
L
14.20
14.80
0.560
L1
3.70
4.30
0.14
L2
18.50
0.582
0.17
0.728
øP
3.55
3.65
0.140
0.143
øR
4.50
5.50
0.177
0.216
S
12/14
TYP
5.50
0.216
STW12NK95Z
5
Revision history
Revision history
Table 9.
Revision history
Date
Revision
Changes
16-Jan-2006
1
Initial release.
01-Aug-2006
2
New template, no content change
13/14
STW12NK95Z
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