STMICROELECTRONICS TDA7338D013TR

TDA7338
STEREO DECODER
1
FEATURES
■
INTEGRATED 19KHz SC NOTCH FILTERFOR
PILOT CANCELLATION
■
ON CHIP FILTER FOR PILOT DETECTOR
AND PLL
■
ADJUSTMENT FREE VOLTAGE
CONTROLLED OSCILLATOR
■
AUTOMATIC PILOT DEPENDENT MONO/
STEREO SWITCHING
■
NOISE BLANKING WITH PROGRAMMABLE
THRESHOLD
■
HIGH CUT CONTROL AND STEREO BLEND
INTEGRATED HIGH PASS FILTER FOR
INTERFERENCE DETECTOR
■
LEVEL INPUT FOR ADDITIONAL SPIKE
DETECTION ON FIELDSTRENGHT SIGNAL
■
VERY HIGH SUPPRESSION OF HARMONIC
AND INTERFERENCE SIGNALS
Figure 1. Package
SO20
Table 1. Order Codes
2
Part Number
Package
TDA7338D
SO20
TDA7338D013TR
SO20 in Tape & Reel
DESCRIPTION
The TDA7338 is a new concept of monolithic integrated stereo decoder with noise blanking for FM
car radio applications. With the used BICMOS
technique, the 19KHz Notch Filter, the PLL Filter
and Phase Filter is realized on the chip with a
Switched Capacitor concept. Avoiding the use of
multipliers and non linear circuits a very high performance in terms of noise suppression and total
harmonic distortion is
Figure 2. reached.Block Diagram
April 2005
Rev. 9
1/12
TDA7338
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
10.5
V
20
mA
VCC
DC Supply Voltage
ICC
Suply Current
Tstg
Storage Temperature
-55 to 150
°C
Tamb
Operating AmbientTemperature
-40 to 85
°C
Value
Unit
200
°C/W
Table 3. Thermal Data
Symbol
Parameter
Rth j-pins
Thermal resistance junction-pins
Figure 3. Block Diagram and Test Circuit
40.2K
1µF
1nF
MPX
PILOT
IND.
MONO
MPX IN
20
19
VR
18
VSB
17
VHCC
16
1nF
HCL
15
HCR
14
13
12
70K
IN R
40.2K
AMP
PILOT
DETECTOR
20K
LEVEL
CONTROL
11
AMP
OUT R
HIGH
CUT
CONTROL
80KHz
LPF
DEMODULATOR
25KHz
LPF
19KHz
SC NOTCH
20K
NOISE
BLANKER
10
OUT L
AMP
40.2K
9
IN L
PLL
SC
PHASE
DETECTOR
&
PHASE
FILTER
DIVIDERS
VCO
2
VCO
PEAK
DETECTOR
AMP
140KHz
LPF
120KHz
LPF
TRIGGER
THRESHOLD
4
REFERENCE
CREF
4.7µF
6
1
LEVEL
PROG
CSB456F11
7
TBLANK
470pF
VCO OFF
2/12
PULSE
FORMER
8
3
PEAK
GND
5
VS
47nF
MUTE
D95AU364C
TDA7338
3
ELECTRICAL CHARACTERISTCS
Table 4.
(VCC = 9V; modulation frequency: 1KHz; de-emphasis time: T = 50µs; nominal MPX input voltage:
VMPX = 1.5VPP; m 100% (75KHz deviation, fmod = 1KHz); RIN = 40.2kΩ, ROUT = 40.2kΩ;
Tamb = 27°C; CREF = 4.7µF; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VCC
Supply Voltage
7.5
9
10.2
V
ICC
Supply Current
5
10
15
mA
VIN
MPX Input Level (peak to peak)
fm = 1KHz
1.5
V
A.F. Output Voltage (mono)
pin 10 and 11VIN = 0.5VRMS
MONO;
1.5
V
VORMS
SVRR
Supply Voltage Ripple Rejection
VRIPPLE = 200mV; f = 1KHz
VL/VR
Difference of Output Voltage
Levels
pin 10 and 11- mono
-0.8
Vo/Vi
Gain
V10/V20
8.5
RO
Output Resistance
pin 10 and 11
VO
DC Output Voltage
pin 10 and 11
α
Channel Separation
VR - VSB = -50mVDC
40
55
dB
0.8
dB
9.5
10.5
dB
10
50
Ω
4.2
4.5
4.8
30
45
0.02
V
dB
THD
Total Harmonic Distortion
S+N
-------------N
Signal plus noise to noise ratio
f = 20Hz to 16KHz; S = 2Vrms
91
dB
αM
Muting Attenuation
V7 and V8 < 0.6V
100
dB
VDC
Mute DC Steps at pins 10, 11
Mute at pin 8
0
0.3
4
%
mV
CARRIER AND HARMONIC SUPPRESSION AT THE OUTPUT
α19
Pilot Signal f = 19KHz
70
dB
α38
Subcarrier f = 38KHz
75
dB
α57
Subcarrier f = 57KHz
62
dB
α76
Subcarrier f = 76KHz
90
dB
55
INTERMODULATION (note 1)
α2
fmod = 10KHz; fspur = 1KHz
65
dB
α3
fmod = 13KHz; fspur = 1KHz
75
dB
70
dB
75
dB
TRAFFIC RADIO (note 2)
α57
Signal f = 57KHz
SCA - SUBSIDIARY COMMUNICATIONS AUTHORIZATION (note 3)
α67
Signal f = 67KHz
ACI - ADJACENT CHANNEL INTERFERENCE (note4)
α114
Signal f = 114KHz
95
dB
α190
Signal f = 190KHz
84
dB
MONO/ STEREO SWITCH
VINTH
Pilot Threshold Voltage
for stereo "ON"
12
VINTH
7
20
28
mVRMS
14
21
mVRMS
0.2
0.5
V
Pilot Threshold Voltage
for stereo "OFF"
VPI
Pilot Indicator Saturation
Voltage
I = 1mA
IPI
Pilot Indicator Leakage Current
V = 9V
10
µA
V19
Control Voltage for forced mono
α = < 3dB
0.8
V
3/12
TDA7338
Table 4.
(VCC = 9V; modulation frequency: 1KHz; de-emphasis time: T = 50µs; nominal MPX input voltage:
VMPX = 1.5VPP; m 100% (75KHz deviation, fmod = 1KHz); RIN = 40.2kΩ, ROUT = 40.2kΩ;
Tamb = 27°C; CREF = 4.7µF; unless otherwise specified)
STEREO BLEND
V16-17
Control Voltage for Channel
Separation
α = 6dB; VR = 3.6V (note 5)
V16-17
Control Voltage for Channel
Separation
-0.31
-0.27
-0.23
V
α = 26dB;
-85
-55
-30
mV
HIGH CUT CONTROL
τdeemp
De-Emphasis Time Constant
C13, C14 = 1nF; V15-17 = 50mV
43
50
57
µs
R15-17
High Cut Control Resistance
V15 - 17 = 50mV
43
50
57
KΩ
R15-17
High Cut Control Resistance
V15 - 17 = -0.5V (note 5)
115
150
185
KΩ
fosc
Oscillator Frequency
with Murata CSB456F11
∆f/f
Capture and Holding Range
VCO
VVCO
VCO OFF
456
KHz
±1
%
Pin 7
0.6
V
NOISE INTERFACE DETECTOR (test condition: VSB > VR + 50mV)
VTR
VTR
Trigger Threshold (note 6)
Trigger Threshold
VPEAK = 1.3V; PROG = GND
180
mV
VPEAK = 1.3V;
PROG = OPEN/VDD
250
mV
VPEAK = 1.5V; PROG = GND
260
mV
VPEAK = 1.5V;
PROG = OPEN/VDD
340
mV
µs
pA
Suppression Pulse Duration
Input Offset Current during
suppression time
VN1
VPEAK (pin 8)
VIN = 0mVRMS
0.7
1.0
1.3
V
VN2
VPEAK (pin 8)
VIN = 50mVRMS; f = 150KHz
1.1
1.5
2
V
VN3
VPEAK (pin 8)
VIN = 100mVRMS; f = 150KHz
1.7
2.3
2.8
V
CBLANK = 470pF
3.1 NOTES TO THE CHARACTERISTICS
1) INTERMODULATION SUPPRESSION
V O ( signal ) ( at1KHz )
α2 = ------------------------------------------------------------------ ; fs = (2 x 10KHz) - 19KHz
V O ( spurious ) ( at1KHz )
V O ( signal ) ( at1KHz )
α3 = ------------------------------------------------------------------ ; fs = (3 x 13KHz) - 38KHz
V O ( spurious ) ( at1KHz )
measured with : 91% mono signal; 9% pilot signal; fm=10KHz or 13KHz
2) TRAFFIC RADIO (V.F.) suppression
V O ( signal ) ( at1KHz )
α57 ( V.W.F. ) = -------------------------------------------------------------------------------------------V O ( spurious ) ( at1KHz ± 23KHz )
measured with : 91% stereo signal; 9% pilot signal; fm=1KHz; 5% subcarrier
(f = 57KHz, fm = 23Hz AM, m = 60%)
4/12
50
10
TS
IOS
TDA7338
3. SCA (SUBSIDIARY COMMUNICATIONS AUTHORIZATION)
V O ( signal ) ( at1KHz )
α67 = ------------------------------------------------------------------ ; fs = (2 x 38KHz) - 67KHz
V O ( spurious ) ( at9KHz )
measured with : 81% mono signal; 9% pilot signal; fm=1KHz;
10% SCA - subcarrier (fs = 67KHz, unmodulated)
4. ACI (ADJACENT CHANNEL INTERFERENCE)
V O ( signal ) ( at1KHz )
α114 = -----------------------------------------------------------------V O ( spurious ) ( at4KHz )
; fs = 110KHz - (3 x 38KHz)
V O ( signal ) ( at1KHz )
α190 = -----------------------------------------------------------------V O ( spurious ) ( at4KHz )
; fs = 186KHz - (5 x 38KHz)
measured with : 90% mono signal; 9% pilot signal; fm=1KHz; 1% spurious signal
(fs = 110KHz or 186KHz, unmodulated)
5. Control range typ 11% of VR (see figure 5 and figure 6)
6. MEASUREMENT OF TRIGGER THRESHOLDS
All thresholds are measured by using a pulse with TR = 2µs, THIGH = 2µs, and TF = 10µs. The repetition
rate must not increase the PEAK voltage.
Figure 4.
Vin
VTR
DC
D95AU365
TR
4
THIGH
TF
Time
FUNCTIONAL DESCRIPTION
4.1 Signal Path
The TDA7338 Stereodecoder contains all necessary functions for processing the MPX signal. Due to the
external input resistance (Pin 20) the circuit can be adapted to different MPX input levels. Behind a 80kHz
lowpass filter the adjustment free PLL for the pilot Tone is placed.
The only external component needed for the PLL is the ceramic resonator for the oscillator which runs at
456kHz.
The pilot detector output is designed as an open collector output, therefore an external pullup resistor is
needed. To force the decoder to "MONO" Pin 19 has to be clamped to a voltage below 0.8V.
The voltage level (signal strength from the IF part) applied to Pin 15 (VHCC) allows to control the time
constant of the deemphasis (nom. = 50µs, see fig. 5). If the RF-signal is weak, the corner frequency is
reduced down to 1kHz to improve the signal to noise ratio.
5/12
TDA7338
Figure 5. High Cut Control
Figure 6. Stereo Blend
D95AU366
fc
(KHz)
D95AU367
SEP
(dB)
50
3.18
(=50µs)
40
VR=3.6V
VR=3.6V
30
2
20
1
10
0
-0.5
-0.4
-0.3
-0.2
-0.1
0.0 VHCC-VR(V)
0
-0.40
-0.32
-0.24
-0.16
-0.08 VSB-VR(V)
Furthermore the conditions of the stereo separation (see fig.6) can be controlled through the signal applied
to Pin 16 (VSB). Both signal levels (VSB and VHCC) are referred to Pin 17 (VR), with the characteristic
that the control range is 11% of VR. By modifying the feedback resistor value of the output stages (Pin 9
- 10, Pin 11 - 12) the total gain of the stereodecoder can be modified.
Pin 7 and Pin 8 have an additional function. By pulling them to ground the VCO-OFF (Pin 7) and the MUTE
(Pin 8) function are activated. The MUTE signal disconnects the MPX-signal from the circuit, while in combination with VCO-OFF also the output buffers are disconnected from the circuit. In this mode the output
buffers can be used for AM-stereo, cassette play back and other purposes.
4.2 AM Mono Mode
By selecting VCO-OFF (Pin 7 to GND) the VCO is switched off and the SB and HCC are disabled. The
deemphasis time constant is changed to 40µs (fc = 4KHz).
4.3 DESCRIPTION OF THE NOISE BLANKER
In the normal automotive environment the MPX signal is disturbed by ignition spikes, motors and high frequency switches etc.
The aim of the noise blanker part is to cancel the influence of the spikes produced by these components.
Therefore the output of the stereodecoder is switched off for a time of 40µs (average spike duration).
In a first stage the spikes must be detected but to avoid a wrong triggering on high frequency noise a complex trigger control is implemented. Behind the trigger stage a pulse former generates the 40ms "blanking"
pulse. This duration of 40µs can be varied by changing the capacitor at pin 7.
4.3.1 Trigger Path
The incoming MPX signal is highpass-filtered, amplified and rectified (block RECT-PEAK). The second
order highpass-filter has a corner-frequency of 140KHz.
The rectifier signal, RECT, is used to generate by peak-rectification a signal called PEAK, which is available at the PEAK pin 8.
Also noise with a frequency >100KHz increases the PEAK voltage. The value of the PEAK voltage influences the trigger threshold voltage Vth (block ATC). The higher the noise level the higher the threshold.
Both signals, RECT and PEAK+Vth are fed to a comparator (block PEAK-COMP) which outputs a sawtooth-shaped waveform at the TBLANK pin 7. A second comparator (block BLANK-COMP) forms the internal blanking duration of 40µs. The noise blanker is supplied by his own biasing circuit (block BIASMONO) to avoid any cross talk to the signal path (block BIAS-MONO).
6/12
TDA7338
4.3.2 Noise Controlled Threshold Adjustment (ATC)
The behaviour of the noise controlled threshold adjustment is shown in fig. 8. It can be influenced lightly
by adding a resistor in parallel to the PEAK capacitor at Pin 8 either to GND or VDD. A resistor to GND
will decrease the threshold whereas a resistor to VDD will increase it. But it is recommended to choose
one of the internal thresholds by use of the PROG pin (see table 5)
4.3.3 Automatic Threshold Control by the Stereoblend voltage (ATC-SB)
Besides the noise controlled threshold adjustment there is an additional possibility for influencing the trigger. It is controlled by the difference between Vsb and Vr, similar to the Stereoblend. The reason for implementing such a second control will be explained in the following: The point where the MPX signal starts
to become noisy is fixed by the RF part. Therefore also the starting point of the normal noise controlled
trigger adjustment is fixed (fig.9). But in some cases the behaviour of the noiseblanker can be improved
by increasing the threshold even in a region of higher fieldstrength, for the MPX signal often shows distortion in this range, which leads to an undesired triggering.
Because of the overlap of this range and the range of the stereo/mono transition it can be controlled by
Vsb and Vr. This threshold increase is programmable (see fig. 9).
4.3.4 Blend Mode
Another possibility to avoid a disturbing triggering on modulation is to use the spikes on the fieldstrength
signal (LEVEL pin). But in the range of higher fieldstrength the signal saturates and no more spike detection is possible. For this reason the TDA7338 offers the "BLEND MODE". When "BLEND MODE" is activated a smooth transition between the LEVEL- and the MPX-signal is used to detect the spikes either on
LEVEL or on MPX.
In the lower fieldstrength range mainly the LEVEL-signal is used whereas in the higher range mainly the
MPX is used.
This switching is controlled also by the normal Stereoblend signal to avoid additional pins. "BLEND MODE
OFF" is activated by connecting the LEVEL pin to GND (LEVEL must be also connected to GND if not
used).
Figure 7. Block Diagram of the Noise Blanker
LEFT
80KHz LP
SIGNAL PATH
RECT
140KHz HP
MPX IN
AMP
BUF
PEAK
AUTOMATIC
THRESHOLD
CONTROL
BLANK COMP
PEAK COMP
REF.
+
+
ATC
120KHz HP
LEVEL
to OUTPUTS
RIGHT
PEAK+VTH
40µs
2V
VS
THRESHOLD L/H
RECT-PEAK
PROG
BLEND
CONTROL
BLEND
ON/OFF
0.1V
ADDITIONAL THRESHOLD
CONTROL on/off
+
-
ADDITIONAL THRESHOLD
CONTROL
(ATC-SB)
7V
VR
VSB
CPEAK
47nF
CBLANK
330pF
D95AU368
7/12
TDA7338
Table 5. Programming of the Noiseblanker
PIN 1 (PROG)
Trigger Threshold
Peak Voltage Control By Fieldstrength
GND
LOW
ON
OPEN
HIGH
ON
VDD
HIGH
OFF
Figure 8. Trigger Threshold vs. VPEAK
VTH
300mV
180mV
MIN. TRIG. THRESHOLD
NOISE ADJUSTED
TRIG. THRESHOLD
100mV
60mV
0.9V
D95AU369
1.5V
VPEAK(V)
Figure 9. Behaviour of the Field Strength Controlled Threshold Adiustment
VPEAK
MONO
STEREO
≈3V
2.2V
TRIG. THRESHOLD
0.9V
NOISE
noisy signal
8/12
ATC_SB OFF
(PROG=VS)
D95AU370
good signal
E'
TDA7338
Figure 10. Application Diagram
1nF 2)
68K 1)
SIGNAL
STRENGTH
14
15
47K
13
47K 1)
16
1nF 2)
47K
VR
12
17
PILOT_IND
18
19
TDA7338
100K
MONO
68K
470nF
IN R
47K
11
OUT
6
LEVEL
(SIGNAL STRENGTH)
9
IN L
47K
33K
56pF 3)
56pF 3)
10K
MPX
10
20
OUT
4)
680pF
VCO_OFF
(FM ENABLE)
7
8
1
100K
2
4
5
3
10K
MUTE
100K
330pF
456KHz
10µF
100nF
47nF
10K
D95AU371A
VS 9V
1)
2)
3)
4)
has to be adapted to the signal strength
for deemphasis = 50µs
not absolutely necessary
roll off: to be adjusted to the tuner part
9/12
TDA7338
Figure 11. SO20 Mechanical Data & Package Dimensions
mm
inch
DIM.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.35
2.65
0.093
0.104
A1
0.10
0.30
0.004
0.012
B
0.33
0.51
0.013
0.200
C
0.23
0.32
0.009
0.013
D (1)
12.60
13.00
0.496
0.512
E
7.40
7.60
0.291
0.299
e
1.27
0.050
H
10.0
10.65
0.394
0.419
h
0.25
0.75
0.010
0.030
L
0.40
1.27
0.016
0.050
k
ddd
OUTLINE AND
MECHANICAL DATA
0˚ (min.), 8˚ (max.)
0.10
0.004
(1) “D” dimension does not include mold flash, protusions or gate
burrs. Mold flash, protusions or gate burrs shall not exceed
0.15mm per side.
SO20
0016022 D
10/12
TDA7338
5
REVISION HISTORY
Table 6. Revision History
Date
Revision
Description of Changes
October 2004
8
First Issue in EDOCS
April 2005
9
Changed the Style-cheet in compliance to the new “Corporate Technical
Pubblications Design Guide.
Deleted DIP20 Package
11/12
TDA7338
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2005 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
12/12