VN800S-E VN800PT-E HIGH SIDE DRIVER Table 1. General Features Type VN800S-E VN800PT-E Figure 1. Package RDS(on) IOUT VCC 135 mΩ 0.7 A 36 V CMOS COMPATIBLE INPUT THERMAL SHUTDOWN ■ CURRENT LIMITATION ■ SHORTED LOAD PROTECTION ■ UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN ■ PROTECTION AGAINST LOSS OF GROUND ■ VERY LOW STAND-BY CURRENT ■ REVERSE BATTERY PROTECTION (*) ■ IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE ■ ■ SO-8 PPAK Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. Device automatically turns off in case of ground pin disconnection. This device is especially suitable for industrial applications in norms conformity with IEC1131 (Programmable Controllers International Standard). DESCRIPTION The VN800S-E, VN800PT-E are monolithic devices made by using STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes. Table 2. Order Codes Package Tube Tape and Reel SO-8 VN800S-E VN800STR-E PPAK VN800PT-E VN800PTTR-E Note: (*) See application schematic at page 10. Rev. 1 October 2004 1/24 VN800S-E / VN800PT-E Figure 2. Block Diagram VCC OVERVOLTAGE DETECTION VCC CLAMP UNDERVOLTAGE DETECTION GND Power CLAMP DRIVER OUTPUT LOGIC INPUT CURRENT LIMITER STATUS OVERTEMPERATURE DETECTION Table 3. Absolute Maximum Ratings Symbol VCC - VCC - IGND IOUT - IOUT IIN VIN VSTAT VESD Ptot EMAX EMAX Tj Tc Tstg Lmax 2/24 Parameter DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current Input Voltage Range DC Status Voltage Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF) Value SO-8 PPAK Unit 41 - 0.3 - 200 Internally Limited -6 +/- 10 -3/+VCC + VCC V V mA A A mA V V - INPUT 4000 V - STATUS 4000 V - OUTPUT 5000 V - VCC Power Dissipation TC=25°C Maximum Switching Energy 5000 (L=77.5mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=1.5A) Maximum Switching Energy (L=125mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=1.5A) Junction Operating Temperature Case Operating Temperature Storage Temperature Max Inductive Load (VCC=30V; ILOAD=0.5A; Tamb=100°C; Rthcase>ambient≤25°C/W) 4.2 41.7 121 V W mJ 195 mJ Internally Limited - 40 to 150 - 55 to 150 °C °C °C 2 H VN800S-E / VN800PT-E Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins VCC VCC 5 4 5 4 3 2 1 N.C. STATUS OUTPUT INPUT OUTPUT VCC 8 1 GND SO-8 OUTPUT STATUS INPUT GND PPAK Connection / Pin Status Floating X To Ground N.C. X X Output X Input X Through 10KΩ resistor Figure 4. Current and Voltage Conventions IS VF IIN VCC INPUT ISTAT IOUT STATUS VCC OUTPUT GND VIN VSTAT VOUT IGND Table 4. Thermal Data Symbol Rthj-case Thermal Resistance Junction-case Rthj-lead Thermal Resistance Junction-lead Rthj-amb Value Parameter Thermal Resistance Junction-ambient Max Max Max Max SO-8 PPAK - 3 30 - 1 Unit °C/W °C/W 3 93 ( ) 78 ( ) °C/W 82 (2) 45 (4) °C/W (1) When mounted on FR4 printed circuit board with 0.5 cm 2 of copper area (at least 35µ thick) connected to all VCC pins. (2) When mounted on FR4 printed circuit board with 2 cm 2 of copper area (at least 35µ thick). (3) When mounted on FR4 printed circuit board with 0.5 cm 2 of copper area (at least 35µ thick) connected to all VCC pins. (4) When mounted on FR4 printed circuit board with 6 cm 2 of copper area (at least 35µ thick). 3/24 VN800S-E / VN800PT-E ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified) Table 5. Power Symbol Parameter VCC Operating Supply Voltage 5.5 VUSD Undervoltage Shut-down 3 4 VOV Overvoltage Shut-down 36 42 RON On State Resistance IS Supply Current Test Conditions Min. Typ. Max. Unit 36 V 5.5 V V IOUT =0.5A; Tj=25°C 135 mΩ IOUT=0.5A 270 mΩ 10 20 µA 1.5 3.5 mA 2.6 mA 1 mA 50 µA Off State; VCC=24V; Tcase=25°C On State; VCC=24V On State; VCC=24V; Tcase=100°C ILGND Output Current at turn-off VCC=VSTAT=VIN=VGND=24V;VOUT=0V IL(off1) Off State Output Current VIN=VOUT=0V IL(off2) Off State Output Current VIN=VOUT=0V; VCC=13V; Tj =125°C 5 µA IL(off3) Off State Output Current VIN=VOUT=0V; VCC=13V; Tj =25°C 3 µA Max. Unit 0 Table 6. Switching (VCC =24V) Symbol Parameter Test Conditions Min. Typ. td(on) Turn-on Delay Time RL=48Ω from VIN rising edge to VOUT=2.4V 10 µs td(off) Turn-off Delay Time RL=48Ω from VIN falling edge to VOUT=21.6V 40 µs dVOUT/ dt(on) Turn-on Voltage Slope RL=48Ω from VOUT=2.4V to VOUT=19.2V See relative diagram V/µs dVOUT/ dt(off) Turn-off Voltage Slope RL=48Ω from VOUT=21.6V to VOUT=2.4V See relative diagram V/µs Table 7. Input Pin Symbol Parameter VINL Input Low Level IINL Low Level Input Current VINH Input High Level IINH High Level Input Current VI(hyst) Input Hysteresis Voltage IIN 4/24 Input Current Test Conditions VIN=1.25V Min. Typ. Max. Unit 1.25 V 1 µA 3.25 V VIN=3.25V 10 0.5 VIN=VCC=36V µA V 200 µA VN800S-E / VN800PT-E ELECTRICAL CHARACTERISTICS (continued) Table 8. VCC - Output Diode Symbol VF Parameter Test Conditions Forward on Voltage Min. Typ. -IOUT=0.6A; Tj=150°C Max. Unit 0.6 V Max 0.5 10 Unit V µA 30 pF Max 200 Unit °C °C °C 20 µs 2 A VCC-57 V Table 9. Status Pin Symbol VSTAT ILSTAT CSTAT Parameter Test Conditions Status Low Output Voltage ISTAT=1.6 mA Status Leakage Current Normal Operation; VSTAT=VCC=36 V Status Pin Input Normal Operation; VSTAT= 5V Capacitance Min Typ Table 10. Protections (see note 1) Symbol TTSD TR Thyst TSDL Ilim Vdemag Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status Delay in Overload Condition DC Short Circuit Current Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 15 Tj>Tjsh VCC=24V; RLOAD=10mΩ 0.7 IOUT=0.5 A; L=6mH VCC-47 VCC-52 Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Figure 5. OVERTEMP STATUS TIMING Tj>Tjsh VIN VSTAT tSDL tSDL 5/24 VN800S-E / VN800PT-E Table 11. Truth Table CONDITIONS INPUT OUTPUT STATUS Normal Operation L H L H H H Current Limitation L H H L X X H (Tj < TTSD) H (Tj > TTSD) L Overtemperature L H L L H L Undervoltage L H L L X X Overvoltage L H L L H H Figure 6. Switching time Waveforms VOUT 90% 80% dVOUT/dt(off) dVOUT/dt(on) tr 10% tf t VIN td(on) td(off) t 6/24 VN800S-E / VN800PT-E Table 12. Electrical Transient Requirements On VCC Pin TEST LEVELS ISO T/R 7637/1 Test Pulse I II III IV 1 2 3a 3b 4 5 -25 V +25 V -25 V +25 V -4 V +26.5 V -50 V +50 V -50 V +50 V -5 V +46.5 V -75 V +75 V -100 V +75 V -6 V +66.5 V -100 V +100 V -150 V +100 V -7 V +86.5 V ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E Delays and Impedance 2 ms 10 Ω 0.2 ms 10 Ω 0.1 µs 50 Ω 0.1 µs 50 Ω 100 ms, 0.01 Ω 400 ms, 2 Ω I TEST LEVELS RESULTS II III IV C C C C C C C C C C C E C C C C C E C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Figure 7. Peak Short Circuit Current Test Circuit +VCC 10kΩ STATUS CONTROL UNIT VCC INPUT OUTPUT RIN GND RL=10mΩ GND 7/24 VN800S-E / VN800PT-E Figure 8. Avalanche Energy Test Circuit +VCC 10kΩ STATUS CONTROL UNIT VCC INPUT OUTPUT RIN GND LOAD GND 8/24 VN800S-E / VN800PT-E Figure 9. Waveforms NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VCC VUSD INPUT LOAD VOLTAGE STATUS undefined OVERVOLTAGE VCC<VOV VCC>VOV VCC INPUT LOAD VOLTAGE STATUS Tj TTSD TR OVERTEMPERATURE INPUT LOAD CURRENT STATUS 9/24 VN800S-E / VN800PT-E Figure 10. Application Schematic VCC 24VDC 5V Volt. Reg Control & Diagnostic I/O VCC Rprot STATUSn OUTPUTn Rprot INPUTn BUS ASIC LOAD R GND L VGND GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND ≤ 600mV / (IS(on)max). 2) RGND ≥ (−VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device’s datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device will be driving an inductive load. 10/24 RGND DGND This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. µC I/Os PROTECTION: If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V 5kΩ ≤ Rprot ≤ 65kΩ. Recommended Rprot value is 10kΩ. VN800S-E / VN800PT-E Figure 11. Off State Output Current Figure 12. High Level Input Current Iih (µA) IL(off1) (µA) 8 2.5 2.25 7 Off state Vcc=36V Vin=Vout=0V 2 1.75 Vin=3.25V 6 5 1.5 4 1.25 1 3 0.75 2 0.5 1 0.25 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) Tc (ºC) Figure 13. Status Leakage Current Figure 15. On State Resistance Vs VCC Ron (mOhm) Ilstat (µA) 400 0.1 0.09 350 Vstat=Vcc=36V Iout=0.5A 0.08 300 0.07 250 0.06 Tc= 150ºC 200 0.05 0.04 150 Tc= 25ºC 0.03 100 0.02 Tc= - 40ºC 50 0.01 0 0 -50 -25 0 25 50 75 100 125 150 5 175 10 15 20 25 30 35 40 Vcc (V) Tc (ºC) Figure 16. Input High Level Figure 14. On State Resistance Vs Tcase Ron (mOhm) Vih (V) 400 3.6 3.4 350 Iout=0.5A Vcc=8V; 13V; 36V 300 3.2 250 3 200 2.8 150 2.6 100 2.4 50 2.2 2 0 -50 -25 0 25 50 75 Tc (ºC) 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) 11/24 VN800S-E / VN800PT-E Figure 17. Input Low Level Figure 20. Input Hysteresis Voltage Vil (V) Vhyst (V) 2.6 1.5 1.4 2.4 1.3 2.2 1.2 2 1.1 1 1.8 0.9 1.6 0.8 1.4 0.7 1.2 0.6 1 0.5 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) dVout/dt(on) (V/ms) dVout/dt(off) (V/ms) 800 700 Vcc=24V Rl=48Ohm 125 150 175 Vcc=24V Rl=48Ohm 600 1000 500 800 400 600 300 400 200 200 100 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (ºC) 50 75 100 125 150 175 100 125 150 175 Tc (ºC) Figure 19. Overvoltage Shutdown Figure 22. ILIM Vs Tcase Vov (V) Ilim (A) 50 2.5 48 2.25 46 2 44 1.75 42 1.5 40 1.25 38 1 36 0.75 34 0.5 32 0.25 30 Vcc=24V Rl=10mOhm 0 -50 -25 0 25 50 75 Tc (°C) 12/24 100 Figure 21. Turn-off Voltage Slope 1600 1200 75 Tc (°C) Figure 18. Turn-on Voltage Slope 1400 50 100 125 150 175 -50 -25 0 25 50 75 Tc (ºC) VN800S-E / VN800PT-E Figure 23. SO-8 Maximum turn off current versus load inductance ILMAX (A) 10 A B 1 C 0.1 1 10 100 1000 L(mH ) A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 13/24 VN800S-E / VN800PT-E Figure 24. PPAK Maximum turn off current versus load inductance ILMAX (A) 10 A B 1 C 0.1 1 10 100 1000 L(mH) A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 14/24 VN800S-E / VN800PT-E SO-8 Thermal Data Figure 25. SO-8 PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: 0.14cm2, 2cm2). Figure 26. SO-8 Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb (ºC/W) SO8 at 2 pins connected to TAB 110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 2 2.5 PCB Cu heatsink area (cm^2) 15/24 VN800S-E / VN800PT-E PPAK Thermal Data Figure 27. PPAK PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: 0.44cm2, 8cm2). Figure 28. PPAK Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb (ºC/W) 90 80 70 60 50 40 30 20 10 0 0 2 4 6 PCB Cu heatsink area (cm^2) 16/24 8 10 VN800S-E / VN800PT-E Figure 29. SO-8 Thermal Impedance Junction Ambient Single Pulse ZT H (°C/W) 1000 0.5 cm2 100 2 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 T ime (s) Figure 30. Thermal fitting model of a single channel HSD in SO-8 10 100 1000 Pulse calculation formula Z THδ = R T H ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Table 13. Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 0.14 0.24 1.2 4.5 21 16 58 0.00015 0.0005 7.50E-03 0.045 0.35 1.05 2 28 2 17/24 VN800S-E / VN800PT-E Figure 31. PPAK Thermal Impedance Junction Ambient Single Pulse ZTH (°C/W) 1000 100 0.44 cm2 6 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) Figure 32. Thermal fitting model of a single channel HSD in PPAK 10 100 1000 Pulse calculation formula Z THδ = R T H ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Table 14. Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb 18/24 Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 0.44 0.04 0.25 0.3 2 15 61 0.0008 0.007 0.02 0.3 0.45 0.8 6 24 5 VN800S-E / VN800PT-E PACKAGE MECHANICAL Table 15. SO-8 Mechanical Data Symbol millimeters Min Typ A a1 Max 1.75 0.1 0.25 a3 0.65 0.85 a2 1.65 b 0.35 0.48 b1 0.19 0.25 C 0.25 c1 0.5 45 (typ.) D 4.8 E 5.8 e 5 6.2 1.27 e3 3.81 F 3.8 4 L 0.4 1.27 M 0.6 S L1 8 (max.) 0.8 1.2 Figure 33. SO-8 Package Dimensions 19/24 VN800S-E / VN800PT-E PACKAGE MECHANICAL Table 16. PPAK Mechanical Data Symbol millimeters Min Typ Max A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 B 0.40 0.60 B2 5.20 5.40 C 0.45 0.60 C2 0.48 0.60 D1 5.1 D 6.00 6.20 E 6.40 6.60 E1 4.7 e 1.27 G 4.90 5.25 G1 2.38 2.70 H 9.35 L2 L4 1.00 0.60 R V2 10.10 0.8 1.00 0.2 0º Package Weight 8º Gr. 0.3 Figure 34. PPAK Package Dimensions P032T1 20/24 VN800S-E / VN800PT-E Figure 35. SO-8 Tube Shipment (no suffix) B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. Figure 36. SO-8 Tape And Reel Shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 21/24 VN800S-E / VN800PT-E Figure 37. PPAK Suggested Pad Layout and Tube Shipment (no suffix) A C Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) B 3 1.8 75 3000 532 6 21.3 0.6 6.7 All dimensions are in mm. Figure 38. PPAK Tape and Reel Shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 16.4 60 22.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 16 4 8 1.5 1.5 7.5 2.75 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 22/24 500mm min VN800S-E / VN800PT-E REVISION HISTORY Table 17. Revision History Date Revision Oct. -2004 1 Description of Changes - First Issue 23/24 VN800S-E / VN800PT-E Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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