STMICROELECTRONICS VND810PEPTR-E

VND810PEP-E
DOUBLE CHANNEL HIGH SIDE DRIVER
TARGET SPECIFICATION
Table 1. General Features
Figure 1. Package
TYPE
RDS(on)
IOUT
VCC
VND810PEP-E
160 mΩ (*)
3.5 A (*)
36 V
(*) Per each channel
CMOS COMPATIBLE INPUTS
OPEN DRAIN STATUS OUTPUTS
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
■ REVERSE BATTERY PROTECTION (**)
■ IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
■
■
PowerSSO-12
DESCRIPTION
The VND810PEP-E is a monolithic device designed
in STMicroelectronics VIPower M0-3 Technology,
intended for driving any kind of load with one side
connected to ground.
Active V CC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload. The device detects open
load condition both in on and off state. Output
shorted to VCC is detected in the off state. Device
automatically turns off in case of ground pin
disconnection.
Table 2. Order Codes
Package
PowerSSO-12
Tube
Tape and Reel
VND810PEP-E
VND810PEPTR-E
Note: (**) See application schematic at page 9
Rev. 4
November 2004
1/15
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
VND810PEP-E
Figure 2. Block Diagram
Vcc
Vcc
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
GND
OUTPUT1
INPUT1
DRIVER 1
CLAMP 2
STATUS1
CURRENT LIMITER 1
DRIVER 2
LOGIC
OUTPUT2
OVERTEMP. 1
OPENLOAD ON 1
CURRENT LIMITER 2
INPUT2
OPENLOAD OFF 1
OPENLOAD ON 2
STATUS2
OPENLOAD OFF 2
OVERTEMP. 2
Table 3. Absolute Maximum Ratings
Symbol
VCC
Parameter
DC Supply Voltage
Unit
41
V
- VCC
Reverse DC Supply Voltage
- 0.3
V
- IGND
DC Reverse Ground Pin Current
- 200
mA
Internally Limited
A
-6
A
IOUT
- IOUT
DC Output Current
Reverse DC Output Current
IIN
DC Input Current
+/- 10
mA
Istat
DC Status Current
+/- 10
mA
4000
V
4000
V
5000
V
5000
V
54
W
Internally Limited
°C
Electrostatic Discharge (Human
R=1.5KΩ; C=100pF)
VESD
- INPUT
- STATUS
- OUTPUT
- VCC
Ptot
Power Dissipation TC=25°C
Body
Model:
Tj
Junction Operating Temperature
Tc
Case Operating Temperature
- 40 to 150
°C
Storage Temperature
- 55 to 150
°C
Tstg
2/15
Value
VND810PEP-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
GND
NC
INPUT1
STATUS1
STATUS2
INPUT2
1
2
3
4
5
6
12
11
10
9
8
7
Vcc
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
Vcc
TAB = Vcc
Connection / Pin Status
Floating
X
To Ground
N.C.
X
X
Output
X
Input
X
Through 10KΩ resistor
Figure 4. Current and Voltage Conventions
IS
VF1 (*)
IIN1
VCC
VCC
INPUT 1
IOUT1
ISTAT1
VIN1
OUTPUT 1
STATUS 1
VSTAT1
VOUT1
IIN2
INPUT 2
IOUT2
VIN2 ISTAT2
OUTPUT 2
STATUS 2
VSTAT2
VOUT2
GND
IGND
(*) VFn = VCCn - VOUTn during reverse battery condition
Table 4. Thermal Data
Symbol
Rthj-case
Rthj-amb
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
(MAX)
(MAX)
Value
2.3
61 (*)
50 (**)
Unit
°C/W
°C/W
Note: (*) When mounted on a standard single-sided FR-4 board with 1cm2 of Cu (at least 35µm thick) connected to all V CC pins.
Note: (**) When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35µm thick) connected to all V CC pins.
3/15
VND810PEP-E
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified)
(Per each channel)
Table 5. Power Outputs
Symbol
Parameter
VCC
Min.
Typ.
Max.
Unit
Operating Supply Voltage
5.5
13
36
V
VUSD
Undervoltage Shut-down
3
4
5.5
V
VOV
Overvoltage Shut-down
36
RON
On State Resistance
IS
Supply Current
Test Conditions
V
IOUT=1A; Tj=25°C
IOUT=1A; VCC>8V
160
mΩ
320
mΩ
µA
Off State; VCC=13V; VIN=VOUT=0V
Off State; VCC=13V; VIN=VOUT=0V;
Tj=25°C
12
40
12
25
µA
On State; VCC=13V; VIN=5V; IOUT=0A
5
7
mA
0
50
µA
-75
0
µA
IL(off1)
Off State Output Current
VIN=VOUT=0V
IL(off2)
Off State Output Current
VIN=0V; VOUT =3.5V
IL(off3)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj =125°C
5
µA
IL(off4)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj =25°C
3
µA
Max.
Unit
Table 6. Switching (VCC =13V)
Symbol
Parameter
Test Conditions
Min.
Typ.
td(on)
Turn-on delay time
RL=13Ω from VIN rising edge to
VOUT =1.3V
30
µs
td(off)
Turn-on delay time
RL=13Ω from VIN falling edge to
VOUT =11.7V
30
µs
(dVOUT /
dt)on
Turn-on voltage slope
RL=13Ω from VOUT=1.3V to
VOUT =10.4V
See
relative
diagram
V/µs
(dVOUT /
dt)off
Turn-off voltage slope
RL=13Ω from VOUT=11.7V to
VOUT =1.3V
See
relative
diagram
V/µs
Table 7. V CC - Output Diode
Symbol
VF
Parameter
Forward on Voltage
Test Conditions
-IOUT =0.5A; Tj=150°C
Min
Typ
Max
0.6
Unit
V
Test Conditions
Min
Typ
Max
Unit
ISTAT= 1.6 mA
0.5
V
Normal Operation; VSTAT= 5V
10
µA
Normal Operation; VSTAT= 5V
100
pF
8
V
Table 8. Status Pin
Symbol
VSTAT
ILSTAT
CSTAT
VSCL
4/15
Parameter
Status Low Output
Voltage
Status Leakage Current
Status Pin Input
Capacitance
Status Clamp Voltage
ISTAT= 1mA
ISTAT= - 1mA
6
6.8
-0.7
V
VND810PEP-E
ELECTRICAL CHARACTERISTICS (continued)
Table 9. Logic Input
Symbol
Parameter
VIL
Input Low Level
IIL
Low Level Input Current
VIH
Input High Level
IIH
High Level Input Current
VI(hyst)
Input Hysteresis Voltage
VICL
Test Conditions
VIN = 1.25V
Min.
Typ.
Max.
Unit
1.25
V
1
µA
3.25
V
VIN = 3.25V
10
0.5
IIN = 1mA
Input Clamp Voltage
6
IIN = -1mA
µA
V
6.8
8
-0.7
V
V
Table 10. Protections (See note 1)
Symbol
Parameter
TTSD
Min.
Typ.
Max.
Unit
Shut-down Temperature
150
175
200
°C
TR
Reset Temperature
135
Thyst
Thermal Hysteresis
7
tSDL
Status Delay in Overload
Conditions
Ilim
Current limitation
Vdemag
Test Conditions
°C
15
Tj>TTSD
Turn-off Output Clamp
Voltage
3.5
5
5.5V<VCC<36V
IOUT =1A; L=6mH
VCC-41
VCC-48
°C
20
µs
7.5
A
7.5
A
VCC-55
V
Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles.
Table 11. Openload Detection
Symbol
IOL
tDOL(on)
VOL
tDOL(off)
Parameter
Openload ON State
Detection Threshold
Openload ON State
Detection Delay
Openload OFF State
Voltage Detection
Threshold
Openload Detection Delay
at Turn Off
Test Conditions
VIN=5V
Min
Typ
Max
Unit
20
40
80
mA
200
µs
3.5
V
1000
µs
IOUT=0A
VIN=0V
1.5
2.5
5/15
VND810PEP-E
Figure 5.
OPEN LOAD STATUS TIMING (with external pull-up)
IOUT < IOL
VOUT> VOL
OVERTEMP STATUS TIMING
Tj > TTSD
VINn
VINn
VSTAT n
VSTAT n
tSDL
tDOL(off)
tSDL
tDOL(on)
Figure 6. Switching time Waveforms
VOUTn
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
t
VINn
td(on)
td(off)
t
6/15
VND810PEP-E
Table 12. Truth Table
CONDITIONS
INPUTn
OUTPUTn
STATUSn
Normal Operation
L
H
L
H
H
H
Current Limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Overvoltage
L
H
L
L
H
H
Output Voltage > VOLn
L
H
H
H
L
H
Output Current < IOLn
L
H
L
H
H
L
Table 13. Electrical Transient Requirements on VCC Pin
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
I
II
TEST LEVELS
III
IV
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
I
C
C
C
C
C
C
TEST LEVELS RESULTS
II
III
C
C
C
C
C
C
C
C
C
C
E
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
IV
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
7/15
VND810PEP-E
Figure 7. Waveforms
NORMAL OPERATION
INPUTn
OUTPUT VOLTAGEn
STATUSn
UNDERVOLTAGE
VCC
VUSDhyst
VUSD
INPUTn
OUTPUT VOLTAGEn
STATUSn
undefined
OVERVOLTAGE
VCC<VOV
VCC>VOV
VCC
INPUTn
OUTPUT VOLTAGEn
STATUSn
OPEN LOAD with external pull-up
INPUTn
VOUT>VOL
OUTPUT VOLTAGEn
VOL
STATUSn
OPEN LOAD without external pull-up
INPUTn
OUTPUT VOLTAGEn
STATUSn
OVERTEMPERATURE
Tj
TTSD
TR
INPUTn
OUTPUT CURRENTn
STATUSn
8/15
VND810PEP-E
Figure 8. Application Schematic
+5V +5V
+5V
VCC
Rprot
STATUS1
Dld
µC
Rprot
INPUT1
OUTPUT1
Rprot
STATUS2
Rprot
INPUT2
OUTPUT2
GND
RGND
VGND
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
DGND
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also
required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
Safest configuration for unused INPUT and STATUS pin
is to leave them unconnected.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating.
The same applies if the device will be subject to
transients on the VCC line that are greater than the ones
shown in the ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
9/15
VND810PEP-E
2) no misdetection when load is disconnected: in this
case the VOUT has to be higher than VOLmax; this
results in the following condition RPU<(VPU–VOLmax)/
IL(off2).
Because Is(OFF) may significantly increase if Vout is
pulled high (up to several mA), the pull-up resistor RPU
should be connected to a supply that is switched OFF
when the module is in standby.
The values of VOLmin, VOLmax and IL(off2) are available in
the Electrical Characteristics section.
OPEN LOAD DETECTION IN OFF STATE
Off state open load detection requires an external pull-up
resistor (RPU) connected between OUTPUT pin and a
positive supply voltage (VPU) like the +5V line used to
supply the microprocessor.
The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
in this case we have to avoid VOUT to be higher than
VOlmin; this results in the following condition
VOUT=(VPU/(RL+RPU))RL<VOlmin.
Figure 9. Open Load detection in off state
V batt.
VPU
VCC
RPU
INPUT
DRIVER
+
LOGIC
IL(off2)
OUT
+
R
STATUS
VOL
GROUND
10/15
RL
VND810PEP-E
PowerSSO-12 Thermal Data
Figure 10. PowerSSO-12 PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 78mm x 78mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm2).
Figure 11. Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb(°C/W)
70
65
60
55
50
45
0
1
2
3
4
5
6
7
8
9
PCB Cu heatsink area (cm^2)
11/15
VND810PEP-E
Figure 12. PowerSSO-12 Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
100
Footprint
8 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
10
100
1000
Time (s)
Figure 13. Thermal fitting model of a double
channel HSD in PowerSSO-12
Pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Table 14. Thermal Parameter
Area/island (cm2)
R1/R7 (°C/W)
R2/R3/R8 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1/C7 (W.s/°C)
C2/C8 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
12/15
Footprint
0.1
1.5
8
28
30
0.0001
0.0007
0.015
0.1
0.15
3
8
18
22
0.017
5
VND810PEP-E
PACKAGE MECHANICAL
Table 15. PowerSSO-12™ Mechanical Data
Symbol
millimeters
Min
Typ
Max
A
1.250
1.620
A1
0.000
0.100
A2
1.100
1.650
B
0.230
0.410
C
0.190
0.250
D
4.800
5.000
E
3.800
4.000
e
0.800
H
5.800
6.200
h
0.250
0.500
L
0.400
1.270
k
0º
8º
X
1.900
2.500
Y
3.600
4.200
ddd
0.100
Figure 14. PowerSSO-12™ Package Dimensions
13/15
VND810PEP-E
REVISION HISTORY
Table 16. Revision History
14/15
Date
Revision
Description of Changes
Oct. 2004
1
- First Issue
Nov. 2004
2
- PowerSSO-12 Thermal Charact. insertion
Nov. 2004
3
- PC Board copper area correction
Nov. 2004
4
- Thermal data correction.
VND810PEP-E
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
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