VNI4140K
Quad high side smart power solid state relay
Features
Type
Vdemag(1) RDSon(1)
VNI4140K VCC-41 V
0.08 Ω
Iout(1)
VCC
0.7 A
41 V
1. Per channel
■
Output current: 0.7 A per channel
■
Shorted load protections
■
Junction over-temperature protection
■
Case overtemperature protection for thermal
independence of the channels
■
Thermal case shut-down restart not
simultaneous for the various channels
■
Protection against loss of ground
■
Current limitation
■
Undervoltage shut-down
■
Open drain diagnostic outputs
■
3.3 V CMOS/TTL compatible inputs
■
Fast demagnetization of inductive loads
■
Conforms to IEC 61131-2
Figure 1.
July 2008
PowerSSO-24
Description
The VNI4140K is a monolithic device made using
STMicroelectronics VIPower technology, intended
for driving four independent resistive or inductive
loads with one side connected to ground. Active
current limitation avoids dropping the system
power supply in case of shorted load. Built-in
thermal shut-down protects the chip from
overtemperature and short circuit. In overload
condition, channel turns OFF and back ON
automatically so as to maintain junction
temperature between TTSD and TR. If this
condition makes case temperature reach TCSD,
overloaded channel is turned OFF and will restart
only when case temperature has decreased down
to TCR. In case of more than one channel in
overload, re-start of the overloaded channels will
not be simultaneous, in order to avoid high peak
current from the supply. Non overloaded channels
continue to operate normally. The open drain
diagnostics outputs indicates over-temperature
conditions.
Block diagram
Rev 3
1/24
www.st.com
24
Contents
VNI4140K
Contents
1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6
Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.1
VNI4140K thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
9
Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
11
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/24
VNI4140K
1
Pin connection
Pin connection
Figure 2.
Pin connection (top view)
OUT1
OUT1
OUT1
OUT2
OUT2
OUT2
OUT3
OUT3
OUT3
OUT4
OUT4
OUT4
VCC
IN1
STAT1
IN2
STAT2
GND
STAT3
IN3
STAT4
IN4
NC
NC
Table 1.
Pin description
Pin
Name
Description
Tab
TAB
Exposed tab internally connected to Vcc
1
Vcc
Supply voltage
2
IN1
Channel 1 input 3.3 V CMOS/TTL compatible
3
STAT1
Channel 1 status in open drain configuration
4
IN2
Channel 2 input 3.3 V CMOS/TTL compatible
5
STA2
Channel 2 status in open drain configuration
6
GND
Device ground connection
7
STAT3
Channel 3 status in open drain configuration
8
IN3
Channel 3 input 3.3 V CMOS/TTL compatible
9
STAT4
Channel 4 status in open drain configuration
10
IN4
Channel 4 input 3.3 V CMOS/TTL compatible
11
NC
12
NC
13
OUT4
Channel 4 power stage output, internally protected
14
OUT4
Channel 4 power stage output, internally protected
15
OUT4
Channel 4 power stage output, internally protected
16
OUT3
Channel 3 power stage output, internally protected
17
OUT3
Channel 3 power stage output, internally protected
3/24
Pin connection
Table 1.
4/24
VNI4140K
Pin description (continued)
Pin
Name
Description
18
OUT3
Channel 3 power stage output, internally protected
19
OUT2
Channel 2 power stage output, internally protected
20
OUT2
Channel 2 power stage output, internally protected
21
OUT2
Channel 2 power stage output, internally protected
22
OUT1
Channel 1 power stage output, internally protected
23
OUT1
Channel 1 power stage output, internally protected
24
OUT1
Channel 1 power stage output, internally protected
VNI4140K
2
Maximum ratings
Maximum ratings
Table 2.
Absolute maximum rating
Symbol
Value
Unit
41
V
VCC
Power supply voltage
-VCC
Reverse supply voltage
-0.3
V
IGND
DC ground reverse current
-250
mA
IOUT
Output current (continuos)
Internally limited
A
-5
A
IR
Reverse output current (per channel)
IIN
Input current (per channel)
± 10
mA
VIN
Input voltage
+VCC
V
VSTAT
Status pin voltage
+VCC
V
ISTAT
Status pin current
± 10
mA
VESD
Electrostatic discharge (R = 1.5 kΩ; C = 100 pF)
2000
V
EAS
Single pulse avalanche energy per channel not
simultaneously
300
mJ
PTOT
Power dissipation at Tc = 25 °C
Internally limited
W
TJ
Junction operating temperature
Internally limited
°C
-55 to 150
°C
Value
Unit
TSTG
2.1
Parameter
Storage temperature
Thermal data
Table 3.
Thermal data
Symbol
Parameter
Rth(JC)
Thermal resistance junction-case (1)
Max
2
°C/W
Rth(JA)
Thermal resistance junction-ambient
Max
see Figure 11
°C/W
1. Per channel
5/24
Electrical characteristics
3
VNI4140K
Electrical characteristics
(10.5 V < VCC < 36 V; -25 °C < TJ < 125 °C; unless otherwise specified)
Table 4.
Symbol
Vcc
RDS(on)
Power section
Parameter
Test condition
Supply voltage
On state resistance
Vclamp
IOUT = 0.5 A at TJ = 25 °C
IOUT = 0.5 A
Is = 20 mA
Supply current
VOUT(OFF)
OFF state output
voltage
VIN = 0 V and IOUT =0 A
IOUT(OFF)
OFF state output
current
VIN = VOUT = 0 V
Charge pump
frequency
Channel in ON state (1)
FCP
Typ
10.5
All channel in OFF state
ON state with VIN =5 V
(TJ = 125 °C)
IS
Min
41
45
250
2.4
0
Max
Unit
36
V
0.080
0.140
Ω
Ω
52
V
4
µA
mA
1
V
5
µA
1450
kHz
1. To cover EN55022 class A and class B normative
Table 5.
Symbol
Switching (VCC = 24 V; -25 °C < TJ < 125 °C, RL = 48 Ω,
input rise time < 0.1 µs)
Parameter
Min
Typ
Max
Unit
Turn ON delay
20
µS
tr
Rise time
10
µS
td(OFF)
Turn OFF
30
µS
tf
Fall time
8
µS
3
V/µS
4
V/µS
td(ON)
dV/dt(ON) Turn ON voltage slope
dV/dt(off)
6/24
Test condition
Turn OFF voltage
slope
VNI4140K
Electrical characteristics
Table 6.
Logical input
Symbol
Parameter
VIL
Input low level voltage
VIH
Input high level voltage
VI(HYST)
IIN
Table 7.
Symbol
Test conditions
Min
Unit
0.8
V
V
0.15
V
VIN = 15 V
10
VIN = 36 V
210
µΑ
Protection and diagnostic
Parameter
Test conditions
Min
Typ
vSTAT
Status voltage
output low
VUSD
Undervoltage
protection
7
VUSDHYS
Undervoltage
hysteresis
0.4
0.5
0.7
1
ISTAT = 1.6 mA
DC short circuit
current
VCC = 24 V; RLOAD < 10 mΩ
IPEAK
Maximum DC output
Current
Dynamic load
Hyst
ILIM
Max
2.20
Input hysteresis
voltage
Input current
Typ
Max
Unit
0.6
V
10.5
V
V
1.7
A
1.3
A
Traking limits
0.2
A
ILSTAT
Status leakage current VCC = VSTAT = 36 V
30
µΑ
TTSD
Junction shut down
temperature
150
Junction reset
temperature
135
TR
170
190
°C
THIST
Junction thermal
hysteresis
7
15
TCSD
Case shut-down
temperature
125
130
TCR
Case reset
temperature
TCHYST
Case thermal
hysteresis
Vdemag
Output voltage at
turn-OFF
°C
135
110
IOUT = 0.5 A; LLOAD >= 1 mH
°C
°C
°C
7
15
VCC41
VCC45
°C
VCC52
V
7/24
Electrical characteristics
Figure 3.
8/24
Current and voltage conventions
VNI4140K
VNI4140K
4
Truth table
Truth table
Table 8.
5
Truth table
INPUTn
OUTPUTn
STATUSn
Normal operation
L
H
L
H
H
H
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Shorted load
(Current limitation)
L
H
L
X
H
H
Typical application circuit
Figure 4.
Typical application circuit
9/24
Typical application circuit
Figure 5.
VNI4140K
Thermal behavior
Vin(i) = H
OUT(i) On
STAT(i) Off (H)
1)
NO
YES
Tj(i) > Ttsd
OUT(i) Off
STAT(i) On (L)
YES
4)
YES
NO
Tc > Tcsd
NO
Tc > Tcr
2)
NO
YES
Tj(i) > Tjr
3)
10/24
VNI4140K
6
Switching waveforms
Switching waveforms
Figure 6.
Switching waveforms
11/24
Pin functions
7
12/24
VNI4140K
Pin functions
Figure 7.
Input circuit
Figure 8.
Status circuits
VNI4140K
Pin functions
Figure 9.
Charge pump switching frequency (typical) vs temperature
Freq_CP
2000
CP_frequency (KHz)
1800
1600
Freq_CP
1400
1200
1000
800
-50
0
50
100
150
200
temperature("C)
13/24
Package and PC board thermal data
8
Package and PC board thermal data
8.1
VNI4140K thermal data
VNI4140K
Figure 10. VNI4140K PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias,
FR4 area = 77 mm x 86 mm, PCB thickness=1.6 mm, Cu thickness = 70 mm (front and back
side), Copper areas: from minimum pad lay-out to 8 cm2).
Figure 11. RthJA vs PCB copper area in open box free air condition (one channel ON)
14/24
VNI4140K
Package and PC board thermal data
Figure 12. VNI4140K thermal impedance junction ambient single pulse
(one channel on)
15/24
Reverse polarity protection
9
VNI4140K
Reverse polarity protection
A schematic solution to protect the IC against a reverse polarity condition is proposed.
This schematic is effective with any type of load connected to the outputs of the IC.
The RGND resistor value can be selected according to the following conditions to be met:
1.
RGND ≤ 600 mV / (IS in ON state max).
2.
RGND ≥ (-VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
The power dissipation associated to RGNG during reverse polarity condition is:
PD = (-VCC)2/RGND
This resistor can be shared by several different ICs. In such case IS value on formula (1) is
the sum of the maximum ON-state currents of the different devices.
Please note that if the microprocessor ground and the device ground are separated then the
voltage drop across the RGND (given by IS in ON state max * RGND) produce a difference
between the generated input level and the IC input signal level. This voltage drop will vary
depending on how many devices are ON in the case of several high side switches sharing
the same RGND.
Figure 13. Reverse polarity protection
+ Vcc
Statusi
Outputi
Inputi
RGND
(Optional)
16/24
GND
Load
VNI4140K
10
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
17/24
Package mechanical data
Table 9.
VNI4140K
PowerSSO-24™ mechanical data
mm
Symbol
Min
Max
A
2.15
2.47
A2
2.15
2.40
a1
0
0.075
b
0.33
0.51
c
0.23
0.32
D
10.10
10.50
E
7.4
7.6
e
0.8
e3
8.8
G
0.1
G1
0.06
H
10.1
h
L
10.5
0.4
0.55
N
0.85
10deg
X
4.1
4.7
Y
6.5
7.1
Figure 14. PowerSSO-24™ package dimensions
18/24
Typ
VNI4140K
Package mechanical data
Figure 15. PowerSSO-24™ tube shipment (no suffix)
Table 10.
Note:
PowerSSO-24™ tube shipment
Base quantity
49
Bulk quantity
1225
Tube length (± 0.5)
532
A
3.5
B
13.8
C (± 0.1)
0.6
All dimensions are in mm.
19/24
Package mechanical data
VNI4140K
Figure 16. PowerSSO-24™ reel shipment (suffix “TR”)
Table 11.
20/24
PowerSSO-24™ reel dimensions
Base quantity
1000
Bulk quantity
1000
A (max)
330
B (min)
1.5
C (± 0.2)
13
F
20.2
G (2 ± 0)
24.4
N (min)
100
T (max)
30.4
VNI4140K
Package mechanical data
Figure 17. PowerSSO-24™ tape dimensions
Table 12.
Note:
PowerSSO-24™ tape dimensions
Tape width
W
24
Tape hole spacing
P0 (± 0.1)
4
Component spacing
P
12
Hole diameter
D (± 0.05)
1.55
Hole diameter
D1 (min)
1.5
Hole position
F (± 0.1)
11.5
Compartment depth
K (max)
2.85
Hole spacing
P1 (± 0.1)
2
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986
21/24
Order codes
11
Order codes
Table 13.
22/24
VNI4140K
Order codes
Order codes
Package
Packaging
VNI4140K
PowerSSO-24
Tube
VNI4140KTR
PowerSSO-24
Tape and reel
VNI4140K
12
Revision history
Revision history
Table 14.
Document revision history
Date
Revision
Changes
16-Nov-2007
1
Initial release
26-Nov-2007
2
Updated electrical parameters values
08-Jul-2008
3
Inserted: Figure 4 on page 9 and Section 9: Reverse
polarity protection on page 16
23/24
VNI4140K
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